MP1497 High Efficiency 3A, 16V, 500kHz Synchronous Step Down Converter The Future of Analog IC Technology PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY DESCRIPTION FEATURES The MP1497 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 3A continuous output current over a wide input supply range with excellent load and line regulation. The MP1497 has synchronous mode operation for higher efficiency over output current load range. • • • Current mode operation provides fast transient response and eases loop stabilization. • F P S M N O C TYPICAL APPLICATION O D N IA T N E D I Full protection features include OCP and thermal shut down. The MP1497 requires a minimum number of readily available standard external components and is available in a space saving 8-pin TSOT23 package. • • • • • • L Wide 4.5V to 16V Operating Input Range 80mΩ/30mΩ Low Rds(on) Internal Power MOSFETs Proprietary Switching Loss Reduction Technique High Efficiency Synchronous Mode Operation Fixed 500kHz Switching Frequency External Programmable Soft Start OCP Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in an 8-pin TSOT-23 package • • • • T U IB APPLICATIONS Notebook Systems and I/O Power Digital Set Top Boxes Flat Panel Television and Monitors Distributed Power Systems E R All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. T “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. T O D S I MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 1 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY ORDERING INFORMATION Part Number* MP1497DJ Package TSOT-23-8 L Top Marking ACQ A I * For Tape & Reel, add suffix –Z (e.g. MP1497DJ–Z); PACKAGE REFERENCE N O C N E D I F T E T R U IB ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN ..................................................-0.3V to 18V VSW .........................-0.3V (-5V for <10ns) to 19V VBS ......................................................... VSW+6V All Other Pins ....................................-0.3V to 6V (2) Continuous Power Dissipation (TA = +25°C) ........................................................... 1.25W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature................. -65°C to 150°C TSOT-23-8............................. 100 ..... 55... °C/W P S M T O Recommended Operating Conditions (3) Supply Voltage VIN ...........................4.5V to 16V Output Voltage VOUT ..................... 0.8V to VIN-3V Operating Junction Temp. (TJ). -40°C to +125°C O D N S I T (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. D MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 2 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY ELECTRICAL CHARACTERISTICS (5) VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Supply Current (Shutdown) Supply Current (Quiescent) HS Switch On Resistance LS Switch On Resistance Switch Leakage Current Limit (5) Oscillator Frequency Fold-back Frequency Maximum Duty Cycle Minimum On Time (5) Sync Frequency Range IIN Iq VFB Feedback Current EN Rising Threshold EN Falling Threshold IFB EN Input Current O C EN Turn Off Delay VIN Under Voltage Lockout Threshold-Rising VIN Under Voltage Lockout Threshold-Hysteresis VCC Regulator VCC Load Regulation Soft-Start Current Thermal Shutdown Thermal Hysteresis M F N S IEN E 5 500 0.25 95 60 90 0.2 791 787 807 807 10 1.4 1.25 S I VCC ICC=5mA ISS N T O D 3.7 Max Units 1 1 μA mA mΩ mΩ μA A kHz fSW % ns MHz 1 580 2 823 827 50 1.6 1.4 E T U IB R T VEN=0 INUVHYS D 4.2 440 VEN=2V INUVVth O T 0.75 80 30 1.2 1.1 ENTd-off Notes: 5) Guaranteed by design. Typ A I N D I TA=25ºC -40ºC<TA<85ºC VFB=820mV VEN_RISING VEN_FALLING L Min VEN = 0V VEN = 2V, VFB = 1V VBST-SW=5V VCC=5V VEN = 0V, VSW =12V Duty Cycle=40% VFB=750mV VFB<400mV VFB=700mV HSRDS-ON LSRDS-ON SWLKG ILIMIT fSW fFB DMAX TON_MIN fSYNC Feedback Voltage P Condition mV nA V V 2 μA 0 μA 8 μs 3.9 4.1 V 650 mV 5 3 11 150 20 V % μA ºC ºC MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 3 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY TYPICAL PERFORMANCE CHARACTERISTICS L Performance waveforms are tested on the evaluation board of the Design Example section. TA = 25ºC, unless otherwise noted. P S M N O C O D N T O T N E D I F A I T U IB R T S I D E MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 4 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY TYPICAL PERFORMANCE CHARACTERISTICS (continued) L Performance waveforms are tested on the evaluation board of the Design Example section. TA = 25ºC, unless otherwise noted. P S M N O C O D N T O T N E D I F A I T U IB R T S I D E MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 5 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY TYPICAL PERFORMANCE CHARACTERISTICS (continued) L Performance waveforms are tested on the evaluation board of the Design Example section. TA = 25ºC, unless otherwise noted. P S M N O C O D N T O T N E D I F A I T U IB R T S I D E MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 6 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY PIN FUNCTIONS Package Pin # Name 1 SS 2 IN 3 SW 4 GND 5 BST 6 EN 7 VCC 8 FB A I Soft-Start. Connect an external capacitor to program the soft start time for the switch mode regulator. Supply Voltage. The MP1497 operates from a +4.5V to +16V input rail. C1 is needed to decouple the input rail. Use wide PCB trace to make the connection. Switch Output. Use wide PCB trace to make the connection. System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. Suggested to be connected to GND with copper and vias. Bootstrap. A capacitor connected between SW and BST pins is required to form a floating supply across the high-side switch driver. EN=1 to enable the MP1497. EN=0 to turn off the MP1497. Bias Supply. Decouple with 0.1μF─0.22μF cap. And the capacitance should be no more than 0.22μF Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. To prevent current limit run away during a short circuit fault condition the frequency fold-back comparator lowers the oscillator frequency when the FB voltage is below 400mV. S P M L Description N O C O D N N E D I F T O T T U IB R T S I D E MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 7 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY BLOCK DIAGRAM P S M N O C O D D I F A I T N E L T Figure 1—Block Diagram N T O U IB R T S I D E MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 8 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY OPERATION The MP1497 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The integrated high-side power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in 95% of one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. Internal Regulator Most of the internal circuitries are powered from the 5V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases, a 0.1uF ceramic capacitor for decoupling purpose is required. P S O C Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.8V reference (REF) and outputs a COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. M N T O Enable EN is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator, drive it low to turn it off. There is an internal 1MEG resistor from EN to GND thus EN can be floated to shut down the chip. O D A I External Soft-Start The soft start time can be adjusted by connecting a capacitor from this pin to ground. When the soft-start period starts, an internal 11µA current source begins charging the external capacitor. During soft-start, the voltage on the soft-start capacitor is connected to the non-inverting input of the error amplifier. The soft-start period lasts until the voltage on the soft-start capacitor exceeds the reference voltage of 0.8V. At this point the reference voltage takes over at the no inverting error amplifier input. The soft-start time can be calculated as follows: T N E D I F N L monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 3.7V while its falling threshold is consistent 3.1V. The MP1497 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 3A continuous output current over a wide input supply range with excellent load and line regulation. E T t SS (ms) = U IB 0.8V × CSS (nF) 11μA R Over-Current-Protection and Hiccup The MP1497 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, output voltage starts to drop until FB is below the Under-Voltage (UV) threshold, typically 50% below the reference. Once a UV is triggered, the MP1497 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-short to ground. The average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The MP1497 exits the hiccup mode once the over current condition is removed. D S I T Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The MP1497 UVLO comparator MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 9 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 130°C, the chip is enabled again. Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M3, C4, L1 and C2 (Figure 2). If (VIN-VSW) is more than 5V, U2 will regulate M3 to maintain a 5V BST voltage across C4. O M1 BST U1 5V P S C C4 SW L1 D I F N D1 VIN VOUT M If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. N T O T D E T U IB R T S I C2 Figure 2—Internal Bootstrap Charging Circuit Startup and Shutdown A I N E L Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. O D MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 10 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY APPLICATION INFORMATION Setting the Output Voltage The external resistor divider is used to set the output voltage (see Typical Application on page 1). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Typical Application on page 1). R2 is then given by: VOUT FB 8 R1 N Figure 3— T-type Network O Table 1 lists the recommended T-type resistors value for common output voltages. C Table 1—Resistor Selection for Common Output Voltages S R1 (kΩ) 20.5 30.1 40.2 40.2 40.2 40.2 M P R2 (kΩ) 82 60.4 32.4 19.1 13 7.68 Rt (kΩ) 82 82 56 33 33 33 Selecting the Inductor T O A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from the following equation. L1 = O D E N VOUT × (VIN − VOUT ) VIN × ΔIL × fOSC Where ΔIL is the inductor ripple current. E The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. D I F VOUT R2 VOUT (V) 1.0 1.2 1.8 2.5 3.3 5 N Selecting the Input Capacitor The T-type network is highly recommended, as Figure 3 shows. RT T ΔI L 2 Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. −1 0.8V A I IL(MAX ) = ILOAD + R1 R2 = L Choose inductor current to be approximately 30% of the maximum load current. The maximum inductor peak current is: T U IB R Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: S I T I C1 = ILOAD × D VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 11 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY ΔVIN = ⎛ ⎞ ILOAD V V × OUT × ⎜ 1 − OUT ⎟ fS × C1 VIN ⎝ VIN ⎠ External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode are: z VOUT is 5V or 3.3V; and Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT = VOUT ⎛ VOUT × ⎜1 − fS × L1 ⎝ VIN ΔVOUT O C F In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: P M ΔVOUT V V ⎛ ⎞ = OUT × ⎜ 1 − OUT ⎟ × RESR fS × L1 ⎝ VIN ⎠ T O The characteristics of the output capacitor also affect the stability of the regulation system. The MP1495 can be optimized for a wide range of capacitance and ESR values. O D N N E D I ⎛ V ⎞ VOUT = × ⎜ 1 − OUT ⎟ 2 VIN ⎠ 8 × fS × L1 × C2 ⎝ S T VOUT >65% VIN In these cases, an external BST diode is recommended from the VCC pin to BST pin, as shown in Figure 4. Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. N A I Duty cycle is high: D= z ⎞ ⎞ ⎛ 1 ⎟ ⎟ × ⎜ RESR + 8 × fS × C2 ⎠ ⎠ ⎝ In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: L E T U IB Figure 4—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1─1μF. R PC Board Layout (6) PCB layout is very important to achieve stable operation. Please follow these guidelines. S I T 1) Keep the connection of input ground and GND pin as short and wide as possible. 2) Keep the connection of input capacitor and IN pin as short and wide as possible. D 3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. Notes: 6) The recommended layout is based on the Figure 7 Typical Application circuit on the next page. MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 12 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY GND L R1 C3 R3 C4 SW R6 R5 7 6 5 3 4 L1 C1 Vin C2A GND GND VCC S P M O C F N E D I Vout C2 GND O D N T O D E T U IB R T S I BST SW T N C1A EN/SYNC A I R4 8 2 R9 C5 R7 1 R2 R8 C6 MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 13 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY TYPICAL APPLICATION CIRCUITS A I T N E D I L P S M N O C O D F N T O U IB R T S I D E T Figure 5—12VIN-3.3V/3A MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 14 MP1497 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE MPS CONFIDENTIAL AND PROPRIETARY INFORMATION– DELTA USE ONLY PACKAGE INFORMATION TSOT23-8 TOP VIEW S P N O C F D O IS SEE DETAIL ’’A’’ T O N D R T SEATING PLANE E T U B I RECOMMENDED LAND PATTERN NOTE: DETAIL ’’A’’ T E FRONT VIEW M A I N D I L SIDE VIEW 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO-193, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1497 Rev. 0.8 www.MonolithicPower.com 11/22/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2011 MPS. All Rights Reserved. 15