SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
D Member of the Texas Instruments
D
D
D
DGG OR DL PACKAGE
(TOP VIEW)
Widebus Family
Max tpd of 5.8 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Latch-Up Performance Exceeds 250 mA Per
JESD 17
1DIR
1B1
1B2
GND
1B3
1B4
(3.3 V, 5 V) VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
(3.3 V, 5 V) VCCB
2B5
2B6
GND
2B7
2B8
2DIR
description/ordering information
This 16-bit (dual-octal) noninverting bus
transceiver contains two separate supply rails.
B port has VCCB, which is set to operate at 3.3 V
and 5 V. A port has VCCA, which is set to operate
at 2.5 V and 3.3 V. This allows for translation from
a 2.5-V to a 3.3-V environment, and vice versa, or
from a 3.3-V to a 5-V environment, and vice versa.
The SN74ALVC164245 is designed for
asynchronous communication between data
buses.
To ensure the high-impedance state during power
up or power down, the output-enable (OE) input
should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the
current-sinking capability of the driver.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCCA (2.5 V, 3.3 V)
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA (2.5 V, 3.3 V)
2A5
2A6
GND
2A7
2A8
2OE
ORDERING INFORMATION
SSOP − DL
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TSSOP − DGG
Tube of 25
SN74ALVC164245DL
Reel of 1000
SN74ALVC164245DLR
Reel of 2000
SN74ALVC164245DGGR
Reel of 250
SN74ALVC164245DGGT
VFBGA − GQL
TOP-SIDE
MARKING
ALVC164245
ALVC164245
SN74ALVC164245KR
VFBGA − ZQL (Pb-free)
Reel of 1000
74ALVC164245ZQLR
VC4245
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright  2004, Texas Instruments Incorporated
!"#$%&" ' ()##*& %' "! +),-(%&" .%&*
#".)(&' ("!"#$ &" '+*(!(%&"' +*# &/* &*#$' "! *0%' '&#)$*&'
'&%.%#. 1%##%&2 #".)(&" +#"(*''3 ."*' "& *(*''%#-2 (-).*
&*'&3 "! %-- +%#%$*&*#'
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
GQL OR ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
terminal assignments
1
2
3
4
5
6
A
A
1DIR
NC
NC
NC
NC
1OE
B
B
1B2
1B1
GND
GND
1A1
1A2
C
C
1B4
1B3
1A4
D
1B6
1B5
VCCA
GND
1A3
D
VCCB
GND
1A5
1A6
E
1B8
1B7
1A7
1A8
F
2B1
2B2
2A2
2A1
G
2B3
2B4
GND
GND
2A4
2A3
H
2B5
2B6
2A5
2B7
2B8
VCCA
GND
2A6
J
VCCB
GND
2A8
2A7
K
2DIR
NC
NC
NC
NC
2OE
E
F
G
H
J
K
NC − No internal connection
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
36
13
1B1
To Seven Other Channels
To Seven Other Channels
Pin numbers shown are for the DGG and DL packages.
2
POST OFFICE BOX 655303
2OE
• DALLAS, TEXAS 75265
2B1
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
absolute maximum ratings over operating free-air temperature range for VCCB at 5 V and
VCCA at 3.3 V (unless otherwise noted)†
Supply voltage range: VCCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 V
Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 V
I/O port A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 V
I/O port B (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
GQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. This value is limited to 6 V maximum.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions for VCCB at 3.3 V and 5 V (see Note 4)
MIN
MAX
5.5
UNIT
VCCB
VIH
Supply voltage
3
High-level input voltage
2
VIL
Low-level input voltage
VIA
VOB
Input voltage
0
Output voltage
0
IOH
IOL
High-level output current
−24
mA
Low-level output current
24
mA
∆t/∆v
Input transition rise or fall rate
10
ns/V
VCCB = 3 V to 3.6 V
VCCB = 4.5 V to 5.5 V
V
V
0.7
0.8
VCCB
VCCB
V
V
V
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
recommended operating conditions for VCCA at 2.5 V and 3.3 V (see Note 4)
VCCA
Supply voltage
VIH
High-level input voltage
VCCA = 2.3 V to 2.7 V
VCCA = 3 V to 3.6 V
VIL
Low-level input voltage
VCCA = 2.3 V to 2.7 V
VCCA = 3 V to 3.6 V
VIB
VOA
Input voltage
MIN
MAX
2.3
3.6
0.7
0.8
0
High-level output current
IOL
Low-level output current
VCCA = 2.3 V
VCCA = 3 V
∆t/∆v
Input transition rise or fall rate
V
2
Output voltage
IOH
V
1.7
0
VCCA = 2.3 V
VCCA = 3 V
UNIT
VCCA
VCCA
−18
18
−24
24
10
V
V
V
mA
mA
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range for
VCCA = 2.7 V to 3.6 V and VCCB = 4.5 V to 5.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −100 µA
VCCA
2.7 V to 3.6 V
VCCB
IOH = −12 mA
3V
2.4
IOH = −24 mA
3V
2
IOH = −100 µA
A
VOH (A to B)
IOH = −24 mA
VOL (B to A)
VOL (A to B)
II
IOZ‡
Control inputs
A or B ports
ICC
IOL = 24 mA
IOL = 100 µA
IOL = 24 mA
VI = VCCA/VCCB or GND
VO = VCCA/VCCB or GND
VI = VCCA/VCCB or GND, IO = 0
Control inputs
VI = VCCA/VCCB or GND
VO = VCCA/VCCB or GND
MAX
UNIT
4.5 V
4.3
5.5 V
5.3
4.5 V
3.7
5.5 V
4.7
V
V
2.7 V to 3.6 V
One input at VCCA/VCCB − 0.6 V,
Other inputs at VCCA/VCCB or GND
∆ICC§
Ci
IOL = 100 µA
IOL = 12 mA
TYP†
VCC−0.2
2.2
2.7 V
VOH (B to A)
MIN
0.2
2.7 V
0.4
3V
0.55
4.5 V to 5.5 V
0.2
4.5 V to 5.5 V
0.55
V
V
3.6 V
5.5 V
±5
µA
3.6 V
5.5 V
±10
µA
5.5 V
5.5 V
40
µA
3 V to 3.6 V
4.5 V to 5.5 V
750
µA
3.3 V
5V
6.5
pF
Cio
A or B ports
3.3 V
3.3 V
8.5
pF
† Typical values are measured at VCCA = 3.3 V and VCCB = 5 V, TA = 25°C.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
§ This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than at 0 or the associated VCC.
4
POST OFFICE BOX 655303
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SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
electrical characteristics over recommended operating free-air temperature range for
VCCA = 2.3 V to 2.7 V and VCCB = 3 V to 3.6 V (unless otherwise noted)
PARAMETER
VOH (B to A)
VOH (A to B)
VOL (B to A)
VOL (A to B)
II
IOZ†
Control inputs
A or B ports
ICC
TEST CONDITIONS
VCCA
2.3 V to 2.7 V
IOH = −100 µA
IOH = −8 mA
IOH = −12 mA
IOH = −100 µA
2.3 V
3 V to 3.6 V
2.7 V
3 V to 3.6 V
2.3 V to 2.7 V
IOH = −18 mA
IOL = 100 µA
3 V to 3.6 V
2.3 V to 2.7 V
3V
2.3 V to 2.7 V
IOL = 12 mA
IOL = 100 µA
2.3 V
IOL = 18 mA
VI = VCCA/VCCB or GND
VO = VCCA/VCCB or GND
VI = VCCA/VCCB or GND, IO = 0
One input at VCCA/VCCB − 0.6 V,
Other inputs at VCCA/VCCB or GND
∆ICC‡
VCCB
3 V to 3.6 V
MIN
MAX
VCCA−0.2
1.7
UNIT
V
1.8
VCCB−0.2
2.2
V
3 V to 3.6 V
0.2
3 V to 3.6 V
0.6
V
2.3 V to 2.7 V
3 V to 3.6 V
0.2
2.3 V
3V
0.55
2.3 V to 2.7 V
3 V to 3.6 V
±5
µA
2.3 V to 2.7 V
3 V to 3.6 V
±10
µA
2.3 V to 2.7 V
3 V to 3.6 V
20
µA
2.3 V to 2.7 V
3 V to 3.6 V
750
µA
V
† For I/O ports, the parameter IOZ includes the input leakage current.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than at 0 or the associated VCC.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1-4)
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V ± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
MAX
MIN
MAX
A
B
7.6
5.9
1
5.8
tpd
B
A
7.6
6.7
1.2
5.8
ten
OE
B
11.5
9.3
1
8.9
ns
tdis
PARAMETER
VCCA = 2.5 V
± 0.2 V
MIN
MAX
VCCA = 2.7 V
MIN
VCCA = 3.3 V
± 0.3 V
UNIT
ns
OE
B
10.5
9.2
2.1
9.5
ns
ten
OE
A
12.3
10.2
2
9.1
ns
tdis
OE
A
9.3
9
2.9
8.6
ns
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
Outputs enabled (B)
Cpd
Power dissipation
capacitance
Outputs disabled (B)
Outputs enabled (A)
Outputs disabled (A)
CL = 50 pF,
CL = 50 pF,
POST OFFICE BOX 655303
f = 10 MHz
f = 10 MHz
• DALLAS, TEXAS 75265
VCCB = 3.3 V
VCCA = 2.5 V
VCCB = 5 V
VCCA = 3.3 V
TYP
TYP
55
56
27
6
118
56
58
6
UNIT
pF
5
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
power-up considerations†
TI level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-up
sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other
anomalies caused by improperly biased device pins. Take these precautions to guard against such power-up
problems:
1. Connect ground before any supply voltage is applied.
2. Power up the control side of the device (VCCA for all four of these devices).
3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA.
4. Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus),
ramp it with VCCA. Otherwise, keep DIR low.
† Refer to the TI application report, Texas Instruments Voltage-Level-Translation Devices, literature number SCEA021.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
PARAMETER MEASUREMENT INFORMATION
VCCA= 2.5 V ± 0.2 V TO VCCB= 3.3 V ± 0.3 V
VCCB = 6 V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 30 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
VCCB = 6 V
GND
LOAD CIRCUIT
VCCA
Output
Control
(low-level
enabling)
VCCA/2
0V
tPZL
VCCA
Input
VCCA/2
VCCA/2
0V
tPLH
tPHL
VOHB
Output
1.5 V
1.5 V
VOLB
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPLZ
VCCB
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VCCA/2
1.5 V
tPZH
VOL + 0.3 V
VOLB
tPHZ
1.5 V
VOH − 0.3 V
VOHB
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, ZO = 50 Ω, tr≤ 2 ns, tf≤ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
PARAMETER MEASUREMENT INFORMATION
VCCB = 3.3 V ± 0.3 V TO VCCA = 2.5 V ± 0.2 V
2 × VCCA
500 Ω
From Output
Under Test
S1
Open
GND
CL = 30 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCA
GND
LOAD CIRCUIT
Output
Control
(low-level
enabling)
2.7 V
1.5 V
0V
tPZL
2.7 V
1.5 V
Input
1.5 V
0V
tPLH
Output
Output
Waveform 1
S1 at 2 × VCCA
(see Note B)
VOHA
VCCA/2
VOLA
VCCA/2
tPLZ
VCCA
VCCA/2
tPZH
tPHL
1.5 V
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.15 V
VOLA
tPHZ
VCCA/2
VOHA
VOH − 0.15 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 2. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
PARAMETER MEASUREMENT INFORMATION
VCCA = 3.3 V ± 0.3 V TO VCCB = 5 V ± 0.5 V
2
S1
500 Ω
From Output
Under Test
CL = 50 pF
(see Note A)
VCCB
Open
GND
500 Ω
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCCB
GND
2.7 V
Output
Control
(low-level
enabling)
LOAD CIRCUIT
TEST
1.5 V
0V
tPLZ
tPZL
2.7 V
Input
1.5 V
1.5 V
0V
tPLH
Output
Output
Waveform 1
S1 at 2
VCCB
(see Note B)
VOH
50% VCCB
VOL
50% VCCB
≈VCCB
50% VCCB
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
20% VCCB
VOL
tPHZ
tPZH
tPHL
1.5 V
50% VCCB
80% VCCB
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 3. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
PARAMETER MEASUREMENT INFORMATION
VCCB = 5 V ± 0.5 V TO VCCA = 2.7 V AND 3.3 V ± 0.3 V
S1
500 Ω
From Output
Under Test
VCCA = 6 V
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
VCCA = 6 V
GND
3V
Output
Control
(low-level
enabling)
LOAD CIRCUIT
1.5 V
0V
tPLZ
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
≈3 V
1.5 V
1.5 V
VOLA
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOLA
tPHZ
tPZH
VOHA
Output
Output
Waveform 1
S1 at 6 V
(see Note B)
tPHL
1.5 V
1.5 V
VOHA
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 4. Load Circuit and Voltage Waveforms
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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