MICHEL DUBOIS
AUGUST 15, 2011 slide 1
AGENDA
WHAT IS COMPUTER ARCHITECTURE, WHAT DO WE TEACH
FACULTY
COURSES
OPPORTUNITIES slide 2
WHAT IS COMPUTER ARCHITECTURE?
Application
Compiler /Libraries of macros and procedures
SOFTWARE
Operating system
Instruction set (ISA)
COMPUTER
ARCHITECTURE
Computer System Organization
Circuits (implementation of hardware functions)
HARDWARE
Semiconductor physics
ROLE OF THE COMPUTER ARCHITECT:
TO MAKE DESIGN TRADE-OFFS ACROSS THE HW/SW INTERFACE TO MEET
FUNCTIONAL, PERFORMANCE AND COST REQUIREMENTS
“FUNCTIONAL” INCLUDES CORRECTNESS PLUS POWER/RELIABILITY
OBJECTIVES
KNOWLEDGE OF HARDWARE (VLSI) DESIGN, O/S, AND COMPILERS slide 3
COMPUTER ORGANIZATION
MODERN PC ARCHITECTURE
Multi-core microprocessor
Core0 Core1
Shared cache
Backside bus
Off-chip cache
Frontside bus
Graphics processor
North
Bridge
Main memory
(DRAM)
Disk
PCI bus
Network
Interface
South bridge
Slow IO devices
Network
WE HAVE COURSES THAT TARGET THE DESIGN OF THESE COMPONENTS slide 4
CLASSICAL COMPUTER ORGANIZATION
GENERIC HIGH-END PARALLEL SYSTEM:
Disk
I/O Bus
M
NI
C
INTERCONNECTION
NI
System busses
M C M
NI
C
P P P
MAJOR COMPONENTS: PROCESSOR, MEMORY SYSTEMS, I/O AND NETWORKS,
MULTIPROCESSORS--CHIP MULTIPROCESSORS
TARGETS: DESIGN OF PCs, WORKSTATIONS, LARGE SCALE SERVERS, DATA
CENTERS slide 5
EXTENSIONS TO CLUSTERS, DATA CENTERS AND CLOUD
COMPUTING
Distributed
Computing
High –Perf.
Computing
P2P
Clusters
GRID/
Cloud
Web
Services slide 6
FACULTY IN COMPUTER ARCHITECTURE
•
MURALI ANNAVARAM, ASSISTANT PROFESSOR
•
TECHNOLOGY, MICROARCHITECTURE, DATA CENTERS, WIRELESS
•
MICHEL DUBOIS, PROFESSOR
•
MICROARCHITECTURE, MULTIPROCESSORS, MEMORY SYSTEMS
•
KAI HWANG, PROFESSOR
•
DISTRIBUTED PROCESSING, CLUSTERS, SECURITY, DATA CENTERS, WIRELESS
•
TIMOTHY PINKSTON, PROFESSOR
•
INTERCONNECTION NETWORKS
•
VIKTOR PRASANNA, PROFESSOR
•
VLSI AND FPGA ARCHITECTURES, MAPPING OF ALGORITHMS ON ARCHITECTURE
•
GANDHI PUVVADA, PROFESSOR OF ENGINEERING PRACTICE
•
MONTE UNG, PROFESSOR OF ENGINEERING PRACTICE slide 7
COURSES IN COMPUTER ARCHITECTURE AVAILABLE FOR
EE CREDIT TO MS STUDENTS
400 LEVEL AND ABOVE ONLY.
EE454L--INTRODUCTION TO SYSTEM DESIGN USING MICROPROCESSORS
EE457--COMPUTER SYSTEMS ORGANIZATION
EE554-- REAL TIME COMPUTER SYSTEMS
EE557--COMPUTER SYSTEMS ARCHITECTURE
EE560--DIGITAL SYSTEM DESIGN: TOOLS AND TECHNIQUES
EE653--ADVANCED TOPICS IN MICROARCHITECTURE
EE657--PARALLEL AND DISTRIBUTED COMPUTING
EE659--INTERCONNECTION NETWORKS
EE677--VLSI ARCHITECTURES AND ALGORITHMS slide 8
COMPUTER ARCHITECTURE COURSES: FLOWCHART
400 LEVEL
EE 454L
INTRODUCTION TO
SYSTEM DESIGN
USING MICROPROCESSORS
500 LEVEL
EE 554
REAL TIME COMPUTER
SYSTEMS
600 LEVEL
EE 653
ADVANCED TOPICS IN
MICROARCHITECTURE
EE 659
INTERCONNECTION
NETWORKS EE 457
COMPUTER SYSTEMS
ORGANIZATION
EE 557
COMPUTER SYSTEMS
ARCHITECTURE
EE 560
DIGITAL SYSTEMS
DESIGN: TOOLS AND
TECHNIQUES
EE 657
PARALLEL AND
DISTRIBUTED
COMPUTING
EE 677
VLSI ARCHITECTURES
AND ALGORITHMS CSCI455
INTRODUCTION TO
PROGRAMMING SYSTEM
DESIGN
CSCI503
PARALLEL PROGRAMMING
CSCI402
OPERATING SYSTEMS
CSCI565
COMPILER DESIGN slide 9
DEGREE OPTIONS
MASTER OF SCIENCE IN ELECTRICAL ENGINEERING
HIGHLIGHTS:
TOTAL OF 27 UNITS (IN GENERAL, THIS MEANS NINE COURSES)
•
3.0 GPA
•
NO MORE THAN 3 COURSES OR 12 UNITS AT THE 400 LEVEL
•
AT LEAST 18 UNITS AT THE 500 OR 600 LEVEL
•
AT LEAST 18 UNITS IN ELECTRICAL ENGINEERING
•
AT LEAST 21 UNITS IN THE SCHOOL OF ENGINEERING
MOST FLEXIBLE
MUST STAY FOCUSSED
GENERIC EE DEGREE, NOT CENG NOR ARCHITECTURE
THESIS OPTION slide 10
DEGREE OPTIONS
MASTER OF SCIENCE IN COMPUTER ENGINEERING
HIGHLIGHTS:
TOTAL OF 27 UNITS
•
3.0 GPA
•
15 UNITS IN ELECTRICAL ENGINEERING
•
ENTRANCE REQUIREMENTS: CSCI 455 AND EE 357
•
FUNDAMENTAL COURSES: CSCI 402, EE450 or 465, EE457, EE477 (PLACEMENT EXAM OR
WAIVER)
•
CORE: EE 550 or EE 555, EE557, EE577a (PICK 2 OUT OF 3)
•
AT LEAST 6 UNITS FROM A LIST OF ELECTIVES IN EE AND CSCI
FLEXIBILITY IS LIMITED TO 2 COURSES
DEGREE IS SPECIFIC TO COMPUTER ENGINEERING
THESIS OPTION slide 11
EE454L:INTRODUCTION TO SYSTEM DESIGN USING
MICROPROCESSORS
HARDWARE DESIGN OF A MICROPROCESSOR-BASED SYSTEM
INTERFACING OF MEMORY AND I/O TO 8/16/32 BIT PROCESSORS
I/O CHIPS, INTERRUPT AND DMA CONTROLLERS
ASYNCHRONOUS AND SYNCHRONOUS SRAMs AND DRAMs
OFFERED EVERY SEMESTER
EE457: COMPUTER SYSTEMS ORGANIZATION
THE PREREQUISTE FOR EE557 AND OTHER 500-LEVEL COURSES
•
CAN ONLY BE WAIVED BY TAKING THE PLACEMENT EXAM
TOP SENIOR LEVEL CLASS IN COMPUTER ARCHITECTURE
UNDERSTANDING OF THE WORKING OF A CPU AT THE LOGIC DESIGN LEVEL,5-
STAGE PIPELINE AND SPECULATIVE OoO EXECUTION, MEMORY HIERACHIES
OFFERED EVERY SEMESTER slide 12
EE557: COMPUTER SYSTEMS ARCHITECTURE
FLAGSHIP GRADUATE COURSE IN COMPUTER ARCHITECTURE AT USC
A PREREQUISITE FOR ALL ADVANCED (600) COURSES AND NECESSARY FOR
ANY RESEARCH IN ARCHITECTURE (DIRECTED RESEARCH)
COVERS VARIOUS PARALLEL PARADIGMS SUCH AS DEEP PIPELINING,
SPECULATIVE EXECUTION, VLIW, INTERCONNECTIONS, HIGHLY
CONCURRENT MEMORY SYSTEMS, MULTIPROCESSORS, COHERENCE AND
CONSISTENCY MODELS, SYNCHRONIZATION
OFFERED EVERY SEMESTER
EE554: REAL-TIME COMPUTER SYSTEMS
STRUCTURE OF REAL-TIME COMPUTER SYSTEMS
ANALOG SIGNALS AND DEVICES;
SCHEDULING, SYNCHRONIZATION, RELIABILITY, AVAILABILITY
REAL-TIME O/S AND LANGUAGES
OFFERED IN SPRING SEMESTERS slide 13
EE560: DIGITAL SYSTEM DESIGN: TOOLS AND
TECHNIQUES
DEALS WITH HARDWARE ARCHITECTURE AND IMPLEMENTATION OF COMPLEX
HARDWARE SYSTEMS
CRITICAL TO UNDERSTANDING HOW A COMPLEX ARCHITECTURAL-LEVEL
DESIGN CAN BE TRANSLATED INTO AN ACTUAL HARDWARE DESIGN
OFFERED EVERY SUMMER
EE653: ADVANCED TOPICS IN MICROARCHITECTURE
CHIP MULTIPROCESSORS AND CORE MULTITHREADING
ADVANCED TECHNIQUES TO EXPLOIT ILP
IMPACT OF TECHNOLOGY (POWER, RELIABILITY, WIRE-DELAY)
IMPACT OF TECHNOLOGY SCALING
PARALLEL PROGRAMMING SUPPORT
USUALLY EVERY FALL SEMESTER slide 14
EE657: PARALLEL AND DISTRIBUTED COMPUTING
SUPERCOMPUTING,
NETWORK-BASED COMPUTING,
PARALLEL PROCESSING,
GRID COMPUTING
CLOUD COMPUTING
OFFERED IN SPRING SEMESTERS
EE659: INTERCONNECTION NETWORKS
EFFICIENT COMMUNICATION WITHIN A CHIP AND BETWEEN CHIPS
DESIGN AND ANALYSIS OF STATE-OF-THE-ART INTERCONNECTIONS
EMPHASIS ON RELIABILITY, ENERGY EFFICIENCY AND PERFORMANCE
NETWORK SWITCHING, FLOW CONTROL, ROUTING, DEADLOCK HANDLING,
ARBITRATION AND SCHEDULING
OFFERED IN SPRING SEMESTERS slide 15
EE677: VLSI ARCHITECTURES AND ALGORITHMS
STUDY VLSI ARCHITECTURE AND ALGORITHMS
EVALUATE VARIOUS ARCHITECTURES, MAPPING TECHNIQUES TO
UNDERSTAND PERFORMANCE
IMPLEMENTATIONS USING FPGAs
RECONFIGURABLE COMPUTING
OFFERED IN FALL SEMESTERS
OPERATING SYSTEMS (CSCI402 AND 555),
COMPILERS (CSCI 565 AND 595) AND
PARALLEL PROGRAMMING (CSCI 503)
slide 16
JOB OPPORTUNITIES
USC COMPUTER ARCHITECTS ARE VERY MUCH SOUGHT AFTER IN INDUSTRY
AND HAVE A REPUTATION FOR THEIR HARDWARE DESIGN SKILLS.
COMPANIES SUCH AS
•
INTEL
•
AMD
•
SUN MICROSYSTEMS (ORACLE)
•
IBM
•
TEXAS INSTRUMENTS
•
BROADCOM
•
QUALCOM
•
SAMSUNG
•
STARTUPs AND LOTS OF SMALLER COMPANIES
WHY SO MUCH NEED FOR COMPUTER ARCHITECTS???
•
EACH COMPANY HAS MANY PROJECTS IN PARALLEL TO DESIGN ITS NEXT PRODUCT
•
PROJECT TIMELINES ARE PIPELINED
•
MOST OF THESE PROJECTS ARE (SADLY) ABORTED
•
EACH ENGINEER FOCUSSES ON A SMALL PART OF THE OVERALL SYSTEM
•
VERIFICATION, VERIFICATION, VERIFICATION slide 17