Single Stage BJT Amplifiers: Common Base By Henry Lin and Hani

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Single Stage BJT Amplifiers: Common
Base
By Henry Lin and Hani Mehrpouyan
1 Objective
Even though the common emitter amplifier has an extremely high gain, its high output impedance
prevents it from properly driving the speaker. In this lab, we will investigate the properties of two other
single-stage amplifier configurations: the common collector (CC) and the common base (CB). You will be
applying the techniques learned from before to evaluate the input impedance, output impedance, and
gain for both of these amplifier configurations. By the end of this lab, you should be able to model any
single stage amplifier using its two-port model as well as identify the strengths and weaknesses of each
single-stage amplifier configuration.
2 Procedure
2.1 The Common Base Amplifier
For a common base amplifier using an NPN BJT, the input is applied to the emitter and the output is
taken
from the collector. For the NPN BJT, we will be using the Q2N3904 in PSpice and 2N3904 on hardware.
We will not be using Multisim, but 2N3904 is also on Multisim. A similar component is 2N4401 in Multisim
and 2N4401 on hardware, but they will not be used.
1. Similar to the CE amplifier, the CB amplifier can also be used as a voltage amplifier. Set up the
configuration in PSpice as shown in the figure below. Let VCC = 12 V, RC = 1 k, and VB = 640 mV.
2. Measuring Gain Using PSPICE: Perform a DC sweep of VIN from −1 V to 1 V and plot VOUT vs. VIN. VIN
should be modeled with Vdc. Find the voltage gain using the slope at VIN = 0 V (when the input has no
DC offset). Use one cursor right before the point at 0V and one cursor after the point at 0V. Then, you can
find the slope. Another method is to plot VOUT vs time and VIN vs time. With Pspice, you need to model VIN
with Vsin. Use an amplitude of 0.1V and frequency of 60 Hz. The gain is the peak-to-peak amplitude of
VOUT divided by the peak-to-peak amplitude of VIN. Explain why the gain from DC sweep method is
different from the gain from transient method. Hint: The transient method includes saturation.
3. Measuring Input Resistance: For a DC input bias of 0 V, find the input resistance by sweeping VIN from
−0.2 V to 0.2 V and plotting IIN. VIN should be modeled with Vdc. Hint: The inverse slope of the IIN vs. VIN
curve (at a particular VIN value) corresponds to the input resistance of the amplifier (when biased to that value of
VIN). If necessary, please zoom in on your plot to get a proper reading of the input resistance. Another method is to
plot –V(Q1:e)/I(Q1:e) vs time. With Pspice, you need to model VIN with Vsin. Use an amplitude of 0.1V
and frequency of 60 Hz. Explain why the input resistance from both methods are different. Hint: In the
transient method, there is saturation. That is why it goes so high.
4. Measuring Output Resistance: Now, attach a 10 μF AC coupling capacitor and a 10 k potentiometer at the
output as shown in the figure above. (If you have never used a potentiometer before, please refer to the
next figure.) In this example, the potentiometer is used to simulate a load for the amplifier to drive.
Decrease the amplitude of the input signal until it is back to 200 mVpp. Adjust the resistance of the
potentiometer so that the peak-to-peak amplitude of the signal across the potentiometer is exactly half of
the output peak-to-peak amplitude when no load is attached. Since the output peak-to-peak amplitude
when no load is attached is 12V, half of it is 6V. Do this with a parametric sweep of the resistance of the
potentiometer. The resistance of the potentiometer at this point will be equal to the output resistance of
the amplifier. What is the value of the output resistance? To see what value is the output resistance, right
click on the graph and do trace information. Why is the capacitor necessary? Hint: Consider the DC bias.
Try removing the capacitor and finding the output resistance again. Why does this method work in
measuring the output resistance? (Hint: Model the output resistance as being in series with the potentiometer
and then apply the voltage divider formula.)
A typical 10 k potentiometer: the variable resistance can only be measured between two adjacent pins;
the resistance measured between the leftmost and rightmost pins is constant.
5. Now, try building the circuit on hardware and doing the transient method in step 2. Use the bench DC
power supply for VCC = 12 V and VB = 640 mV. For VB, measure power supply with multimeter and get as
close to 0.64V as possible. Also, use the bench function generator for VIN. Set the bench function
generator to an amplitude of 0.2 Vpk-pk and frequency of 60 Hz. Then, use the bench oscilloscope to
view the output and input voltages. Find the gain. Like before, the gain is the peak-to-peak amplitude of
VOUT divided by the peak-to-peak amplitude of VIN. Verify the gain with PSpice. Don’t forget that the
waveform generator has an output impedance of 50Ω, and that this output impedance will influence your
measurements. In PSpice, include the 50Ω with Vsin. You should already see clipping. Try to adjust the
settings so there is no clipping. The output should have no clipping when VB = 1V. The input should have
no clipping if VB is less than 0.6V.
6. Do the hardware of step 4. Do not use C and RL. Measure the peak-to-peak voltage at the collector of
the BJT. Now, add C and RL. The negative side (shorter lead) of the 10 μF capacitor should be connected
to RL. Measure VOUT across RL. Adjust the potentiometer until the peak-to-peak voltage across RL is half
of the peak-to-peak voltage when there was no C or RL. The resistance of the potentiometer at this point
will be equal to the output resistance of the amplifier. Verify the output resistance with PSpice. Don’t
forget that the waveform generator has an output impedance of 50Ω, and that this output impedance will
influence your measurements. In PSpice, include the 50Ω with Vsin.
7. Submit a lab report for the software section and another report for the hardware part.
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