Single Stage BJT Amplifiers: Common
Collector
By Henry Lin and Hani Mehrpouyan
1 Objective
Even though the common emitter amplifier has an extremely high gain, its high output impedance prevents it from
properly driving the speaker. In this lab, we will investigate the properties of two other single-stage amplifier
configurations: the common collector (CC) and the common base (CB). You will be applying the techniques learned
from before to evaluate the input impedance, output impedance, and gain for both of these amplifier configurations.
By the end of this lab, you should be able to model any single stage amplifier using its two-port model as well as
identify the strengths and weaknesses of each single-stage amplifier configuration.
2 Procedure
2.1 The Common Collector Amplifier
For a common collector amplifier using an NPN BJT, the input is applied to the base while the output is taken from
the emitter. Before we begin, there is a chance that your transistor will heat up during this experiment; if that is the
case, please substitute a 51 k resistor for RS. For the NPN BJT, we will be using the Q2N3904 in PSpice and
2N3904 on hardware. We will not be using Multisim, but 2N3904 is also on Multisim. A similar component is
2N4401 in Multisim and 2N4401 on hardware, but they will not be used.
1. Build the circuit shown in the figure below, a common collector amplifier with no load attached. Let R1 = 1 k,
R2 = 891 , RS = 10 k, RE = 100 , C = 10 μF, and VCC = 12 V. Hint: To form the 891 resistance, note that 510 //2 k =
406 , 510 //10 k = 485 , and resistances in series sum up to form one equivalent resistance. Before you build the
circuit, consider this tip that may save you a lot of time: Build the biasing network at one end of the breadboard and
build the CC amplifier at the other end. Then, use a wire to connect or disconnect the two parts. Such a setup will
help facilitate your measurements, especially for the one on input resistance.
2. Now find the output voltage swing, voltage gain, input impedance, and output impedance.
3. To find the output voltage swing, plot VOUT vs time. With Pspice, you need to model VIN with Vsin. Use an
amplitude of 0.1V and frequency of 60 Hz. Increase the amplitude of the input signal until the output waveform is
clipped (flattened) on the top and bottom. Why does clipping happen at the top? Why does it happen at the bottom?
Approximately how large can the output waveform be without clipping? This maximum peak-to-peak voltage of
VOUT is the output voltage swing. You can change the step size (e.g. to 0.00001) and run time (e.g. to 0.1s) to see the
clipping more clearly.
4. To find the voltage gain, plot VOUT vs time and VIN vs time. With Pspice, you need to model VIN with Vsin. Use
an amplitude of 0.1V and frequency of 60 Hz. The peak-to-peak amplitude of VOUT divided by the peak-to-peak
amplitude of VIN is the gain.
5. To find the input imedance, plot –V(Q1:b)/I(Q1:b) vs time. With Pspice, you need to model VIN with Vsin. Use
an amplitude of 0.1V and frequency of 60 Hz.
6. To find the output impedance, attach a 10 μF AC coupling capacitor and a 10 k potentiometer at the output.
Decrease the amplitude of the input signal until it is back to 20 mVpp. Adjust the resistance of the potentiometer so
that the amplitude of the signal across the potentiometer is exactly half of the output voltage swing that you found in
step 3. Do this with a parametric sweep of the resistance of the potentiometer. The resistance of the potentiometer at
this point will be equal to the output resistance of the amplifier. What is the value of the output resistance? To see
what value is the output resistance, right click on the graph and do trace information. Why is the capacitor
necessary? Try removing the capacitor and finding the output resistance again.
7. Another name for the CC amplifier is the emitter follower. Based on the gain that you have found, why do you
think it is given this name?
A typical 10 k potentiometer: the variable resistance can only be measured between two adjacent
pins; the resistance measured between the leftmost and rightmost pins is constant.
8. Do step 3 on hardware. The transistor and emitter resistor can get hot, so do not turn on the instruments to power
the components a long time. Use the bench DC power supply for VCC = 12 V. Also, use the bench function generator
VIN. Set the bench function generator to an amplitude of 0.2 Vpk-pk and frequency of 60 Hz.Then, use the bench
oscilloscope to view the output voltage. Verify the output voltage swing on PSpice with 50Ω added with Vsin.
9. Now, try building the circuit on hardware and doing step 4. Use the bench DC power supply for VCC = 12 V.
Also, use the bench function generator VIN. Set the bench function generator to an amplitude of 0.2 Vpk-pk and
frequency of 60 Hz.Then, use the bench oscilloscope to view the output and input voltages. Find the gain. Again, the
gain is the peak-to-peak amplitude of VOUT divided by the peak-to-peak amplitude of VIN. Try to adjust the settings
so there is clipping. When VCC is less than VINpk-pk there is clipping on the lower portion of VOUT. Verify the
results with PSpice. Don’t forget that the waveform generator has an output impedance of 50Ω, and that this output
impedance will influence your measurements. In PSpice, include the 50Ω with Vsin.
10. Do the hardware of step 6. Do not use C and RL. Measure the peak-to-peak voltage at the emitter of the BJT.
Now, add C and RL. The negative side (shorter lead) of the 10 μF capacitor should be connected to RL. Measure
VOUT across RL. Adjust the potentiometer until the peak-to-peak voltage across RL is half of the peak-to-peak
voltage when there was no C or RL. The resistance of the potentiometer at this point will be equal to the output
resistance of the amplifier. Verify the output resistance with PSpice. Don’t forget that the waveform generator has
an output impedance of 50Ω, and that this output impedance will influence your measurements. In PSpice, include
the 50Ω with Vsin.
11. Submit a lab report for the software section and another report for the hardware part.