Simulation and Analysis of Cascaded H

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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 4, April 2013)

Simulation and Analysis of Cascaded H-Bridge Multilevel

Inverter using Single DC source

Jigar Patel

1

, Raj Kapadia

2

, Darshan Patel

3

1,2

PG Students,

3

Assistant Professor, Electrical Department, Sankalchand Patel College of Engineering-Visnagar,

Gujarat, India

Abstract – Cascaded H-Bridge multilevel inverter is a promising topology and provides alternative way for converters that are used in grid connected photovoltaic, wind power generation and in motor drive. Output power can be expanded simply with modularity and control. Though it has wide application area and tremendous merits, it has greater disadvantage that it uses separate DC supply for each H-

Bridge. CMI with single phase transformer and single DC source is proposed for ensure high quality output power waveform. Compared to conventional topology of CMI, proposed topology provides minimization in cost in terms of

THD, losses and filter size. Switching angles are calculated for Selective harmonic elimination techniques. Newton–

Raphson’s method is used to solve non-linear equations of the system.

Index Terms— Multilevel inverter, SPWM, Selective

Harmonic Elimination PWM (SHE-PWM), Total Harmonic

Elimination (THD %)

Three major multilevel structures have been reported in literature [2], which are as follows: Diode clamped multilevel inverter (DCMLI), Flying capacitor multilevel inverter (FCMLI), and Cascaded multilevel inverter

(CMI). Most converters are chosen on the basis of component count, because it directly affect the cost factor and reliability. On comparing CMI topology with DCMLI and FCMLI shows that CMI requires least number of components and its dominant merit is circuit layout with flexibility.

According to recent survey CMLI is extensively used in high power application. Although this MLI topology is more preferable still there are some aspects that require further development and research. The primary issue strike with conventional CMLI is that it uses separate DC source for each H-Bridge. On other hand new version is proposed

[3], which employs single DC source with isolation transformers. In this paper, three switching techniques namely, fundamental frequency, selective harmonic elimination and sine PWM are investigated in PSIM environment to explore potential of proposed CMI.

I NTRODUCTION

In recent year industries have begun to demand high power equipment, which is now reached to megawatt level.

Voltage source inverter that converts electric power from

DC to AC with level + V dc

, 0, and V dc

. Converted AC can be at any required voltage and frequency. Output of VSI is square wave, which contains several harmonics. For high power, high voltage application power rating and stresses across semiconductor are increased. As a result, a MLI structure is introduced as a alternative. It is easier to produce high power, high voltage in multilevel structure.

Increasing the number of voltage level without requiring higher rating on individual semiconductor can increase the power rating [1]. Multilevel topologies present numerous advantages with compared to conventional two level inverter such as high power quality waveforms, low switching losses, high voltage capability, low electromagnetic compatibility etc. During few decades many multi level topologies have been proposed.

Contemporary research has engaged novel inverter topology and unique modulation strategy.

G ENERAL C ASCADED H-B RIDGE M ULTILEVEL I NVERTERS

Fig.1 shows a circuit configuration and waveforms of a conventional cascaded H-bridge multilevel inverter composed of three H-bridge cells. Since this topology consists of series of power conversion cells, the power and voltage level may be easily scaled. It generates seven levels in the output voltage. The output voltage is pile of low voltages which are generated by series connected Hbridge [4]. By proper switching action of semiconductors of each H-bridge of the cascaded H-bridge multilevel inverter voltage can be synthesized. The output voltage is the sum of the output voltage generated by each H-bridge cell. Numerous merits have been figured out using this topology [5], which are extensively used in medium and high power applications. Output phase voltage can be expressed as V out

= v

1

+ v

2

+ bridge is connected in series. v

3.

This is because each H-

633

International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 4, April 2013)

Minimum harmonic distortion can be achieved by controlling the conducting angles of the switch at different level. However the greatest limitation of this inverter is it uses the separate DC source for each H-bridge module, that not only increases the cost but also affect the reliability of the system.

III.

C ASCADED H-B RIDGE M ULTILEVEL I NVERTER U SNIG

S INGLE D C S OURCE

Fig.2 shows the circuit configuration for proposed cascaded H-bridge multilevel inverter with single DC source. Three H-bridge module are connected to same DCsource input. Single phase Isolation transformers are used to isolate each H-bridge from AC output. Primary of each transformer is connected to the each H-bridge module and secondary of the each of the transformer is connected in series to aggregate the level in the output voltage waveforms. Therefore in this configuration, the output voltage becomes the sum of the terminal voltages of each

H-bridge module. This topology presents the characteristic that the power of the DC source must be bigger than the

DC sources in the conventional cascade topology, because of the high current level.

(a) (b)

Fig.1 configuration of cascaded H-bridge multilevel inverter with separate DC source and output voltage waveform

This type inverter exhibits higher degree in modularity and possible to connect directly to the medium and high power applications [3].

The flexibility of the system is maintained, and the number level voltages can be increased easily. In this topology must be considered that the switching devices support the DC voltage source and the phase current [3].In this configuration many variant based on single DC source are presented by different authors [3]-[7] using different modulation techniques. This configuration use only single

DC source which is larger than in any other MLI. If proper switching angle for semiconductor switch is not selected, there may be a possibility for short circuit of DC source.

Therefore appropriate switching techniques must be selected when deal with single DC source configuration. In practice the performance of this configuration is just identical to the separate DC source MLI. On observing the output voltage its Performance is extremely fine and fairly good and attractive []. Greatest limitation is that it uses large number of transformer, so the size of the converter will increase for each additional level in the output voltage level.

634

International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 4, April 2013)

Va

100

THD = 105 %

THD = 17 %

50

0

-50

-100

0 0.01

0.02

0.04

0.03

Time (s)

Detail of output phase voltage (scale: 100V/div)

Time scale: 1ms/div

0.05

300

Va

0.06

200

100

0

-200

0 0.01

0.02

0.04

0.03

Time (s)

Detail of output phase voltage (scale: 100V/div)

Time scale: 1ms/div

0.05

60

Va

200 400 800 600

Frequency (Hz)

FFT spectrum of the output phase voltage

1000

500 1000

Frequency (Hz)

FFT spectrum of the output phase voltage

1200

200

100

0

-100

-200

-300

0

Fig.2 Detail of cascaded MLI with single DC source

A. simulation and results of cascaded H-bridge multilevel inverter using single DC source

Using Sinusoidal PWM technique, simulation of three phase seven level cascaded H-bridge multilevel inverter using single DC source is carried out in PSIM environment.

Va

300

0.01

0.02

0.04

0.03

Time (s)

Detail of output phase voltage (scale: 100V/div)

Time scale: 1ms/div

0.05

0.06

200

Va

100

0

-100

150

Va

100

50

0

40

20

1500

0.06

635

0

500 1500

Frequency (Hz)

1000

FFT spectrum of the output phase voltage

Fig.3 simulation results for cascaded H-bridge multilevel inverter using single DC source with single phase transformers by using sinusoidal PWM technique at modulation index 1, 0.5, 0.2 (from top to bottom)

International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 4, April 2013)

H-bridge modules are set to operate at a switching frequency of 5 kHz. Fig.3 highlights the performance the performance of the proposed cascaded H-bridge multilevel inverter using single DC source at different modulation indexes. By observing, it is clear that output voltage waveform are very close to sinusoidal at modulation index

1 and the corresponding FFT spectrum signifies complete elimination of lower order harmonics. For lower modulation indexes the performance is disaster compared to higher modulation indexes. FFT spectrum specifies the presence of low order harmonic such as 3, 5, 7, 11, 13 and

15. Furthermore the SPWM technique is quite impressive and promising with compared to other technique.

Where, n

(5)

=

Where N is the number of switching angle per quarter, and is the switching angles, which must satisfy the following condition:

(6)

IV.

M ULTILEVEL S HEPWM T ECHNIQUE

The selective harmonic elimination has a theoretical potential to achieve the highest output power quality at low switching frequencies in comparison with other methods.

Due to mathematical complexity this method is less preferred.

But still this method is effective in suppressing lower order harmonics in the system.

The elimination of loworder harmonics is an important issue in many applications. When high switching efficiency is of utmost importance, it is desirable to keep the switching frequency much lower. Selective harmonic elimination (SHE) techniques were introduced and some other SHEPWM techniques were presented in [8]-[9]. But in the present case we adopt the SHEPWM for CMI with single phase transformer.

Consider generalized three-level SHEPWM as shown in

Fig.3 and let N be the number of chopped switching angle per quarter cycle. The output waveform is assumed to be odd quarter wave symmetry, the DC component and even harmonics are not presents, and are equals to zero [3].

Fourier series of the three-level SHE PWM can be written as

V out

( ) = sin (n )

E is the amplitude of the dc source and n is the harmonic order. The entire prospect is for only single module and to extend further switching, phase shifting is carried out for each subsequent series modules. Switching for each H-bridge module is obtained by solving the set of non-linear equations. Herein N is considered as three therefore basic quarter waveform is chopped at three instants. To obtain switching angle consider following inequalities.

For each module, the generalized expression including phase shift angle β is defined by:

1

= [cos (nα

1

) – cos (nα

2

) + cos (nα

3

) +…+ cos (nα k

)]

(7)

2

= [cos n(α

1

-β) – cos n(α

2

-β)

+ cos n(α

3

-β) +…+ cos n(α k

-β)]

(8)

3

= [cos n(α

1

+β) – cos n(α

2

+β)

+ cos n(α

3

+β) +…+ cos n(α k

+β)]

(9)

By solving above inequalities α

1

, α

2

, α

3

, …, α k values are obtained. For other two phases 120

°

apart is considered. The Newton-Raphson method is used to solve above inequalities [3][8]. As the number of chopping angles is low, switching losses also drastically reduced.

Here 1, 5, 7 are considered for chopping.

Generalized equations for finding switching angle of first H-bridge module are illustrated as follows: cos(α

1

) - cos(α

2

) + cos(α

3

) = 3M(π/4) cos(5α

1

) - cos(5α

2

) + cos(5α

3

) = 0 cos(7α

1

) - cos(7α

2

) + cos(7α

3

) = 0

(10)

For solving above Equation Newton-raphson’s method is applied:

Fig.3 Details of generalized three-level SHEPWM waveform

636

International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 4, April 2013)

Steps for Newton-Raphson method:

1) Initial guess for switching angle matrix,

α° = [α1 α2 α3] T

2) Calculate the matrix F,

F°=F(α°) =

3) Calculate Jacobean matrix as below,

[df/dα]°=

4) Corresponding harmonic amplitude matrix,

T = [ 3M(π/4) 0 0 ]

T

Find, (dα)° = INV [ (df /dα)]° * (T - F° )

Where,

INV [(df /dα)]° is inverse matrix of [(df /dα)]°

5) Update initial value,

α

(j+1)

= α j

+ dα j

6) Repeat step from step-[2] to step-[5] until dα j

is satisfied the desired degree of accuracy.

The remaining switching angle are solved in similar manner [3], but by including angle β.

V.

C ONCLUSION

Cascaded H-bridge MLI has tremendous advantage in terms of harmonic contents and simple structure and lower switching losses. It can be seen by simulation and THD analysis, as the voltage level is increased it lower the harmonic distortion from the output of the CHB MLI.

Higher quality of waveform is achieved by using Precalculated switching techniques as SHE-PWM desired order of harmonic can be eliminated.

REFERENCES

[1] Muhammad H. Rashid, Power Electronics, circuit, devices, and application Third Edition, pp.253-255.2009.

[2] José Rodríguez, Jih-Sheng Lai, “Multilevel Inverters: A Survey of

Topologies, Controls, and Applications,” IEEE Transactions on

Industrial Electronics, vol. 49, no. 4, pp.724-738, AUG-2002.

[3]

Y. Suresh A.K. Panda, “Research On A Cascaded Multilevel

Inverter By Employing Three-Phase Transformers”, IET Power

Electronics, vol.no.5, Iss.5, pp. 561–570, JULY 2012.

[4] Anup Kumar Panda, Y Suresh, “Research On Cascade Multilevel

Inverter With Single Dc Source By Using Three-Phase

Transformers”, IET Power Electronics, Electrical Power And

Energy System, vol-40, pp.9-20, 2012.

[5]

Sung Geun Song, “Cascaded Multilevel Inverter Employing Three-

Phase Transformers and Single DC Input”, IEEE Transactions On

Industrial Electronics, vol. 56, no. 6, JUNE 2009.

[6] Zhong Du, Leon M.Tolbert, “A Cascade Multilevel Inverter Using a Single DC Source”, Applied Power Electronics Conference And

Exposition, pp.426-430, OCT-2006.

[7]

Ramirez S, Cardenas V, Rodolfo Echavarria, “Cascade Multilevel

Inverter With Only One Dc Source”, Power Electronics Congress, pp.171-176, OCT-2002.

[8] T Tang, J Han, X Tan, IEEE ISI 2006, “Selective Harmonic

Elimination for a Cascade Multilevel Inverter”, Industrial

Electronics, IEEE International Symposium, pp.977-991, JULY

2006.

[9] J. Napoles, Member, A. J. Watson, P. W. Wheeler, “Selective

Harmonic Mitigation Technique for Cascaded H-Bridge Converters with Non-Equal DC Link Voltages ”, IEEE Journal, vol. 23, no. 4,

2011.

[10]

O. L. Jimenez, R. A. Vargas and J. Aguayo, “THD in Cascade

Multilevel Inverters Symmetric and Asymmetric”, Robotics and

Automotive Mechanics Conference, IEEE computer society, pp.289-295, 2011.

[11] Li Li, Dariusz Czarkowski, Member, Y Liu, and Pragasen Pillay,

“Multilevel Selective Harmonic Elimination PWM Technique in

Series-Connected Voltage Inverters”, IEEE Transactions on

Industry Applications, vol. 36, no.1, JAN/FEB 2000.

[12] Vassilios G. Agelidis, Anastasios I. Balouktsis, and Mohamed S.

A. Dahidah, “A Five-Level Symmetrically Defined Selective

Harmonic Elimination PWM Strategy: Analysis and Experimental

Validation”, IEEE Transactions On Power Electronics, vol. 23, no.

1, JANUARY 2008.

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