PD 9.1402
PRELIMINARY
IRFR/U5305
HEXFET® Power MOSFET
l
l
l
l
l
l
Ultra Low On-Resistance
Surface Mount (IRFR5305)
Straight Lead (IRFU5305)
Advanced Process Technology
Fast Switching
Fully Avalanche Rated
D
VDSS = -55V
RDS(on) = 0.065Ω
G
ID = -25A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The D-Pak is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
D -P a k
T O -2 52 A A
I-P a k
TO -2 5 1 A A
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current †
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚†
Avalanche Current†
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt Ġ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
-25
-16
-110
69
0.56
± 20
280
-16
6.9
-5.8
-55 to + 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient**
Typ.
Max.
Units
–––
–––
–––
1.8
50
110
°C/W
IRFR/U5305
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-55
–––
–––
-2.0
8.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
∆V(BR)DSS/∆TJ
I GSS
Typ. Max. Units
Conditions
––– –––
V
VGS = 0V, ID = -250µA
-0.034 ––– V/°C Reference to 25°C, ID = -1mA
––– 0.065
Ω
VGS = -10V, ID = -15A „
––– -4.0
V
VDS = VGS, I D = -250µA
––– –––
S
VDS = -25V, I D = -16A†
––– -25
VDS = -55V, VGS = 0V
µA
––– -250
VDS = -44V, VGS = 0V, TJ = 150°C
––– 100
V GS = 20V
nA
––– -100
VGS = -20V
––– 63
ID = -16A
––– 13
nC VDS = -44V
––– 29
VGS = -10V, See Fig. 6 and 13 „†
14 –––
VDD = -28V
66 –––
I D = -16A
ns
39 –––
RG = 6.8Ω
63 –––
RD = 1.6Ω, See Fig. 10 „†
D
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
7.5 –––
and center of die contact
S
1200 –––
VGS = 0V
520 –––
pF
VDS = -25V
250 –––
ƒ = 1.0MHz, See Fig. 5†
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) †
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
–––
–––
-25
–––
–––
-110
–––
–––
–––
–––
71
170
-1.3
110
250
A
V
ns
nC
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
TJ = 25°C, IS = -15A, V GS = 0V „
TJ = 25°C, IF = -16A
di/dt = -100A/µs „†
Notes:
 Repetitive rating; pulse width limited by
This is applied for I-PAK, LS of D-PAK is measured between
max. junction temperature. ( See fig. 11 )
lead and center of die contact
‚ VDD = -25V, starting TJ = 25°C, L = 2.3mH † Uses IRF5305 data and test conditions.
RG = 25Ω, IAS = -16A. (See Figure 12)
ƒ ISD ≤ -16A, di/dt ≤ -280A/µs, VDD ≤ V(BR)DSS ,
TJ ≤ 150°C
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
* When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
** Uses typical socket mount
D
S
IRFR/U5305
1000
1000
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
-ID , D ra in -to -S o u rce C u rre n t (A )
-ID , D ra in -to -S o u rce C u rre n t (A )
100
10
-4.5 V
2 0µ s PU LS E W ID TH
T c = 2 5°C
A
1
0.1
VGS
- 15V
- 10V
- 8. 0V
- 7. 0V
- 6. 0V
- 5. 5V
- 5. 0V
BOTTOM - 4.5V
TOP
TOP
1
10
100
10
-4.5 V
2 0µ s PU L SE W ID TH
T C = 1 50 °C
1
100
0.1
1
-VD S , Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics,
TJ = 150oC
2.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
-I D , D rain -to- S our ce C urr ent ( A )
100
TJ = 2 5° C
TJ = 1 5 0 °C
10
V DS = -2 5 V
2 0 µ s P U L S E W ID T H
4
5
6
7
8
9
-VG S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
A
100
-VD S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics,
TJ = 25oC
1
10
10
A
I D = -25 A
1.5
1.0
0.5
VG S = -10 V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
T J , Junction T emperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFR/U5305
20
C , C a p a c ita n c e (p F )
2000
C is s
V GS
C is s
C rs s
C o ss
= 0 V,
f = 1M H z
= C gs + C gd , Cds SH O RTE D
= C gd
= C ds + C g d
-V G S , G a te -to -S o u rc e V o lta g e (V )
2500
V DS = -4 4V
V DS = -2 8V
16
C os s
1500
I D = - 16 A
12
1000
C rs s
500
0
10
4
FO R TES T C IR CU IT
SEE FIG U R E 13
0
A
1
8
0
100
20
30
40
50
A
60
Q G , Total Gate Charge (nC )
-V D S , Drain-to-Source V oltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
O PER ATIO N IN T HIS AR EA LIMITE D
BY R DS (on)
-I D , D ra in C u rre n t (A )
-I S D , R e ve rs e D ra in C u rre n t (A )
10
100
TJ = 150 °C
TJ = 2 5°C
VG S = 0 V
10
0.4
0.8
1.2
1.6
-VS D , S ource-to-Drain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.0
100
1 0µs
100µ s
10
1 ms
T C = 2 5°C
T J = 1 50 °C
Sing le Pulse
1
1
1 0m s
A
10
100
-VD S , D rain-to-S ource Voltage (V)
Fig 8. Maximum Safe Operating Area
IRFR/U5305
VGS
D.U.T.
RG
20
-I D , D ra in C u rre n t (A m p s )
RD
VDS
25
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
Fig 10a. Switching Time Test Circuit
10
td(on)
5
tr
t d(off)
tf
VGS
10%
A
0
25
50
75
100
125
150
TC , C ase T emperature (°C)
90%
VDS
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
T her m al R e spon se ( Z th J C )
10
1
D = 0.50
0.20
0.10
P
0.1
DM
0.05
t
0.02
0.01
t2
S INGLE P ULS E
(THE RMAL RESP O NSE)
0.01
0.00001
1
No te s:
1. Du ty fac tor D = t
1
/t
2
2. Pe ak TJ = P D M x Z th JC + T C
0.0001
0.001
0.01
0.1
t 1 , R ectan gula r P ulse D u ratio n (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
1
IRFR/U5305
L
VDS
+
-
D .U.T
RG
IA S
-2 0 V
tp
VD D
A
DR IV E R
0.01 Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
I AS
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
600
TOP
500
BO TTOM
ID
-7 .2A
-10A
-16 A
400
300
200
100
0
V D D = -2 5V
25
50
A
75
100
125
150
Starting TJ , Junction T emperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
-10V
12V
.2µF
.3µF
QGS
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
IRFR/U5305
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+
**

• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS*
+
-
*
VDD
*
Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V GS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
[ISD ]
IRFR/U5305
Package Outline — TO-252AA (D-Pak)
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
-A1.27 (.050)
0.88 (.035)
5.46 (.215)
5.21 (.205)
0.58 (.023)
0.46 (.018)
4
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
1.02 (.040)
1.64 (.025)
1
2
10.42 (.410)
9.40 (.370)
LEA D AS SIG NME NT S
1 - G AT E
3
0.51 (.020)
MIN.
-B 1.52 (.060)
1.15 (.045)
4 - DRA IN
3X
2X
1.14 (.045)
0.76 (.030)
2 - DRA IN
3 - S OUR CE
0.89 (.035)
0.64 (.025)
0.25 ( .010)
0.58 (.023)
0.46 (.018)
M A M B
NOT ES:
2.28 (.090)
1 DIME NSIO NING & T OLE RANCING P ER A NSI Y 14.5M, 1982.
2 CO NTRO LLING DIMENS ION : INCH.
3 CO NFO RMS T O JEDE C O UTLINE TO -252AA .
4.57 (.180)
4 DIME NSIO NS S HO W N ARE BEF O RE SO LD ER DIP ,
SO LDER DIP MA X. +0.16 (.006).
Part Marking Information
E X A M P LE : T H IS IS A N IR F R 120
W IT H A S S E MB L Y
LOT C OD E 9U 1P
IN T E R N A T IO N A L
R E CT IF IE R
LO G O
A
IR F R
12 0
9U
A S S E MB L Y
L O T C OD E
F IR S T P O R T ION
OF P A R T N U MB E R
1P
S E C O N D P O R T ION
OF PART NUMBER
IRFR/U5305
Package Outline — TO-254AA (I-Pak)
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
-A-
0.58 (.023)
0.46 (.018)
1.27 ( .050)
0.88 ( .035)
5.46 (.215)
5.21 (.205)
LEAD AS SIG NMENT S
4
1 - G AT E
2 - DRA IN
6.45 (.245)
5.68 (.224)
3 - S OURCE
4 - DRA IN
6.22 ( .245)
5.97 ( .235)
1.52 ( .060)
1.15 ( .045)
1
2
3
-B -
NOT ES :
1 DIME NSIO NING & T OLE RANCING P ER A NSI Y14.5M, 1982.
2.28 (.090)
1.91 (.075)
2 CO NTRO LLIN G DIMENS ION : INCH.
3 CO NFO RMS TO J EDE C O UT LINE TO -252AA .
9.65 (.380)
8.89 (.350)
4 DIME NSIO NS SHOW N A RE BEF O RE SO LDER DIP ,
SO LDER DIP MA X. +0.16 (.006).
3X
1.14 (.045)
0.76 (.030)
2.28 (.090)
3X
1.14 (.045)
0.89 (.035)
0.89 (.035)
0.64 (.025)
0.25 (.010)
2X
M A M B
0.58 (.023)
0.46 (.018)
Part Marking Information
E X A M P LE : TH IS IS A N IR F U1 20
W IT H A S S E M B LY
LO T C O D E 9U 1P
IN TE RN A T IO N A L
R E C T IF IE R
LO GO
IR F U
120
9U
A S S E M B LY
LO T C O D E
F IR S T P O RT IO N
O F P A R T N UM B E R
1P
S E C O N D P O R T ION
OF PART NUMBER
IRFR/U5305
Tape & Reel — TO-252AA (D-Pak)
TR
T RR
1 6.3 ( .6 41 )
1 5.7 ( .6 19 )
12 .1 ( .47 6 )
11 .9 ( .46 9 )
FEED D IR ECTION
TR L
1 6.3 ( .64 1 )
1 5.7 ( .61 9 )
8 .1 ( .318 )
7 .9 ( .312 )
FEED D IR EC TIO N
33 0.0 0
( 12 .992 )
M AX.
1 8.4 0 ( .7 16 )
1 6.4 0 ( .6 46 )
N O TES :
1. C O NT R O LLIN G D IMEN SIO N : M IL LIMET ER .
2. ALL D IM EN SION S AR E SH O W N IN MILL IMETER S ( IN C H ES ).
3. O U TLIN E C O N FO R MS T O EIA- 481 & EIA-541 .
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
7/96