IJIRST –International Journal for Innovative Research in Science & Technology| Volume 1 | Issue 11 | April 2015
ISSN (online): 2349-6010
Eliminating Harmonics of Single Phase Five Level
Cascaded Inverter
Ankit Tailor
Department of Power Electronics
Gujarat Technological University, L. E. College, Morbi
Abstract
This paper present Cascaded Hybrid Multilevel Inverter (CHMLI) is an attractive topology for high voltage DC-AC conversion.
This paper focuses on a single-phase five-level inverter with eliminating harmonics. The inverter consists of a two full bridge
inverter. The inverter produces output voltage in five levels: 0, +0.5Vdc, +Vdc, -0.5Vdc and –Vdc.. This paper present sequential
switching hybrid-modulation strategies for cascaded multilevel inverter and comparison of two hybrid pulse width modulation
techniques. the main characteristics of these modulation are the reduction of switching losses with good harmonics performance,
balance power loss dissipate among the device with in a cell .the feasibility of these hybrid modulation are verified
matlab/simulink software and simulation result are presented.
Keywords: Cascaded Inverter, Harmonics Analysis, Hybrid Modulation, Total Harmonic Distortion
_______________________________________________________________________________________________________
I. INTRODUCTION
The term multilevel starts with the three-level inverter. By increasing the number of levels in the inverter, the output voltages
have more steps generating a staircase waveforms, it results to reduction in harmonic distortion. However, a high number of
levels results to increase the complexity and also it introduce voltage imbalance problem. The cascaded multilevel inverters offer
more than two voltage levels. A desired output voltage waveform can be synthesize from the multiple voltage level with less
distortion, at low switching frequency, higher efficiency and lower voltage rating devices[1]. An important question in designing
an effective multilevel inverter is to ensure that, the total harmonic distortion (THD) in the output voltage waveform is small. A
complete solution is obtainable for computing all possible switching angles that achieve the required fundamental voltages and
eliminate the lower order harmonics On the other hand, it was assumed that the dc sources were all equal, which will probably
not be the case in applications even if the sources are nominally unequal. Here, it is shown how the method in can be extended to
two unequal dc source inverter. Particularly eliminating harmonics in a multilevel converter in which the separate dc sources do
not have equal voltage levels is measured [2]. Normally each phase of a cascaded multilevel converter requires n DC sources for
2n+1 levels. For many applications, to get several separate DC sources is difficult, and too many DC sources will be necessary
many long cables and might lead to voltage unbalance among the DC sources. To reduce the number of DC sources necessary
while the cascaded H-bridge multilevel converter is applied to a motor drive, a scheme is proposed in that allow the use of two
unequal DC sources to generate five level equal step multilevel inverter output. In this paper, the lower order harmonics are
eliminated using two unequal DC voltages for H bridges [3].
Multilevel voltage source inverter is recognized as an important alternative to the normal two level voltage source inverter
especially in high voltage application. Using multilevel technique, the amplitude of the voltage is increased, stress in the
switching devices is reduced and the overall harmonics profile is improved. Among the familiar topologies, the most popular one
is cascaded multilevel inverter. It exhibits several attractive features such as simple circuit layout, less components counts,
modular in structure and avoid unbalance capacitor voltage problem. However as the number of output level increases, the circuit
becomes bulky due to the increase in the number of power devices. In this project, it is proposed to employ sequential switching
hybrid modulation strategies for eliminating low frequency harmonics [2] [3].
There are number of modulation control techniques such as sinusoidal PWM method (SPWM), space vector PWM method
(SVPWM), selective harmonic elimination method (SHE), and active harmonic elimination method, and they all can be used for
inverter modulation control. For the proposed inverter control, sensible modulation control method is the fundamental frequency
switching control for high output voltage and Sinusoidal PWM control for low output voltage. In this paper, fundamental
frequency switching control is used in H-bridge MLI [4].
The most attractive features of multilevel inverters are as Follows:
1) It can generate output voltage with extremely low distortion.
2) It draws input current with very low distortion.
3) It generates smaller common-mode (CM) voltage, thus reducing the stress in the motor bearings. In addition, by using
sophisticated modulation methods, CM voltages can be eliminated.
4) They can operate with a lower switching frequency [1].
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Eliminating Harmonics of Single Phase Five Level Cascaded Inverter
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II. CASCADED H-BRIDGE MULTI-LEVEL PWM INVERTER
The cascaded multilevel inverter consists of a series of H-bridge inverter. The general purpose of this multilevel inverter is to
synthesize a desired voltage from several separate dc sources, like batteries, fuel cells, solar cells, and ultra capacitors.
Fig.1shows a single-phase structure of a cascade inverter with separate dc sources. Each separate dc source is connected to a
single-phase full-bridge inverter. The proposed cascaded multilevel inverter consists of two H-bridges. The first bridge H1
consists of a separate DC source Vdc, whereas the second bridge H2 consists of a DC source 0.5Vdc as shown in Fig.1. Let the
output of H-Bridge-1 be denoted as V1(t) and the output of H-Bridge-2 be denoted as V2(t). Hence the total output voltage is
given by V(t)=V1(t)+V2(t).By alternately opening and closing the switches S11,S12 and S13,S14 of H-Bridge- 1 appropriately,
output of H1 V1(t) can be made equal to +VDC, 0 or –VDC. Similarly the output voltage of H-Bridge-2 V2(t) can be made equal to
–0.5Vdc, 0 or + 0.5Vdc by opening and closing the switches of H2 [1]. Hence V(t) takes values +Vdc,+0.5Vdc,0,-0.5Vdc,-Vdc,
which are the five levels as shown in the Fig.2. The output voltage of the cascaded H-Bridge multilevel inverter is by:
V(t) = V1(t) + V2(t)
............................. (1)
Fig. 1: single phase five level cascaded inverter
Vdc
0
_Vdc
S11
1
Table -1:
Switching patterns
S12 S13 S14 S21
1
0
0
1
S22
1
S23
0
S24
0
1
1
0
0
0
1
0
1
1
0
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
0
1
1
1
0
1
0
Fig. 2: typical output voltage waveform
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Eliminating Harmonics of Single Phase Five Level Cascaded Inverter
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III. SELECTIVE HARMONICS ELIMINATION PMW
The switching angles of the waveform will be adjusted to obtain the lowest output voltage THD. The harmonics orders and
magnitude are depends up on the type of inverter and the control techniques. For example in single phase VSI, the output
voltage waveform typically consists only of odd harmonics. The even harmonics are not present due to the half wave symmetry
of the output voltage harmonics. The harmonic spectra depend on the switching frequency and the control method.
Frequency are integral multiples of the fundamental supply frequency. For a fundamental frequency of 50Hz, the third
harmonic would be 150Hz and fifth harmonic would be 250Hz. Harmonics are a mathematical way of describing distortion to a
voltage or current waveform. Fourier theory tells us that any repetitive waveform can be defined in terms of summing sinusoidal
waveforms which are integral multiples (or Harmonics) of the fundamental frequency. For the purpose of a steady state
waveform with equal positive and negative half-cycles [2] [3].
Harmonics should not be confused with spikes, dips, impulses, oscillations or other form of transients. A common term that is
used in relation to harmonics is THD or Total Harmonic Distortion. THD can be used to describe voltage or current distortion
Generally a staircase pattern of the voltage waveform is being chosen for the selective harmonic elimination pulse width
modulation (SHEPWM) in multilevel inverters. The number of switching angles in a quarter cycles is limited to s in the staircase
voltage waveform. In this method, the number of harmonics that can be eliminated is limited to s-1. To overcome this problem,
this paper proposes a multiple switching scheme in a quarter of a cycle in order to increase the number of harmonics that could
be eliminated. The number of harmonic that could be eliminated is (p x s)-1 .Where p is number of switching angles at each
level. For five-level inverter and p=3, there are five undesired low- order harmonics could be eliminated. In this case 5 th, 7th, 11th,
13th and 17th harmonic could be eliminated efficiently [4] [5]. The Fourier series expansion of this waveform is
..(2)
In equation (2), the positive signs indicate the rising edges and negative signs indicate the falling edges of the voltage
waveform. In this paper, a five-level cascaded inverter and p=3 is chosen as a case study. Thus, with six angles as degrees of
freedom, it is possible to satisfy the fundamental component and to eliminate five low-order harmonics i.e. 5th, 7th, 11th, 13th and
17th. Elimination of triple harmonics i.e. 3 rd, 9th, 15th is not necessary for three phase system because these harmonics are
eliminated automatically from line-line voltage. In other words for five level inverters with p=3, the following non-linear
equation should be solved:
M=cos 1 ± cos 2 ± cos 3 .cos ps
……………. (3)
The multilevel fundamental switching scheme inherently provides the opportunity to eliminate certain lower order harmonics
by varying the times at which certain switches are turned “ON” and turned “OFF” (i.e. varying the switching angles. Here 5 ,7th,
11th and 13th harmonics are eliminated.
th
A. PWM Technique for Cascaded Inverter:
The most popular PWM techniques for CHB inverter are 1. Phase Shifted Carrier PWM (PSCPWM), 2. Level Shifted Carrier
PWM (LSCPWM).
1) Case-1:- Phase Shifted Carrier PWM (PSCPWM):
Multilevel inverter with m voltage levels requires (m–1) triangular carriers. In the phase shifted Multicarrier modulation, all the
triangular carriers have the same frequency and the same peak-to-peak amplitude, but there is a phase shift between any two
adjacent carrier waves, given by (m – 1). The modulating signal is usually a three-phase sinusoidal wave with adjustable
amplitude and frequency. The gate signals are generated by comparing the modulating wave with the carrier waves. It means for
the five level inverter, four are triangular carriers are needed with a 90° phase displacement between any two adjacent carriers. In
this case the phase displacement of
Vcr1 = 0°, V cr2 = 90°, V cr1- = 180° and V cr2- = 270°.
2) Case-2:- Level Shifted Carrier PWM (LSCPWM):
The Level shifted carrier pulse width modulation. An m-level Cascaded H-bridge inverter using level shifted modulation requires
(m–1) triangular carriers, all having the same frequency and amplitude. The frequency modulation index is given by mf = fcr / fm,,
which remains the same as that for the phase-shifted triangular carriers with same amplitude and frequency. Which can be
expressed as:
mf = fcr / fm
……………… (4)
Where fm is modulating frequency and fcr are carrier waves frequency. The amplitude modulation index „ma‟ is defined by
ma= Vm / Vcr (m-1) for 0 ≤ ma ≤ 1
………………. (5)
Where Vm is the peak value of the modulating wave and V cr is the peak value of the each carrier wave. The amplitude
modulation index, ma is 1 and the frequency modulation index, mf is 6.The triggering circuit is designed based on the three
phase sinusoidal modulation waves Va, Vb, and Vc. Three of the sine wave sources have been obtained with same amplitude and
frequency but displaced 120° out of the phase with each others. For carriers wave sources block parameters, the time values of
each carrier waves are set to [0 1/600 1/300] while the outputs values are set according to the disposition of carrier waves. After
comparing, the output signals of comparator are transmitted to the switches. In Alternative phase opposite disposition (APOD),
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Eliminating Harmonics of Single Phase Five Level Cascaded Inverter
(IJIRST/ Volume 1 / Issue 11 / 033)
where all carriers are alternatively in opposite disposition. where all carriers above zero reference are in phase but in
opposition with those below the zero reference[4][5][6].
Fig. 3: phase shifted carrier PMW
Fig. 4: alternate phase opposite disposition
B. Hybrid Pulse Width Modulation:
The comparison is give in between the Alternate phase methods. The hybrid alternate phase opposition disposition which
contains the two carrier waves each are level shifted by the amplitude of carrier wave and the half wave.
Hybrid modulation is the combination of fundamental frequency modulation (FPWM) and multilevel sinusoidal (MSPWM)
for each inverter cell operation, so that the output inherits the features of switching- loss reduction. In this modulation technique,
the four switches of each inverter module are operated at two different frequencies; two being commutated at FPWM, while the
other two switches are modulated at MSPWM, therefore MPWM, therefore the resultant switching patterns are the same as those
obtained with MSPWM [4][6].
C. Hybrid-Modulation Controller (HMC):
HMC combine SSP (sequential switching pulse), FPWM, and MSPWM that produce SSHM pulses. It is designed by
simple combinational logic and the functions for a five-level HPWM are expressed as
using a
Fig. 5: scheme of sequential switching hybrid modulation
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Eliminating Harmonics of Single Phase Five Level Cascaded Inverter
(IJIRST/ Volume 1 / Issue 11 / 033)
S1=ABC +A‟B
S5=ABD‟ +A‟B
S2=AB‟C+A‟B‟
S6=AB‟D+A‟B‟
S3=A‟B‟C‟+AB‟
S7=A‟B‟D‟+AB‟
S4=A‟BC+AB
S8=A‟BD+AB
Where A is an SSP, B is an FPWM, C is an MSPWM for cell-I and D is an MSPWM for cell-II. Each gate pulse is composed
of both FPWM and MSPWM. If SSP A= 1, then S1 S4, S5, and S8 are operated with MSPWM, while S2, S3, S6, and S7 are
operated at FPWM. If SSP A=0, then S1, S4, S5 and S8 are operated at FPWM, while S2, S3, S6, and S7 are operated with
MSPWM. Since A is sequential signal, the average switching frequency amongst the four switches is equalized. Voltage stress
and current stress of power switches in each cell is inherently equalized with this modulation [4] [6].
IV. SIMULATION RESULTS
Simulation was performed by using MATLAB SIMULINK to verify that the proposed inverter can be practically implemented.
It helps to confirm the PWM switching strategy for the five level inverter. It consists of two carrier signals and a reference signal.
Both the carrier signals are compared with the reference signal to produce PWM switching signals for switches.
Figure 6.shows matlab/Simulink model of proposed modified hybrid modulation of single phase cascaded multilevel
inverter.it consists of eight switches in the form of two H-bridge cells
Fig. 6: Simulink block diagram
Fig. 7: output voltage waveform
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Eliminating Harmonics of Single Phase Five Level Cascaded Inverter
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Fig 7. Shows output voltage waveform of a single phase five level cascaded inverter and figure.8. Shows the FET analysis of
phase voltage .from the figure it is clear that the total THD is 27%.the lower order harmonics are shifted to higher order by using
the pulse width modulation technique.
Fig. 8: FET analysis of phase voltage
V. CONCLUSION
This cascaded inverter design is to get the improved sinusoidal output of an inverter and gives less THD%. The elimination of
harmonics in a cascade H-bridge multilevel inverter by considers the inequality of separated dc source. The PWM techniques
have been analyzed for the cascaded H-Bridge multilevel inverter .out of various PWM techniques, level shifted carrier APOD
give good harmonics performance. this paper present sequential switching hybrid-modulation are the reduction of switching
losses with good harmonics performance ,balance power loss dissipate among the devices with in a leg .finally the proposed
technique is simulation result are compared and presented.
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