Professor Ka Nang Alex Leung
Refereed Journal Publications
K. N. Leung, P. K. T. Mok, W. H. Ki and J. K. O. Sin, “Three-Stage Large Capacitive
Load Amplifier with Damping-Factor-Control Frequency Compensation,” IEEE Journal of
Solid-State Circuits, Vol. 35, No. 2, pp. 221-230, Feb. 2000.
2. K. N. Leung and P. K. T. Mok, “Nested Miller Compensation in Low-Power CMOS
Design,” IEEE Transactions on Circuits and Systems II, Vol. 48, No. 4, pp. 388-394, Apr. 2001.
3. K. N. Leung and P. K. T. Mok, “Analysis of Multi-Stage Amplifier - Frequency
Compensation,” IEEE Transactions on Circuits and Systems I, Vol. 48, No. 9, pp.
1041-1056, Sept. 2001.
o Top downloaded TCAS-I papers in 2005, 2008, 2009, 2010 and Mar. 2013
(Ranked 1st)
4. K. N. Leung and P. K. T. Mok, “A Sub-1-V 15-ppm/oC CMOS Bandgap Voltage
Reference without Requiring Low Threshold Voltage Device,” IEEE Journal of Solid-State
Circuits, Vol. 37, No. 4, pp. 526-530, Apr. 2002.
o Top downloaded JSSC papers in Mar. 2015
5. K. N. Leung and P. K. T. Mok, “A CMOS Voltage Reference Based on Weighted VGS for
CMOS Low-Dropout Linear Regulators,” IEEE Journal of Solid-State Circuits, Vol. 38,
No. 1, pp. 146-150, Jan. 2003.
6. K. N. Leung, P. K. T. Mok and C. Y. Leung, “A 2-V 23-A 5.3-ppm/oC
Curvature-Compensated CMOS Bandgap Reference,” IEEE Journal of Solid-State Circuits,
Vol. 38, No. 3, pp. 561-564, Mar. 2003.
o Invited paper
7. H. Lee, K. N. Leung and P. K. T. Mok, “A Dual-Path Bandwidth Extension Amplifier
Topology with Dual-Loop Parallel Compensation,” IEEE Journal of Solid-State Circuits,
Vol. 38, No. 10, pp. 1739-1744, Oct. 2003.
8. K. N. Leung and P. K. T. Mok, “A Capacitor-Free CMOS Low-Dropout Regulator with
Damping-Factor-Control Frequency Compensation,” IEEE Journal of Solid-State Circuits,
Vol. 38, No. 10, pp. 1691-1702, Oct. 2003.
o Top downloaded JSSC papers in Mar. 2013, Sept. 2014, Feb., Jun. & Nov. 2015
and Mar. & Jun. 2016
9. C. Y. Leung, P. K. T. Mok, K. N. Leung and M. Chan, “An Integrated CMOS
Current-Sensing Circuit for Low-Voltage Current-Mode Buck Regulator,” IEEE
Transactions on Circuits and Systems II, Vol. 52, No. 7, pp. 394-397, Jul. 2005.
o Top downloaded TCAS-II papers in Mar., Aug. & Nov. 2011, Feb. & Jun. 2013,
May, Sept. & Dec. 2014 and Jan., May, Oct. and Dec. 2015
10. H. Lee, P. K. T. Mok and K. N. Leung, “Design of Low-Power Analog Drivers Based on
Slew-Rate Enhancement Circuits for CMOS Low-Dropout Regulators,” IEEE Transactions
on Circuits and Systems II, Vol. 52, No. 9, pp. 563-567, Sept. 2005.
o Top downloaded TCAS-II papers in Aug. 2011 and Feb. 2015
11. C. Y. Leung, P. K. T. Mok and K. N. Leung, “A 1-V Integrated Current-Mode Boost
Converter in Standard 3.3/5-V CMOS Technologies,” IEEE Journal of Solid-State Circuits,
Vol. 40, No. 11, pp. 2265-2274, Nov. 2005.
12. M. Siu, P. K. T. Mok, K. N. Leung, Y. H. Lam and W. H. Ki, “A Voltage-Mode PWM
Buck Converter with End-Point Prediction,” IEEE Transactions on Circuits and Systems II,
Vol. 53, No. 4, pp. 294-298, Apr. 2006.
o Top downloaded TCAS-II papers in Oct. 2011
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Top 100 downloaded papers in IEEE overall in Oct. 2011
S. K. Lau, P. K. T. Mok and K. N. Leung, “A Low-Dropout Regulator for SoC with
Q-Reduction,” IEEE Journal of Solid-State Circuits, Vol. 42, No. 3, pp. 658-664, Mar.
2007.
K. N. Leung, C. H. Lo, P. K. T. Mok, Y. Y. Mai, W. Y. Leung and M. Chan, “A
Temperature-Compensated CMOS Ring Oscillator for Power-Management Circuits,”
Electronics Letters, Vol. 43, Issue 15, pp. 786-787, Jul. 2007.
o Undergraduate research done at HKUST
J. B. Jia and K. N. Leung, “An Integrated Ramp Generator with an Auto-Set Hysteretic
Comparator for PWM Voltage Regulators,” Electronics Letters, Vol. 43, Issue 24, pp.
1385-1387, Nov. 2007.
T. Y. Man, K. N. Leung, C. Y. Leung, P. K. T. Mok and M. Chan, “Development of
Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC,” IEEE
Transactions on Circuits and Systems I, Vol. 55, No. 5, pp. 1392-1401, Jun. 2008.
o Top downloaded TCAS-I papers in 2008, 2009, 2010, Oct. 2011, May & Dec.
2014, May, Aug., Oct. & Nov. 2015 and Jan., Feb., Mar. & May 2016
S. K. Tang, K. P. Pun, C. S. Choy, C. F. Chan and K. N. Leung, “A Fully Differential
Band-Selective Low Noise Amplifier for MB-OFDM UWB Receivers,” IEEE
Transactions on Circuits and Systems II, Vol. 55, No. 7, pp. 653-657, Jul. 2008.
A. K. Y. Wong, K. P. Pun, Y. T. Zhang and K. N. Leung, “A Low-Power CMOS
Front-End for Photoplethysmographic Signal Acquisition with Robust DC Photocurrent
Rejection,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 2, No. 4, pp.
280-288, Dec. 2008.
P. Y. Or and K. N. Leung, “An Output-Capacitorless Low-Dropout Regulator with Direct
Voltage-Spike Detection,” IEEE Journal of Solid-State Circuits, Vol. 45, No. 2, pp.
458-466, Feb. 2010.
o Undergraduate research done at CUHK
o Top downloaded JSSC papers in Feb. and Mar. 2010
C. F. Chan, K. P. Pun, K. N. Leung, J. P. Guo, L. L. K. Leung and C. S. Choy,
“Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1
Generation-2 Transponders,” IEEE Journal of Solid-State Circuits, Vol. 45, No. 3, pp.
587-599, Mar. 2010.
K. N. Leung, F. K. M. Cheung, M. Ho, H. C. Poon and P. Y. Or, “A 1.9W
Transient-Enhanced Low-Dropout Regulator with Voltage-Spike Suppression,” Journal of
Low Power Electronics, Vol. 6, No. 1, pp. 126-132, Apr. 2010.
o Undergraduate research done at CUHK
K. N. Leung, C. S. Choy, K. P. Pun, L. L. K. Leung, J. P. Guo, Y. S. Ng, C. F. Chan, W.
W. Shi, Y. Hong, M. Ho, K. L. Mak and Y. Q. Ai, “RF Module Design of Passive UHF
RFID Tag Implemented in CMOS 90-nm Technology,” Journal of Low Power Electronics,
Vol. 6, No. 1, pp. 141-149, Apr. 2010.
R. P. K. Chan, C. S. Choy, C. F. Chan, K. P. Pun and K. N. Leung, “Analysis of the
Behaviors of Phase and Amplitude Mismatch Compensators to Achieve 82.5dB Image
Rejection Ratio,” International Journal of Electronics, Vol. 97, No. 5, pp. 553-568, May
2010.
M. J. Wong, M. Ho and K. N. Leung, “High Slew-Rate Voltage Follower Based on
Double-Sided Dynamic Biasing,” Electronics Letters, Vol. 46, Issue 12, pp. 824-825, Jun.
2010.
o Undergraduate research done at CUHK
p. 2
25. A. K. Y. Wong, K. N. Leung, K. P. Pun and Y. T. Zhang, “A 0.5 Hz Highpass-Cutoff
Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device,” IEEE
Transactions on Circuits and Systems II, Vol. 57, No. 7, pp. 531-535, Jul. 2010.
26. S. Yeung, J. P Guo and K. N. Leung, “25mA LDO with -63dB PSRR at 30MHz for
WiMAX,” Electronics Letters, Vol. 46, Issue 15, pp. 1080-1081, Jul. 2010.
o Undergraduate research done at CUHK
o Top downloaded EL papers in Aug. 2010
27. J. P. Guo and K. N. Leung, “A 6-W Chip-Area-Efficient Output-Capacitorless LDO in
90-nm CMOS Technology,” IEEE Journal of Solid-State Circuits, Vol. 45, No. 9, pp.
1896-1905, Sep. 2010.
o Regarded as “most read” JSSC paper in Sept. 2010
o Top downloaded JSSC papers in Oct. and Nov. 2010
o Top 100 downloaded papers in Sep. 2010 (Ranked 14th) and Nov. 2010 (Ranked
100th) in IEEE overall
28. K. N. Leung and Y. S. Ng, “A CMOS Low Dropout Regulator with a Momentarily
Current-Boosting Voltage Buffer,” IEEE Transactions on Circuits and Systems I, Vol. 57,
No. 9, pp. 2312-2319, Sept. 2010.
o Ranked 1st of the Top downloaded TCAS-I papers in Oct. 2010
29. P. Y. Or and K. N. Leung, “A Fast-Transient Low-Dropout Regulator with Load-Tracking
Impedance Reduction and Loop-Gain Boosting,” IEEE Transactions on Circuits and
Systems II, Vol. 57, No. 10, pp. 757-761, Oct. 2010.
o Ranked 1st of the Top downloaded TCAS-II papers in Oct. 2010
o Top downloaded TCAS-II papers in Nov. 2010 and Mar. & May 2011
30. M. Ho, K. N. Leung and K. L. Mak, “A Low-Power Fast-Transient 90-nm Low-Dropout
Regulator with Multiple Small-Gain Stages,” IEEE Journal of Solid-State Circuits, Vol. 45,
No. 11, pp. 2466-2475, Nov. 2010.
o Top downloaded JSSC papers in Oct. and Nov. 2010
o Top 100 downloaded papers in Oct. 2010 (Ranked 79th) and Nov. 2010 (Ranked
33rd) in IEEE overall
31. K. N. Leung, Y. Y. Mai and P. K. T. Mok, “A Chip-Area Efficient Voltage Regulator for
VLSI Systems,” IEEE Transactions on VLSI Systems, Vol. 18, No. 12, pp. 1757-1762, Dec.
2010.
o Top downloaded TVLSI papers in Dec. 2010
32. K. N. Leung, Y. K. Sun, L. L. K. Leung and P. Y. Or, “A Gain-Optimizing Regulated
Charge Pump,” International Journal of Electronics, Vol. 98, No. 2, pp. 197-205, Feb.
2011.
o Undergraduate research done at CUHK
33. M. Ho and K. N. Leung, “Dynamic Bias-Current Boosting Technique for
Ultra-Low-Power Low-Dropout Regulator in Biomedical Applications,” IEEE
Transactions on Circuits and Systems II, Vol. 58, No. 3, pp. 174-178, Mar. 2011.
o Ranked 1st of the Top downloaded TCAS-II papers in Mar. 2011
o Top downloaded TCAS-II papers in Mar., Apr., May, Jun., Jul. and Oct. 2011
34. K. N. Leung, Y. S. Ng and H. Chen, “A Fully Integrated CMOS Direct-Conversion
Transmitter Front-End for WiMAX,” International Journal of Electronics, Vol. 99, No. 2,
pp. 255-266, Feb. 2012.
35. J. B. Jia and K. N. Leung, “Improved Active-Diode Circuit Used in Voltage Doubler,”
International Journal of Circuit Theory and Applications, Vol. 40, Issue 2, pp. 165-173,
Feb. 2012.
p. 3
36. J. P. Guo and K. N. Leung, “A CMOS Voltage Regulator for Passive RFID Tag ICs,”
International Journal of Circuit Theory and Applications, Vol. 40, Issue 4, pp. 329-340,
Apr. 2012.
37. J. B. Jia and K. N. Leung, “A Digital-Control Single-Inductor Triple-Output DC-DC
Converter with Pre-Sub-Period Inductor-Current Control,” IEEE Transactions on Power
Electronics, Vol. 27, No. 4, pp. 2028-2042, Apr. 2012.
38. Y. Q. Zheng, H. Chen and K. N. Leung, “A Fast-Response Pseudo-PWM Buck Converter
with PLL-Based Hysteresis Control,” IEEE Transactions on VLSI Systems, Vol. 20, No. 7,
pp. 1167-1174, Jul. 2012.
39. K. W. Li, K. N. Leung and L. L. K. Leung, “Sub-mW LC Dual-Input Injection-Locked
Oscillator for Autonomous WBSNs,” IEEE Transactions on VLSI Systems, Vol. 21, No. 3,
pp. 546-553, Mar. 2013.
40. K. W. Li and K. N. Leung, “A Class-E Power Amplifier for Wireless Biomedical
Systems,” Analog Integrated Circuits and Signal Processing, Mar. 2013.
41. K. N. Leung and Y. S. Ng, “A CMOS Voltage Buffer with Slew-Rate Enhancement,”
International Journal of Electronics, published online, 10 Jun. 2013.
o Undergraduate research done at CUHK
42. H. Chen and K. N. Leung, “A Transient-Improved LDO with Nested Flipped Voltage
Follower Structure,” International Journal of Circuit Theory and Applications, Vol. 41,
Issue 10, pp. 1016-1026, Oct. 2013.
43. L. Sun, C. T. Ko, M. Ho, W. T. Ng, K. N Leung, C. S. Choy and K. P. Pun, “23-W
8.9-Effective Number of Bit 1.1-MS/s Successive Approximation Register
Analog-to-digital Converter with an Energy-efficient Digital-to-analog Switching
Scheme,” IET The Journal of Engineering, Aug. 2014.
44. T. W. Mui, M. Ho, K. H. Mak, J. P. Guo, H. Chen and K. N. Leung, “An Area-Efficient
96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler with Minimum Supply of 0.8V,”
IEEE Transactions on Circuits and Systems II, Vol. 61, No. 9, pp. 656-660, Sep. 2014.
o Undergraduate research done at CUHK
o Top downloaded TCAS-II papers in Sep. and Oct. 2014
45. K. H. Mak and K. N. Leung, “A Signal- and Transient-Current Boosting Amplifier for
Large Capacitive Load Applications,” IEEE Transactions on Circuits and Systems I, Vol.
61, No. 10, pp. 2777-2785, Oct. 2014.
o Top downloaded TCAS-I papers in Sep., Oct. and Nov. 2014
46. J. P. Guo, M. Ho, K. Y. Kwong and K. N. Leung, “Power-Area-Efficient
Transient-Improved Capacitor-Free FVF-LDO with Digital Detecting Technique,”
Electronics Letters, Vol. 51, Issue 1, pp. 94-96, Jan. 2015.
o Top downloaded EL papers in Jan., Mar., Apr. and Jun. 2015
47. K. H. Mak, M. W. Lau, J. P. Guo, T. W. Mui, M. Ho, W. L. Goh and K. N. Leung, “A
0.7-V 24-µA Hybrid OTA Driving 15-nF Capacitive Load with 1.46-MHz GBW,” IEEE
Journal of Solid-State Circuits, Vol. 50, No. 11, pp. 2750-2757, Nov. 2015.
o Top downloaded JSSC papers in Oct. & Nov. 2015
48. H. Wang, X. Tang, C. S. Choy, K. N. Leung and K. P. Pun, “A 5.4-mW 180-cm
Transmission Distance 2.5-Mbps Advanced Techniques Based Novel Intra-Body
Communication Receiver Analog Front End,” IEEE Transactions on VLSI Systems, Vol. 23,
No. 12, pp. 2829-2841, Dec. 2015.
o Top downloaded TVLSI papers in Dec. 2015
49. J. P. Guo, M. Ho, K. N. Leung and G. X. Li, “Digital-assisted Constant-on-time
Dynamic-biasing Technique for Bandwidth and Slew-rate Enhancement in Ultralow-power
Low-dropout Regulator,” International Journal of Circuit Theory and Applications, Vol.
44, Issue 2, pp. 504-513, Feb. 2016.
p. 4
50. Y. Q. Zheng, M. Ho, J. P. Guo, K. L. Mak and K. N. Leung, “A Single-Inductor
Multiple-Output Auto-Buck-Boost DC-DC Converter with Auto Phase Allocation,” IEEE
Transactions on Power Electronics, Vol. 31, No. 3, pp. 2296-2313, Mar. 2016.
o Top downloaded TPEL papers in Nov. 2015
51. M. Ho, J. P. Guo, T. W. Mui, K. H. Mak, W. L. Goh, H. C. Poon, S. Bu, M. W. Lau and K.
N. Leung, “A Two-Stage Large-Capacitive-Load Amplifier with Multiple Cross-Coupled
Small-Gain Stages,” IEEE Transactions on VLSI Systems, Vol. 24, No. 7, pp. 2580-2592,
Jul. 2016.
o Top downloaded TVLSI papers in Jun. and Aug. 2016
52. M. Ho, J. P. Guo, K. H. Mak, W. L. Goh, S. Bu, Y. Q. Zheng, X. Tang and K. N. Leung,
“A CMOS Low-Dropout Regulator with Dominant-Pole Substitution,” IEEE Transactions
on Power Electronics, Vol. 31, No. 9, pp. 6362-6371, Sep. 2016.
53. Y. Q. Zheng, M. Ho, J. P. Guo and K. N. Leung, “A Single-Inductor Multiple-Output
Auto-Buck-Boost DC-DC Converter with Tail Current Control,” IEEE Transactions on
Power Electronics, Vol. 31, No. 11, pp. 7857-7875, Nov. 2016.
Refereed Conference Publications
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K. N. Leung, P. K. T. Mok, W. H. Ki and J. K. O. Sin, “Damping-Factor-Control
Frequency Compensation Technique for Low-Voltage Low-Power Large Capacitive Load
Applications,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco,
California, USA, pp. 158-159, Feb. 1999.
K. N. Leung, P. K. T. Mok and W. H. Ki, “Optimum Nested Miller Compensation for
Low-Voltage Low-Power CMOS Amplifier Design,” IEEE International Symposium on
Circuits and Systems, Orlando, Florida, USA, Vol. II, pp. 616-619, May 1999.
K. N. Leung, P. K. T. Mok and W. H. Ki, “A Novel Frequency Compensation Technique
for Low-Voltage Low-Dropout Regulator,” IEEE International Symposium on Circuits and
Systems, Orlando, Florida, USA, Vol. V, pp. 102-105, May 1999.
K. N. Leung, P. K. T. Mok and W. H. Ki, “Right-Half-Plane Zero Removal Technique for
Low-Voltage Low-Power Nested Miller Compensation CMOS Amplifiers,” the 6th IEEE
International Conference on Electronics, Circuits and Systems, Paphos, Cyprus, Vol. II, pp.
599-602, Sept. 1999.
K. N. Leung, P. K. T. Mok, W. H. Ki and J. K. O. Sin, “Analysis of an Alternative
Structure of Damping-Factor-Control Frequency Compensation,” IEEE International
Symposium on Circuits and Systems, Geneva, Switzerland, Vol. II, pp. 545-548, May 2000.
K. N. Leung and P. K. T. Mok, “A CMOS Voltage Reference Based on Weighted
Difference of Gate-Source Voltages between PMOS and NMOS Transistors for Low
Dropout Regulator,” the 27th European Solid-State Circuits Conference, Villach, Austria,
pp. 88-91, Sept. 2001.
K. N. Leung, P. K. T. Mok and C. Y. Leung, “A 2-V 23-A 5.3-ppm/oC 4th-Order
Curvature-Compensated CMOS Bandgap Reference,” IEEE Custom Integrated Circuits
Conference, Orlando, Florida, USA, pp. 457-460, May 2002.
K. N. Leung and P. K. T. Mok, “High-Performance Low-Dropout Regulator Designs,” the
5th Hong Kong IEEE Workshop on Switch Mode Power Supplies, Hong Kong, pp. 68-75,
Jun. 2002.
S. K. Lau, K. N. Leung and P. K. T. Mok, “Analysis of Low-Dropout Regulator
Topologies for Low-Voltage Regulation,” IEEE Conference on Electron Devices and
Solid-State Circuits, Hong Kong, pp. 379-382, Dec. 2003.
C. Y. Leung, P. K. T. Mok and K. N. Leung, “A 1.2-V Buck Converter with a Novel
On-Chip Low-Voltage Current-Sensing Scheme,” IEEE Symposium on Circuits and
Systems, Vancouver, Canada, Vol. V, pp. 824-827, May 2004.
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C. Y. Leung, K. N. Leung and P. K. T. Mok, “Design of a 1.5-V High-Order
Curvature-Compensated CMOS Bandgap Reference,” IEEE Symposium on Circuits and
Systems, Vancouver, Canada, Vol. I, pp. 49-52, May 2004.
K. N. Leung, P. K. T. Mok and S. K. Lau, “A Low-Voltage CMOS Low-Dropout
Regulator with Enhanced Loop Response,” IEEE Symposium on Circuits and Systems,
Vancouver, Canada, Vol. I, pp. 385-388, May 2004.
P. K. T. Mok and K. N. Leung, “Design Considerations of Recent Advanced Low-Voltage
Low-Temperature-Coefficient CMOS Bandgap Voltage Reference,” IEEE Custom
Integrated Circuits Conference, Orlando, Florida, USA, pp. 635-642, Oct. 2004.
o Invited paper
W. P. Lee, C. T. Hsu, C. Y. Tsoi, A. Bermak and K. N. Leung, “Synchronization Analysis
in Spiking Pixel Architecture - Hardware Implementation and Mismatch Analysis,” IEEE
TENCON, Chiang Mai, Thailand, Vol. D, pp. 274-277, Nov. 2004.
o Undergraduate research done at HKUST
H. Lee, K. N. Leung and P. K. T. Mok, “Low-Voltage Analog Circuit Design
Methodology Based on Bias-Current Reutilization, Self-Biasing and Signal Superposition,”
IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong,
pp. 533-536, Dec. 2005.
A. K. Y. Wong, K. P. Pun, Y. T. Zhang and K. N. Leung, “A NIR CMOS Preamplifier
with DC Photocurrent Rejection for Pulsed Light Source,” IEEE Biomedical Circuits &
Systems Conference, London, pp. 9-12, Nov. 2006.
J. B. Jia and K. N. Leung, “A Review of Charge-Pump Design,” International Ph.D.
Student Workshop on SoC, Taipei, Taiwan, Jul. 2007.
K. W. Li and K. N. Leung, “Biomedical Filter Design in CMOS Technology,”
International Ph.D. Student Workshop on SoC, Taipei, Taiwan, Jul. 2007.
o Best presentation award
Y. Q. Zheng and K. N. Leung, “A Review of Advanced Low Dropout Regulators,”
International Ph.D. Student Workshop on SoC, Taipei, Taiwan, Jul. 2007.
A. K. Y. Wong, K. P. Pun, Y. T. Zhang and K. N. Leung, “A Low Power CMOS
Front-End for Photoplethysmongraphic Signal Acquisition with Robust DC Photocurrent
Rejection,” IEEE/EMBS International Summer School and Symposium on Medical Devices
and Biosensor, pp. 53-56, Aug. 2007.
H. Y. Lo, P. Y. Or, K. N. Leung, L. L. K. Leung, C. S. Choy and K. P. Pun, “Design
Challenges of Voltage Multiplier in a 0.35-m 2-Poly 4-Metal CMOS Technology for
RFID Passive Tags,” IEEE International Conference on Electron Devices and Solid-State
Circuits, Taiwan, Vol. I, pp. 433-436, Dec. 2007.
o Undergraduate research done at CUHK
K. N. Leung, Y. S. Ng, K. Y. Yim and P. Y. Or, “An Adaptive Current-Boosting Voltage
Buffer for Low-Power Low Dropout Regulators,” IEEE International Conference on
Electron Devices and Solid-State Circuits, Taiwan, Vol. I, pp. 485-488, Dec. 2007.
o Undergraduate research done at CUHK
K. N. Leung and Y. Q. Zheng, “Compensation-Capacitor Free Pseudo Three-Stage
Amplifier with Large Capacitive Loads,” IEEE International Symposium on Electronic
Design Test and Applications, Hong Kong, pp. 7-10, Jan. 2008.
C. Y. Cheng, K. N. Leung, Y. K. Sun and P. Y. Or, “Design of a Low-Voltage CMOS
Charge Pump,” IEEE International Symposium on Electronic Design Test and Applications,
Hong Kong, pp. 342-345, Jan. 2008.
o Undergraduate research done at CUHK
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J. B. Jia and K. N. Leung, “A Single-Inductor Dual-Output Pseudo-DCM/CCM Buck and
Boost Converter in 90nm CMOS Technology,” the 9th International Conference on
Solid-State and Integrated-Circuit Technology, Beijing, China, pp. 1937-1940, Oct. 2008.
M. P. K. Chan, C. S. Choy, K. P. Pun, C. F. Chan and K. N. Leung, “Enhanced channel
selection using digital low-IF in Weaver receiver architecture,” IEEE Asia Pacific
Conference on Circuits and Systems, Macao, China, pp. 33-36, Dec. 2008.
Y. Hong, C. F. Chan, J. P. Guo, Y. S. Ng, W. W. Shi, L. L. K. Leung, K. N. Leung, C. S.
Choy and K. P. Pun, “Design of Passive UHF RFID Tag in 130nm CMOS Technology,”
IEEE Asia Pacific Conference on Circuits and Systems, Macao, China, pp. 1371-1374, Dec.
2008.
Y. Hong, C. F. Chan, J. P. Guo, Y. S. Ng, W. W. Shi, M. Ho, L. L. K. Leung, K. N. Leung,
C. S. Choy and K. P. Pun, “Design and Challenges of Passive UHF RFID Tag in 90nm
CMOS Technology,” IEEE International Conference on Electron Devices and Solid-State
Circuits, Hong Kong, Dec. 2008.
M. Ho and K. N. Leung, “Two-Stage Miller-Compensated Amplifier with Embedded
Negative Current Buffer,” IEEE International Conference on Electron Devices and
Solid-State Circuits, Hong Kong, Dec. 2008.
P. Y. Or and K. N. Leung, “A Slew-Rate Enhancement Technique Based On Current
Comparator and Capacitive-Coupled Push-Pull Output Stage for CMOS Amplifiers,” IEEE
International Conference on Electron Devices and Solid-State Circuits, Hong Kong, Dec.
2008.
J. B. Jia and K. N. Leung, “A Single-Inductor Dual-Output Pseudo-DCM/CCM Buck and
Boost Converter with Adaptive DC Current Compensation,” IEEE Symposium on Circuits
and Systems, Taipei, Taiwan, pp. 2641-2644, May 2009.
J. P. Guo and K. N. Leung, “A Fold-Back Current-Limit Circuit with Load-Insensitive
Quiescent Current for CMOS Low Dropout Regulator,” IEEE Symposium on Circuits and
Systems, Taipei, Taiwan, pp. 2417-2420, May 2009.
C. F. Chan, W. W. Shi, K. P. Pun, L. L. K. Leung, K. N. Leung and C. S. Choy, “A
Low-Power Signal Processing Front-End and Decoder for UHF Passive RFID
Transponders,” IEEE Symposium on Circuits and Systems, Taipei, Taiwan, pp. 1581-1584,
May 2009.
W. Fan, C. S. Choy and K. N. Leung, “Robust and Low Complexity Packet Detector
Design for MB-OFDM UWB,” IEEE Symposium on Circuits and Systems, Taipei, Taiwan,
pp. 693-696, May 2009.
Y. S. Ng, L. L. K. Leung and K. N. Leung, “A 3-GHz Fully-Integrated CMOS Class-AB
Power Amplifier,” IEEE International Midwest Symposium on Circuits and Systems,
Cancun, Mexico, pp. 995-998, Aug. 2009.
Y. Hong, Y. S. Ng, C. F. Chan, J. P. Guo, W. W. Shi, M. Ho, Y. Q. Ai, K. L. Mak, K. N.
Leung, C. S. Choy, K. P. Pun and L. L. K. Leung, “A Passive RFID Tag IC Development
Platform,” International Conference on Anti-counterfeiting, Security and Identification in
Communications, pp. 286-289, Hong Kong, Aug. 2009.
J. P. Guo and K. N. Leung, “A Sub-1A Improved-Transient CMOS Low-Dropout Regulator
without Minimal ESR Requirement,” IEEE TENCON, pp. 1-6, Singapore, Nov. 2009.
K. W. Li, L. L. K. Leung and K. N. Leung, “Low Power Injection Locked Oscillators for
MICS Standard,” IEEE Biomedical Circuits & Systems Conference, pp. 1-4, Beijing, China,
Nov. 2009.
W. W. Shi, C. S. Choy, C. F. Chan, K. N. Leung and K. P. Pun, “A 0.4V Low Power
Baseband Processor for UHF Passive RFID Tags,” IEEE International NEWCAS
Conference, Montreal, Canada, pp. 65-68, Jun. 2010.
p. 7
40.
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53.
W. W. Shi, C. S. Choy, C. F. Chan, K. N. Leung and K. P. Pun, “A 90nm RFID Tag's
Baseband Processor with Novel PIE Decoder and Uplink Clock Generator,” IEEE
International Midwest Symposium on Circuits and Systems, Seattle, WA, USA, pp.
644-647, Aug. 2010.
J. P. Guo, W. W. Shi, K. N. Leung and C. S. Choy, “Power-On-Reset Circuit with
Power-Off Auto-Discharging Path for Passive RFID Tag ICs,” IEEE International Midwest
Symposium on Circuits and Systems, Seattle, WA, USA, pp. 21-24, Aug. 2010.
J. B. Jia and K. N. Leung, “Optimization of Output Voltage and Stage Number of UHF
RFID Power Rectifier,” International Conference on Solid-State and Integrated-Circuit
Technology, Shanghai, China, pp. 412-414, Nov. 2010.
K. Y. Kwong and K. N. Leung, “Slew-Rate Enhancement Circuit of CMOS
Current-Mirror Amplifier by Edge-Detecting Technique,” IEEE International Conference
on Electron Devices and Solid-State Circuits, Hong Kong, Dec. 2010.
H. Chen and K. N. Leung, “A Fast-Transient LDO Based on Buffered Flipped Voltage
Follower,” IEEE International Conference on Electron Devices and Solid-State Circuits,
Hong Kong, Dec. 2010.
o Undergraduate research done at CUHK
K. N. Leung, M. Ho, J. P. Guo and P. Y. Or, “Development of Energy-Efficient
Fast-Transient CMOS Low-Dropout Regulators for SoC Applications,” IEEE Symposium
on Circuits and Systems, Rio de Janeiro, Brazil, presented in Special Session: Emerging
Energy & Power Integrated Circuits, pp. 305-308, May 2011.
K. W. Li and K. N. Leung, “A Low-Power MICS Fractional-N Frequency Synthesizer for
Implantable Biomedical Systems,” IEEE Asia Pacific Conference on Circuits and Systems,
Kaohsiung, Taiwan, pp. 168-171, Dec. 2012.
S. Bu and K. N. Leung, “A 116-dB CMOS Op Amp with Repetitive Gain Boosting and
Subthreshold Operation,” IEEE International Conference on Electron Devices and
Solid-State Circuits, Hong Kong, Jun. 2013.
o Undergraduate research done at CUHK
J. P. Guo and K. N. Leung, “A 25mA CMOS LDO with −85dB PSRR at 2.5MHz,” IEEE
Asian Solid-State Circuits Conference, Singapore, pp. 381-384, Nov. 2013.
M. Ho, S. Bu, Y. Q. Zheng, K. N. Leung and J. P Guo, “A 124-dB Double-Gain-Boosted
Cascode Amplifier with 92% Rail-to-Rail Output Swing,” IEEE Asia Pacific Conference
on Circuits and Systems, Okinawa, Japan, pp. 181-184, Nov. 2014.
M. Ho, K. N. Leung, P. Y. Or and J. P Guo, “Analysis of CMOS Low-Dropout
Regulator—Power-Supply Rejection Ratio,” IEEE Asia Pacific Conference on Circuits and
Systems, Okinawa, Japan, pp. 109-112, Nov. 2014.
S. Bu, M. Ho, K. N. Leung and J. P. Guo, “Load Regulation Cancellation Based on
Adaptive Body Bias for STC-LDOs,” IEEE Asia Pacific Conference on Circuits and
Systems, Okinawa, Japan, pp. 101-104, Nov. 2014.
o Undergraduate research done at CUHK
Y. Q. Zheng, M. Ho, K. N. Leung and J. P Guo, “A Fixed-Frequency Auto-Buck-Boost
SIMO DC-DC Converter with Duty-Cycle Redistribution and Duty-Predicted Current
Control,” IEEE International Symposium on Circuits & Systems, Lisbon, Portugal, pp.
225-228, May 2015.
S. Bu, H. W. Tse, K. N. Leung, J. P. Guo and M. Ho “Gain and Slew Rate Enhancement
for Amplifiers Through Current Starving and Feeding,” IEEE International Symposium on
Circuits & Systems, Lisbon, Portugal, pp. 2073-2076, May 2015.
o Undergraduate research done at CUHK
p. 8
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K. H. Mak, M. Ho, K. N. Leung and W. L. Goh, “Design Considerations of STCB OTA in
CMOS 65nm with Large Capacitive Loads,” IEEE International Symposium on Circuits &
Systems, Lisbon, Portugal, pp. 2465-2468, May 2015.
Y. Q. Zheng, M. Ho, K. N. Leung, J. P Guo and H. Chen, “A Robust
Cross-Regulation-Suppressed Single-Inductor Multiple-Output DC-DC Converter with
Duty-Regulated Comparator Control,” IEEE International Midwest Symposium on Circuits
and Systems, Fort Collins, Colorado, USA, Aug. 2015.
Y. Q. Zheng, M. Ho, K. N. Leung, J. P Guo and B. Chen, “A Digital-Control Sensorless
Current-Mode Boost Converter with Non-Zero Error Bin Compensation and Seamless
Mode Transition,” IEEE International System-on-Chip Conference, Beijing, China, pp.
94-99, Sep. 2015.
M. W. Lau, M. Ho, K. H. Mak, S. Bu, K. N. Leung and W. L. Goh, “A
Miller-Compensated Amplifier with Gm-Boosting,” IEEE TENCON, Macau, Nov. 2015.
o Undergraduate research done at CUHK
o Best Paper Award (Special Session: Women in Engineering)
M. W. Lau, C. H. Hung, K. N. Leung and W. L. Goh, “Cross-Coupled Gm-Boosting
Technique for Two-Stage Miller-Compensated Amplifier,” IEEE International Conference
on Electron Devices and Solid-State Circuits, Hong Kong, Aug. 2016.
J. B. Jia, M. Ho and K. N. Leung, “A Reconfigurable UHF CMOS Voltage Multiplier,”
IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong,
Aug. 2016.
J. B. Jia, M. Ho, K. N. Leung and J. P. Guo, “A Regulated Voltage Multiplier for Passive
RFID Tag,” The 15th International Symposium on Integrated Circuits, Singapore, Dec.
2016, accepted for publication.
L. Zhu, B. Chen, J. P. Guo, Y. Q. Zheng, M. Ho and K. N. Leung, “A Fast-Response
Buck-Boost DC-DC Converter with Constructed Full-Wave Current Sensor,” The 15th
International Symposium on Integrated Circuits, Singapore, Dec. 2016, accepted for
publication.
B. Chen, L. Zhu, J. P. Guo, Y. Q. Zheng, M. Ho and K. N. Leung, “A Shared-MSB
Delay-Line-Based ADC with Simultaneous Quantization for Digital Control
Single-Inductor-Multiple-Output DC-DC Converter,” The 15th International Symposium
on Integrated Circuits, Singapore, Dec. 2016, accepted for publication.
Presentations
1.
2.
3.
4.
5.
J. P. Guo and K. N. Leung “High PSRR LDO with Embedded Ripple Feed-Forward Path,”
IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, California,
USA, Student Research Preview, Feb. 2011.
M. Ho and K. N. Leung, “A High-Loop-Gain-Bandwidth Nanoscale Low-Dropout
Regulator with All Minimum-Channel-Length Transistors,” Student Symposium of ED/SSC,
Dec. 2012. (Best paper award)
H. C. Poon and K. N. Leung, “A Transient-Enhanced Low-Dropout Regulator with
Non-Static Impedance, Student Symposium of ED/SSC, Dec. 2012.
S. Bu and K. N. Leung, “Optimization of Load Regulation for Low-Dropout Regulators,”
Student Symposium of ED/SSC, Dec. 2014. (Best paper award)
K. H. Mak, K. N. Leung and W. L. Goh, “Optimizations of Scaling Factor and Stage
Number of a STCB Amplifier,” Student Symposium of ED/SSC, Dec. 2014. (Best paper
award)
p. 9
Patents
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2.
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4.
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7.
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K. N. Leung, P. K. T. Mok, W. H. Ki and J. K. O. Sin, “Frequency Compensation
Techniques for Low-Power Multistage Amplifiers,” U.S. Patent 6,208,206, Mar. 27, 2001,
licensed.
K. N. Leung, P. K. T. Mok and K. C. Kwok, “CMOS Voltage Reference,” U.S. Patent
6,441,680, Aug. 27, 2002, licensed.
K. N. Leung and P. K. T. Mok, “Low Dropout Regulator Capable of On-Chip
Implementation,” U.S. Patent 7,205,827, Apr. 17, 2007, licensed.
T. Y. Man, C. Y. Leung, K. N. Leung, P. K. T. Mok and M. Chan,
“Single-Transistor-Control Low-Dropout Regulator,” U.S. Patent 7,285,942, Oct. 23, 2007,
licensed.
P. K. T. Mok, S. K. Lau and K. N. Leung, “Area-Efficient Capacitor-Free CMOS
Low-Dropout Regulator,” U.S. Patent 7,495,422, Feb. 24, 2009, licensed.
P. K. T. Mok, M. Siu and K. N. Leung, “End-Point Prediction Scheme for Voltage
Regulators,” U.S. Patent 7,619,395, Nov. 17, 2009, licensed.
K. N. Leung, and P. K. T. Mok, “Low Dropout Regulator Capable of On-Chip
Implementation,” US Patent RE42,116, Feb. 8, 2011, re-issued.
T. Y. Man, C. Y. Leung, K. N. Leung, P. K. T. Mok, and M. Chan, “Single-Transistor-Control
Low-Dropout Regulator,” US Patent RE42,335, May 10, 2011, re-issued.
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