IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 6, JUNE 2010 615 1/f Noise of Silicon Nanowire BioFETs Nitin K. Rajan, David A. Routenberg, Jin Chen, and Mark A. Reed, Fellow, IEEE Abstract—The 1/f noise of silicon nanowire (NW) biological field-effect transistors (NW FETs with exposed channels) is characterized and compared with various fabrication approaches, specifically, a wet orientation-dependent etch (ODE) versus common plasma-based etching methods. The wet-etched devices are shown to have significantly lower noise and subthreshold swing, and the average extracted Hooge parameter for ODE wet-etched devices (αH = 2.1 × 10−3 ) is comparable to the values reported for submicrometer MOSFETs with a metal/HfO2 gate stack. Index Terms—Etching, low-frequency noise (LFN), MOSFET, nanowire (NW). I. I NTRODUCTION S ILICON nanowire (Si NW) and nanometer-scale fieldeffect transistors (FETs) have proved to be quite useful as chemical and biological FETs (bioFETs). However, efforts to fabricate such devices by top-down lithographic methods have often exhibited degraded electrical characteristics associated with the exposed silicon surfaces and high surface-to-volume ratios inherent in NW sensors [1]–[3]. These surfaces have most often been prepared by plasma-etching techniques, long known to cause surface states and bulk damage [4], [5]. The presence of these defects has likely been the source of high levels of lowfrequency noise (LFN), diminished sensitivity, and threshold voltage hysteresis in NW sensors. Anisotropic wet etching has been previously proposed as a method for producing bioFETs with high-quality surfaces as compared to plasma-etched nanostructures. While devices have been fabricated using tetramethylammonium hydroxide (TMAH) to produce smoothly faceted NW devices [6], [7], it has not been demonstrated conclusively and quantitatively that the wet-etching process is responsible for the superior electrical performance of these devices. Here, we verify these claims by comparing nominally identical bioFETs fabricated by TMAH anisotropic etching, as well as two common plasma-etching methods. LFN is of particular importance in devices used for chemical and biological sensing, where the changes in signal levels are small and the signal-to-noise ratio limits the sensitivity of the sensor [7], [8]. The subthreshold swing determines the maximum sensitivity of the devices to charged species since the dependence of current on gate voltage is exponential in the subthreshold region [9]. In both cases, we demonstrate signifiManuscript received February 10, 2010; revised March 10, 2010. Date of publication May 14, 2010; date of current version May 26, 2010. This work was supported in part by the National Institutes of Health under Grant R01EB008260. The first two authors contributed equally to this work. The review of this letter was arranged by Editor L. Selmi. The authors are with Yale University, New Haven, CT 06520-1942 USA (e-mail: nitin.rajan@yale.edu; davidroutenberg@yahoo.com; jin.chen@yale. edu; mark.reed@yale.edu). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2010.2047000 Fig. 1. Si NW FET fabricated by TMAH etching. The inset shows the transfer characteristics. TSI refers to the thickness of the silicon channel, whereas TBOX refers to the thickness of the buried oxide layer. cantly better performance from the TMAH-etched devices than similar devices fabricated by plasma-etching techniques which we attribute to a decrease in surface state density. II. D EVICE FABRICATION AND E XPERIMENTAL M ETHODS NW channel FETs were fabricated from SOI (Soitec). The high-resistivity active layer was thinned to 25 nm using sacrificial oxidation. Source and drain regions were patterned by contact lithography and doped by As+ ion implantation. NW channels and large source and drain pads were patterned in hydrogen silsesquioxane by electron beam lithography. The pattern was transferred through the active silicon layer using either a TMAH anisotropic wet etch (25% in H2 O at 50 ◦ C), a Cl2 inductively coupled plasma etch (Oxford 100), or a CF4 reactive-ion etch (Oxford 80). The devices were then metallized by titanium/gold evaporation and patterned by liftoff. The finished device is shown in Fig. 1. The NW channels were nominally 100 nm wide and 2.5 μm long. The transfer characteristics were measured on a parameter analyzer, from which the subthreshold slopes and field-effect mobilities were extracted. A typical transfer curve for our NW FETs is shown in the inset in Fig. 1. Noise measurements were performed under dc conditions using a Keithley 2636 source meter. The devices were biased at a source–drain voltage of 0.1 V, and the gate voltages were chosen so that the devices were always operated in the linear region of the Id –Vg (transfer) curve. The drain current was measured at a sampling rate of 25 Hz, and 5 × 105 samples were stored for later signal processing. The spectral power density was estimated using Welch’s modified periodogram method implemented in MATLAB [10]. The noise spectral analysis, as well as the calculation of the field-effect mobility, requires an accurate determination of the gate capacitance. Due to our device geometry and the absence 0741-3106/$26.00 © 2010 IEEE 616 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 6, JUNE 2010 of a surrounding gate (because of sensing applications), the voltage-dependent capacitance of the NW FET channel is many orders of magnitude less than the capacitance of the source and drain, as well as the metallic fan-in and contact structures. Moreover, the back gate consists of the nondegenerately doped handle layer of the SOI wafer, and this parasitic capacitance is also voltage dependent, precluding an accurate experimental determination of the gate-channel capacitance of an individual device. Thus, we simulated the devices using ATLAS Device 3D to calculate the capacitance of the NW FETs based on dimensions verified by SEM analysis. III. R ESULTS AND D ISCUSSION The LFN of our devices follows Hooge’s equation SI = αH Id2 fβN (1) given by the mobility fluctuation model [11], [12], where N is the number of carriers and αH is the Hooge constant which is used to quantitatively assess and compare the noise performance of our devices. The exponents β for our devices were found to lie in the range 0.8 < β < 1.5. LFN is usually characterized by an exponent 0.8 < β < 1.2 [13]. The slightly higher exponents encountered in our case can be understood by the presence of RTS signals superimposed on the mobility fluctuation 1/f noise [14]. In the present situation, we do not expect to be able to observe RTS on top of 1/f noise since we will show that our devices satisfy the “rule of thumb” N > 1/αH [15]. Exceptions to the rule of thumb are possible in the case of inhomogeneous samples, which would explain additional RTS noise giving rise to a higher 1/f exponent than expected for pure 1/f noise [16], [17]. Nonetheless, we confirm the validity of the mobility fluctuation model by observing the invariance of the noise amplitude A = αH /N on the drain current, measured at a fixed gate voltage and varying Vds , as well as the linear dependence of 1/A on the gate voltage at fixed Vds . Since, here, we operate the devices in the linear region of the transfer curve, the number of carriers is given by C N = (Vg − Vth ) e (2) where C is the gate capacitance which is simulated using ATLAS Device 3D and Vth is the threshold voltage. Fig. 2 shows the typical normalized drain current noise power spectra (SI /Id2 ) for a Si NW FET at various gate voltages. The noise amplitude A can be obtained at f = 1 Hz from a least squares linear fit of the noise spectra. From the linear dependence of 1/A on Vg , a value for αH can be extracted (shown in the inset in Fig. 2). The Hooge constant αH is determined in this manner for several devices from each etch method, and the results are shown in Fig. 3(a). The TMAH-etched devices have a considerably lower Hooge constant (close to an order of magnitude lower) than the plasma-etched devices and show smaller device-to-device variations. The average Hooge constant for the TMAH-etched devices is given by αH = 2.1 × 10−3 , which is comparable to the Hooge constant values reported for submicrometer MOSFETs with a metal/HfO2 gate stack (αH = 1.6 × 10−3 for NMOS and αH = 6.9 × 10−3 for Fig. 2. Typical dependence of 1/f noise spectra on gate voltage for a TMAH-etched device, from which the noise amplitude A, at each gate voltage (13–25 V), can be extracted. The inset shows 1/A plotted as a function of Vg , where the slope of the solid line (linear fit) is used to calculate αH . Fig. 3. (a) Measured Hooge parameters for three sets of devices. Each set was etched using either TMAH or Cl2 or CF4 . The box plot shows the 25th percentile, the median, and the 75th percentile (the mean is indicated by a square marker). The average values of αH were 0.0021 for the TMAH devices, 0.015 for the Cl2 devices, and 0.017 for the CF4 -etched devices. (b) Measured subthreshold swing for three sets of devices, etched using either TMAH or Cl2 or CF4 . The average value for the TMAH devices was 1.0 V/decade. For Cl2 etched devices, the average was 2.6 V/decade, and for CF4 devices, the average was 3.0 V/decade. PMOS) [18]. The average Hooge parameters for the plasmaetched devices are 1.5 × 10−2 for Cl2 devices and 1.7 × 10−2 for CF4 devices. An alternative approach based on a trapping–detrapping model [19], [20] to analyze the noise measurement data makes use of the empirical relationship SId = 2 M gm 2 W Lf β Cox where M is the parameter to be extracted. W and L are the width and length of the channel, respectively, gm is the transconductance at the operating point of the measurement, and Cox is the gate capacitance per unit area. Using the aforementioned model, the average M parameter for the TMAHetched devices is M = (6 ± 2) × 10−24 . Likewise, the average values for the plasma-etched devices are M = (22 ± 10) × 10−24 for the Cl2 devices and M = (12 ± 4) × 10−24 for the CF4 devices. A similar trend is observed for the noise parameter M , where the TMAH-etched devices exhibit a lower noise figure than the plasma-etched ones. RAJAN et al.: 1/f NOISE OF SILICON NANOWIRE BioFETs TABLE I AVERAGE F IELD -E FFECT M OBILITY AND C ORRESPONDING S TANDARD D EVIATIONS FOR TMAH-, Cl2 -, AND CF4 -E TCHED D EVICES A RE C OMPARED The subthreshold swing measurements for each type of device are shown in Fig. 3(b). These values are all quite high due to the thickness of the buried oxide serving as the gate insulator. However, the TMAH devices exhibit significantly lower average subthreshold swing and smaller device-to-device variation than either of the plasma-etched devices. We attribute the lower noise figure and lower subthreshold swing, in the case of the wet-etched devices, to a lower density of surface states at the etched sidewalls. The difference in capacitance values is negligible and cannot account for the differences in the measured subthreshold swing, which we ascribe to variations in the interface state density. The noise and subthreshold swing measurements, therefore, quantitatively confirm that wet-etching-based methods yield smoother surfaces and consequently better electrical characteristics. We also measured the field-effect electron mobility for devices fabricated using each of the etching methods. Field-effect mobility can be calculated for planar FETs using Lgm (3) μFE = W Cox Vds where Cox is the gate capacitance per unit area and gm is the maximum value of the transconductance, determined from the numerical derivative of the transfer characteristics. As shown in Table I, we observed no statistically significant difference between the TMAH- and Cl2 -processed devices, although both exhibited less degradation than the CF4 RIE-processed devices. IV. C ONCLUSION We have demonstrated the use of anisotropic wet orientationdependent etching with TMAH as a method of producing bioFETs with high-quality surfaces and, consequently, superior electrical characteristics as compared to plasma-etched surfaces. Our results lead us to conclude that, as bioFET devices are downscaled further and the surface-to-volume ratio increases, the particular etch process used will be critical in determining the density of surface states and, ultimately, the noise performance. We have also demonstrated that TMAH-etched NW devices have considerably lower subthreshold swing than devices produced by two common plasma processes suggesting lower surface state densities and, consequently, higher sensitivity when such devices are employed as chemical or biological sensors. 617 R EFERENCES [1] I. Li, Y. Chen, X. Li, T. I. Kamins, K. Nauka, and R. S. Williams, “Sequence-specific label-free DNA sensors based on silicon nanowires,” Nano Lett., vol. 4, no. 2, pp. 245–247, Feb. 2004. [2] N. Elfstrom, R. Juhasz, I. Sychugov, T. Engfeldt, A. E. Karlstrom, and J. Linnros, “Surface charge sensitivity of silicon nanowires: Size dependence,” Nano Lett., vol. 7, no. 9, pp. 2608–2612, Aug. 2007. [3] E. Stern, J. F. Klemic, D. A. Routenberg, P. N. Wyrembak, D. B. Turner-Evans, A. D. Hamilton, D. A. LaVan, T. M. Fahmy, and M. A. Reed, “Label-free immunodetection with CMOS-compatible semiconducting nanowires,” Nature, vol. 445, no. 7127, pp. 519–522, Feb. 2007. [4] D. Misra and E. L. Heasell, “Electrical damage to silicon devices due to reactive ion etching,” Semicond. Sci. Technol., vol. 5, no. 3, pp. 229–236, Mar. 1990. [5] M. Saitoh, T. Murakami, and T. Hiramoto, “Large Coulomb blockade oscillations at room temperature in ultranarrow wire channel MOSFETs formed by slight oxidation process,” IEEE Trans. Nanotechnol., vol. 2, no. 4, pp. 241–245, Dec. 2003. [6] H. Namatsu, S. Horiguchi, M. Nagase, and K. Kurihara, “Fabrication of one-dimensional nanowire structures utilizing crystallographic orientation in silicon and their conductance characteristics,” J. Vac. Sci. Technol. B, Microelectron. Process. Phenom., vol. 15, no. 5, pp. 1688–1696, Sep. 1997. [7] Y. Cheng, P. Xiong, C. S. Yun, G. F. Strouse, J. P. Zheng, R. S. Yang, and Z. L. Wang, “Mechanism and optimization of pH sensing using SnO2 nanobelt field effect transistors,” Nano Lett., vol. 8, no. 12, pp. 4179– 4184, Dec. 2008. [8] C. Q. Wei, Y. Z. Xiong, X. Zhou, N. Singh, S. C. Rustagi, G. Q. Lo, and D. L. Kwong, “Investigation of low-frequency noise in silicon nanowire MOSFETs in the subthreshold region,” IEEE Electron Device Lett., vol. 30, no. 6, pp. 668–671, Jun. 2009. [9] P. R. Nair and M. A. Alam, “Screening-limited response of nanobiosensors,” Nano Lett., vol. 8, no. 5, pp. 1281–1285, May 2008. [10] P. D. Welch, “Use of fast Fourier transform for estimation of power spectra: A method based on time averaging over short, modified periodograms,” IEEE Trans. Audio Electroacoust., vol. AU-15, no. 2, pp. 70–73, Jun. 1967. [11] F. N. Hooge, T. G. M. Kleinpenning, and L. K. J. Vandamme, “Experimental studies on 1/f noise,” Rep. Prog. Phys., vol. 44, no. 5, pp. 479–532, May 1981. [12] L. K. J. Vandamme and F. N. Hooge, “What do we certainly know about 1/f noise in MOSTs?,” IEEE Trans. Electron Devices, vol. 55, no. 11, pp. 3070–3085, Nov. 2008. [13] C. G. Jakobson and Y. Nemirovsky, “1/f noise in ion sensitive field effect transistors from subthreshold to saturation,” IEEE Trans. Electron Devices, vol. 46, no. 1, pp. 259–261, Jan. 1999. [14] J. Brini, G. Ghibaudo, G. Kamarinos, and O. Rouxditbuisson, “Scaling down and low-frequency noise in MOSFETs: Are the RTSs the ultimate components of the 1/f noise,” AIP Conf. Proc., vol. 282, no. 1, pp. 31–48, Jul. 1992. [15] T. G. M. Kleinpenning, “On 1/f noise and random telegraph noise in very small electronic devices,” Phys. B, vol. 164, no. 3, pp. 331–334, Sep. 1990. [16] L. K. J. Vandamme and M. Macucci, “1/f and RTS noise in submicron devices: Faster is noisier,” Unsolved Probl. Noise Fluctuations, vol. 800, pp. 436–443, 2005. [17] L. K. J. Vandamme, D. Sodini, and Z. Gingl, “On the anomalous behavior of the relative amplitude of RTS noise,” Solid State Electron., vol. 42, no. 6, pp. 901–905, Jun. 1998. [18] B. G. Min, S. P. Devireddy, Z. Celik-Butler, F. Wang, A. Zlotnicka, H. H. Tseng, and P. J. Tobin, “Low-frequency noise in submicrometer MOSFETs with HfO2 , HfO2 /Al2 O3 and HfAlOx gate stacks,” IEEE Trans. Electron Devices, vol. 51, no. 10, pp. 1679–1687, Oct. 2004. [19] C. Jakobson, I. Bloom, and Y. Nemirovsky, “1/f noise in CMOS transistors for analog applications from subthreshold to saturation,” Solid State Electron., vol. 42, no. 10, pp. 1807–1817, Oct. 1998. [20] Y. Nemirovsky, I. Brouk, and C. G. Jakobson, “1/f noise in CMOS transistors for analog applications,” IEEE Trans. Electron Devices, vol. 48, no. 5, pp. 921–927, May 2001.