27
CHAPTER 2
LITERATURE SURVEY
The literature survey focuses its attention towards multilevel inverter,
particularly to utilize under low power consumption, better performance and improved
efficiency. The implementation feasibility in VLSI environment is also studied and
analyzed in depth.
2.1 The FPGA Implementation of Pulse Width Modulation
N.A. Rahim et al, (2009) presented a Field Programmable Gate Array-Based
Pulse-Width Modulation for Single Phase Active Power Filter [58]. Further they
designed and implemented of a sinusoidal Pulse-Width Modulation (PWM) generator
for a single-phase hybrid power filter is presented. The PWM was developed in an
Altera Flex 10 K Field Programmable Gate Array (FPGA) and the modulation index
was selected by calculating the DC bus voltage of the active filter through a digital
controller, by Proportional-Integral-Derivative (PID) technique. The implemented
PWM generator using an FPGA required less memory usage while providing flexible
PWM patterns whether same phase, lagging, or leading, the reference voltage signal.
Experiment results showed the proposed active power filter topology to be capable of
compensating the load current and the voltage harmonic, up to IEC (Integrated
Electronic Circuit) limit.
Bogdan et al, (2011) presented a Comparison between two Modulation
Techniques for Three Phase Inverters from a Hardware Implementation Point of View
[11]. They compared between two modern modulation techniques applied to three
phase inverters from a hardware implementation point of view. They considered
techniques are the sinusoidal pulse width modulation with zero sequence injection and
28
the space vector modulation. Both the modulation algorithms were implemented in
hardware on FPGA, and the resulted designs are compared for resource usage
efficiency, obtained speed and ease of integration within a complex AC drive control
system.
The implementation of these algorithms in hardware on FPGA, shortly
presented here, is very fast, taking advantage of parallel computations and fast
embedded multipliers, capable to perform an 18x18 bit multiplication in less than 5ns.
R.Ruelland et al, (2003) presented a Design of FPGA-Based Emulator for Series
multi-cell Converters Using Co-Simulation Tools [64]. That FPGA-based estimation of
multi-cell converters is possible. Depending on the type of circuit, different integration
methods should be chosen. In this example, Euler and Matrix Exponential are used in
parallel to simulate two different parts of the circuit. In the example at stake, the
switching frequency of the converter is approximately 20 kHz, and the results obtained
show that the sampling frequency of currently available FPGAs is high enough to make
these methods efficient.
Jih-Sheng Lai et al, (1996) presented a Multilevel Converter-A New Breed of
Power Converters [31]. This work has presented three transformers less multilevel
voltage source converters that synthesize the converter voltage by equally divided
capacitor voltages. All these converters have been completely analyzed and simulated.
Two hardware models have been built and tested to verify the concept. Both simulation
and experimental results prove that these multilevel converters are very promising for
power system applications. The application that has been mentioned most frequently in
the literature is SVG. All three multilevel converters can be applied to SVG’s without
voltage unbalance problems because the SVG does not draw real power.
Eric William Zurita-Bustamante et al, (2012) presented a FPGA Implementation
of PID Controller for the Stabilization of a DC-DC “Buck” Converter [22]. They have
applied the Proportional Integral Derivative control scheme, synthesized via a Field
29
Programmable Gate Array implementation, for the output voltage regulation in a
DC/DC power converter of the “buck” type. The performance of the PID control action
was synthesized via a FPGA. The results obtained by co-simulation allowed studying
each of the units designed and modeled in VHDL, correcting some errors and, in
addition, the co-simulation was a perfect tool allowing faster design process to get a
full system simulation before implement the system in the FPGA board. The
experimental results show the effectiveness of the FPGA realization of both the PID
controller, in this case, programmed into the FPGA. This methodology of design can be
used to design switched mode power supplies with efficiency greater than 95%.
Sebastien Mariéthoz et al, (2010) presented a Comparison of Hybrid Control
Techniques for Buck and Boost DC/DC Converters [66]. Five control methods from
hybrid and optimal control have been successfully applied to fixed frequency dc-dc
buck and boost converters and compared through experimentation. The methods
presented by ETH, LTH, KTH, and CRAN all act at the beginning of each switching
period and use the duty cycle as the manipulated variable, rendering a constant
switching frequency operation; The method of SUPELEC, on the other hand, directly
decides on the discrete position of the controlled switch based on a much faster
sampling of the system, and results in a scheme with an improved reaction time to
disturbances, but also requires a higher measurement bandwidth and results in a
variable switching frequency. The methods perform similarly well and display an
excellent dynamic performance. Most differences that have been observed are related
to the tuning of the controller or to additional control functions that are not linked to a
specific approach except for SUPELEC where the faster reaction to disturbances is
inherent to the direct control approach and the higher sampling frequency.
Mariko Shirazi et al, (2009) presented an Auto tuning Digital Controller for
DC/DC Power Converters Based on Online Frequency-Response Measurement [46].
This work has described a hardware description language (HDL) coded auto tuning
30
algorithm for digital PID controlled DC/DC power converters based on online
identification of control-to-output frequency response. The algorithm determines the
PID controller parameters required to maximize the closed-loop bandwidth of the
feedback control system while of the integral asymptote of the PID. Experimental
results are provided for five different pulse width-modulated DC/DC converters,
including a well-damped synchronous buck, a lightly damped synchronous buck with
and without a poorly damped input filter, a boost operating in continuous-conduction
mode, and a boost operating in discontinuous-conduction mode.
John Sustersic et al, (2000) presented a Design and Implementation of a Digital
Controller for DC/DC Power Converters [32]. They proposed to control an H-bridge
DC/DC isolated output power converter. The multiple mode digital controllers are
evaluated with an existing Westinghouse 1-kW power stage. The digital controller was
developed
using
MATLAB/Simulink.
the
The
space
digital
rapid
prototype
controller
development
demonstrates
good
system
and
steady-state
performance under the indicated conditions for both controller implementations. The
controller developed features a novel architecture in which a CPLD device is used for
PWM generation. Separating this converter function from the control DSP eases the
DSP’s computational load and provides a level of system fault tolerance. Evaluations
of the initial selected control strategies show fast transient recovery for load and line
disturbances and the potential for stable, tight steady state output voltage regulation.
Oscar Lopez et al, (2008) presented a Multilevel Multiphase Space Vector PWM
Algorithm [52]. A new multilevel multiphase SVPWM algorithm is presented. This
algorithm is based on a displacement plus a two-level multiphase SVPWM modulator.
It is valid for any number of phases or levels and it can be used with the standard
multilevel topologies. The presented modulation technique handles all switching states
of the inverter and it provides a sorted switching vector sequence that minimizes the
number of switching’s. In addition, the proposed SVPWM algorithm proves suitable
31
for real-time implementation due to its low computational complexity. Finally, a fivelevel five-phase version was implemented in a low-cost FPGA and successfully tested
by using a laboratory prototype.
2.2 Harmonic Elimination of H-Bridge Seven Level Inverter
Farid Khoucha et al, (2010) presented a Hybrid Cascaded H-Bridge MultilevelInverter Induction-Motor-Drive Direct Torque Control for Automotive Applications
[36]. They dealt with a comparison study for a cascaded H-bridge multilevel DTC
induction motor drive. Indeed, symmetrical and asymmetrical arrangements of fiveand seven-levels H-bridge inverters have been compared in order to find an optimum
arrangement with lower switching losses and optimized output voltage quality. An
asymmetrical con-figuration provides nearly sinusoidal voltages with very low
distortion, using less switching devices. In addition, torque ripples are greatly reduced:
asymmetrical multilevel inverter enables a DTC solution for high-power induction
motor drives.
not only due to the higher voltage capability provided by multilevel
inverters, but mainly due to the reduced switching losses and the improved output
voltage quality, which provides sinusoidal current without output filter.
This work
has deal with a hybrid cascaded H-bridge multi-level motor drive DTC control scheme
that has big potential for EVs or HEVs. The main achievements of the proposed control
method are significant reduction in the torque ripple, sinusoidal output voltages and
currents, lower switching losses, and a high-performance torque and flux regulation.
The hybrid multilevel inverter enables a DTC solution for high-power mo-tor drives,
not only due to the higher voltage capability provided by multilevel inverters but also
mainly due to the reduced switching losses and the improved output voltage quality,
which provides a sinusoidal current without an output filter. This inverter provides
nearly sinusoidal voltages with very low distortion, even without filtering, using fewer
switching devices. In addition, the multilevel inverter can generate a high and fixed
32
switching frequency output voltage with fewer switching losses, since only the small
power cells of the inverter operate at a high switching rate.
Dr.Hina Chandwani et al, (2013) Comparison of Asymmetrical Cascaded
Multilevel Inverter Control Techniques [21]. This work presents asymmetrical
cascaded multilevel inverter approach for high power output applications. It is based on
the cascade connection of the H-bridge inverter cells. Comparison of symmetrical and
asymmetrical current source multi level inverter is shown using 2 H-bridge inverter
cells with cascade connection. The scheme of Optimization angle control technique for
CMLI was proposed to improve the output current. And it has been concluded that by
increasing no. of levels for the output current, the THD can be reduced. No. of levels
can be increased by increasing the no. of bridges of MLI. Further for same no. of
bridges in ACMLI, in ternary progression output current has more levels then binary.
ACMLI are cheaper than the SCMLI and also operate at low THD levels with same no
of bridges. Due to its inherent advantages ACMLI is most preferable than SCMLI.
Jannu Ramu et al, (2012) presented a Comparison between Symmetrical and
Asymmetrical Single Phase Seven Level Cascade H-Bridge Multilevel Inverter with
PWM Topology [30]. They compared between single seven levels H-bridge Inverter,
which uses equal DC sources and symmetrical MLI and different DC sources an
asymmetrical MLI, is used as load to observe the performance output voltages. The
proposed ISPWM will give the FFT Analysis THD values 21.84 voltage of 332.7 that
the number of bridges and DC sources switching losses are reduced. When compared to
symmetrical MLI. Simulations have been carried out in MATLAB SIMULINK to
study the performance of the proposed prototype. A predictive current control
technique has been carried out to verify the viability of new configuration.
Feel-soon Kang and Yeun-Ho Joung, (2012) presented Cascaded Multilevel
Inverter Using Bidirectional H-bridge Modules [24]. This method presents a multilevel
inverter configuration which is designed by insertion of a bidirectional switch between
33
capacitive voltage sources and a conventional H -bridge module. The modified inverter
can produce a better sinusoidal waveform by increasing the number of output voltage
levels. They proposed a cascaded H-bridge multilevel inverter using bidirectional
switches to increase the number of output voltage levels with minimum devices. The
circuit configuration is simple and easy to control. The operational principle and key
waveforms are illustrated and analyzed. Also, they have selected two kinds of
switching patterns among 24 patterns, which can produce a 9-level output voltage. The
proposed multilevel inverters can be utilized in solar power generation, which has
merits as an independent voltage source.
G.Murali Krishna et al, 2012 presented a THD Analysis of Symmetrical and
Asymmetrical Cascaded H-Bridge Multilevel Inverters with PV Arrays [49]. Multilevel
cascaded H-bridge inverters from five levels to seventeen levels have been simulated
using Matlab/Simulink. The symmetrical Cascaded H-bridge multilevel inverter
consists of the number of switches increases for increase the number of levels. And
also control circuit, complexity, maintenance increases. The asymmetrical cascaded Hbridge multilevel inverters to get the 7 level to 17 level output voltage. The THD
decreases to increase the number of levels, some lower or higher harmonic contents
remain dominant in each level. These will be more dangerous induction drives. Hence
the future work may be focus on implementing closed loop control with suitable
harmonic elimination technique to achieve better performance of the converter. The
fuel cell and photo voltaic cells are used for multilevel inverter input voltage of dc
sources. The future scope is to determine the PWM techniques of asymmetrical
multilevel inverters then to reduce the harmonic content in the output voltage of the
asymmetrical multilevel inverters.
Amir Sajjad Bahman, (2013) presented a Comparison of the Hybrid Asymmetric
and Conventional Multilevel Inverters for Medium Voltage Drive Applications [4].
Different topologies of multilevel inverters consisting cascaded symmetric, diode-
34
clamped, flying-capacitor, and hybrid asymmetric are investigated. It will be shown
that hybrid asymmetric inverter has more reliable topology than others, due to less
number of power semiconductor switches and higher voltage levels. Also different
multilevel modulation techniques will be studied form voltage waveforms and
harmonic spectra aspects. This study proves that Phase Disposition Pulse Width
Modulation shows less harmonic distortion than other techniques. The hybrid
asymmetric multilevel inverter, due to its benefits both in load and line sides is
presented as a new topology for industrial applications, especially in medium voltage
drives. In recent years, asymmetric multilevel inverters have been considered widely
because of the high number of output voltage levels and high reliability with a limited
number of needed components.
G.Lavanya and N.Muruganandham, (2013) presented a THD Minimization of a
Cascaded Nine Level Inverter Using Sinusoidal PWM and Space Vector Modulation
[41]. In this paper first comparative analysis of Space Vector PWM with conventional
SPWM for a 9 level Inverter is carried out. The Simulation study reveals that SVPWM
gives 0.92% enhanced fundamental output with better quality i.e.
Lesser THD
compared to SPWM. Space vector Modulation Technique has become the most popular
and important PWM technique for Three Phase Inverters. In this paper first
comparative analysis of Space Vector PWM with conventional SPWM for a 9 level
Inverter is carried out. The Simulation study reveals that SVPWM gives 0.92%
enhanced fundamental output with better quality i.e. lesser THD compared to SPWM.
PWM strategies viz. SPWM and SVPWM are implemented in MATLAB/SIMULINK
software and its performance is compared with conventional PWM techniques. A new
flying capacitor voltage balancing scheme has been proposed for the FCMLI which
uses the special charging or discharging of the flying capacitors to balance their
voltages and at the same time producing the desired output line currents using
hysteresis control. The topology has been simulated and the result shows that the total
harmonic distortion is reduced.
35
2.3 Nine Level Asymmetric Inverter
Bahman et al, (2013) presented Comparison between 9-level hybrid asymmetric
and conventional multi-level inverters for medium voltage application [4]. A hybrid
asymmetric 2-cell 9-level inverter is analyzed and compared with two conventional
multilevel inverters: the 9-level cascaded H-bridge and the 3-level diode clamped
inverter, when used to drive an induction motor of 4.16kV/500kVA. In this analysis,
Total Harmonic Distortion (THD), First Order Distortion Factor (DF1), power
semiconductor losses, and efficiency are selected as performance indexes. The results
indicate that the hybrid asymmetric topology has a better performance in performance
indexes than the other topologies which leads to energy saving, better power quality
and reduction in size, weight and volume of the LC-filter.
G.Lavanya and N.Muruganandham, (2013) reported that THD Minimization of
a Cascaded Nine Level Inverter Using Sinusoidal PWM and Space Vector Modulation
[41]. Multi-level inverters offer several advantages such as a better output
voltage with reduced total harmonic distortion (THD), reduction of voltage ratings
of the power semiconductor switching devices and also the reduced electro-magnetic
interference problems etc. Multilevel inverters synthesis the AC output voltages from
various DC voltages. Space Vector Modulation (SVM) is one of the most popular
PWM techniques used in multilevel inverters. SVM provides a best space vector
performance, sequences of different space vectors suitable for voltage source inverter is
identified. a 9 level cascaded H-bridge inverter model for space vector PWM is
established and simulated using MATLAB/SIMULINK software and its performance
is compared with sinusoidal PWM. The simulation study reveals that space vector
PWM utilizes dc bus voltage more effectively and generates less THD when compared
with sine PWM.
Rachid Taleb et al, (2009) presented a Control of a Uniform Step Asymmetrical
9-Level Inverter Based on Artificial Neural Network Strategy [57] .A neural
36
implementation of a harmonic elimination strategy for the control a uniform step
asymmetrical 9-level inverter is proposed and described in this paper. A Multi-Layer
Perceptions (MLP) neural network is used to approximate the mapping between the
modulation rate and the required switching angles. After learning, the neural network
generates the appropriate switching angles for the inverter. This leads to a lowcomputational-cost neural controller which is therefore well suited for real-time
applications. This neural approach is compared to the well-known Multi-Carrier PulseWidth Modulation (MCPWM). Simulation results demonstrate the technical
advantages of the neural implementation of the harmonic elimination strategy over the
conventional method for the control of a uniform step asymmetrical 9-level inverter.
The approach is used to supply an asynchronous machine and results show that the
neural method ensures a highest quality torque by efficiently canceling the harmonics
generated by the inverter.
Feel-soon Kang and Yeun-Ho Joung, (2012) presented A Cascaded Multilevel
Inverter Using Bidirectional H-bridge Modules [24]. A multilevel inverter
configuration which is designed by insertion of a bidirectional switch between
capacitive voltage sources and a conventional H-bridge module. The
modified
inverter can produce a better sinusoidal waveform by increasing the number of
output voltage levels. By serial connection of two modified H-bridge modules, it
is possible to produce 9 output voltage levels including zero. There are 24 basic
switching patterns with the 9 output voltage levels. Among the patterns, we select the 2
most efficient switching patterns to get a lower switching loss and minimum dv/dt
stress. We then analyze characteristics of Total Harmonic Distortion (THD) of the
output voltage with variation of input voltage by computer-aided simulations and
experiments.
Maruthu Pandi Perumal and Devarajan Nanjudapan, (2011) reported that the
Performance Enhancement of Embedded System Based Multilevel Inverter Using
37
Genetic Algorithm [47]. An optimal solution for eliminating pre species order of
harmonics from a stepped waveform of a multilevel inverter topology with equal dc
sources. The main challenge of solving the associated non linear equation which are
transcendental in nature and therefore have multiple solutions is the convergence of the
relevant algorithms and therefore an initial point selected considerably close to the
exact solution is required. An ancient genetic algorithm that reduces significant the
computational burden resulting in fast convergence. An objective function describing a
measure of electiveness of eliminating selected order of harmonics while controlling
the fundamental component is derived. The performance of cascaded multilevel
inverter is compared based on computation of switching angle using Genetic Algorithm
as well as conventional Newton Raphson approach. A significant improvement in
harmonic profile is achieved in the GA based approach.
R.Bensraj, et al,
(2010) presented Unipolar
PWM
using
Trapezoidal
Amalgamated Rectangular Function for Improved Performance of Multilevel
Inverter [7]. Ternary DC source multilevel inverter is triggered by the Unipolar PWM
strategy having sinusoidal and trapezoidal reference with inverted sine carriers. These
Pulse Width Modulating (PWM) techniques include Phase Disposition (PD), Alternate
Phase Opposition Disposition (APOD), and Carrier Overlapping (CO). Performance
factors like Total Harmonic Distortion (THD), VRMS (fundamental), crest factor and
form factor are evaluated for various modulation indices.
It
is
observed
that
UISCPDPWM strategy with trapezoidal reference provides output with relatively
low distortion and UISCOPWM strategy with trapezoidal reference provides
relatively higher fundamental RMS output voltage.
V.Chandana and S. Suriya, (2013) presented A Comparison of Symmetrical and
Asymmetrical Three-Phase Cascaded Multilevel Inverter Using Flexible Control
Technique for DTC Induction Motor Drives [12]. There
are
problems
in
the
limitations of conventional inverters, especially in high-voltage and high-power
38
applications. Recently multilevel inverters are becoming increasingly popular for highpower applications due to their improved harmonic profile and increased power ratings.
Several studies have been reported on multilevel inverters topologies, control
techniques, and applications. However, there are few studies that actually discuss or
evaluate the performance of induction motor drives associated with three-phase
multilevel inverter. a comparison study of symmetrical and asymmetrical for a
cascaded H-bridge multilevel using flexible control technique and also direct torque
control (DTC) for induction motor drive. In this case, symmetrical and asymmetrical
arrangements of five-level, seven-level, nine-level and eleven H-bridge inverters are
compared using flexible control technique vector space in order to find an optimum
arrangement with lower switching losses and optimized output voltage quality. So, as
to decrease the THD value (total harmonic distortion) the number of levels is
increased. The experiments show that an asymmetrical configuration provides
nearly sinusoidal voltages with very low distortion, using less switching devices.
Moreover, torque ripples are greatly reduced by increasing number of levels we
can bring step waveform to nearly sinusoidal waveform by decreasing the THD
value. Thus ripples are reduced and efficiency is increased.
G. Murali Krishna et al, (2012) presented that THD Analysis of Symmetrical and
Asymmetrical Cascaded H-Bridge Multilevel Inverters with PV Arrays [49]. The non
conventional energy sources are used compared with conventional energy source
because day by day the conventional energy sources are reduces. The main
energy supplier of the worldwide economy is fossil fuel. This however has led to
many problems such as global warming and air pollution. Therefore, with regard
to the worldwide trend of green energy, solar power technology has become one of
the most promising energy resources. The number of PV installations has had an
exponential growth mainly due to the governments and utility companies who
support
the idea of the green energy. One of the most important types of PV
installation is the grid connected inverter configurations. These grid connected PV
39
systems
can
be categorized
from
two
viewpoints:
PV
cell
and
inverter
configurations. The PV cell arrangements fall into four broad groups: centralized
technology, string technology, multi-string technology and AC-module and ACcell technologies. The PV cells are producing the dc sources. But all electrical
equipments are operated ac supply. So I want the ac supply by using inverters. The
multilevel inverters are used for high power rating compared to the inverters. The
symmetrical and asymmetrical multilevel inverters are simulated with dc sources
in Matlab/simulink. The THD analysis observed in the 5level to 17 level of
symmetrical asymmetrical multilevel inverters with dc sources.
L.Maharjan, et al, A transformer less battery energy storage system based on a
multilevel cascade PWM converter [43]. PWM control used to control the symmetrical
structure, as applied to the asymmetrical structure with a reduced number of cells,
provides the same performance level resolution and signal strength to the load
terminals. Thus guaranteeing a report voltage frequency constant, the same for the three
cells. This allows us to use different drivers till MOSFET, IGBT and GTO, therefore
we have for each cell a good performance from the intrinsic properties of each
semiconductor.
José Rodriguez et al, (2002) presented Multilevel Inverters: A Survey of
Topologies [62]. Multilevel inverter technology has emerged recently as a very
important alternative in the area of high-power medium-voltage energy control. The
most important topologies like diode-clamped inverter (neutral-point clamped),
capacitor- clamped (flying capacitor) and cascaded multi-cell with separate dc sources.
Emerging topologies like asymmetric hybrid cells and soft-switched multilevel
inverters are also discussed. This work also presents the most relevant control and
modulation methods developed for this family of converters: multilevel sinusoidal
pulse width modulation, multilevel selective harmonic elimination, and space-vector
modulation. Special attention is dedicated to the latest and more relevant applications
40
of these converters such as laminators, conveyor belts, and unified power-flow
controllers [60]. The need of an active front end at the input side for those inverters
supplying regenerative loads is also discussed, and the circuit topology options are also
presented. Finally, the peripherally developing areas such as high-voltage high-power
devices and optical sensors and other opportunities for future development are
addressed.
2.4 Twenty Seven Levels Asymmetric Inverter
Kiruthika et al, (2013) presented Multicarrier Based Asymmetric Multilevel
Inverter. A design of Pulse Width Modulation for Twenty Seven Level [37]
asymmetric cascaded multilevel inverter. It focuses on asymmetrical topologies, the
general function of this multi level inverter is to synthesize a desired voltage from
several separate dc source. This hybrid topology has more advantageous of industrial
applications. In conventional methods, the need of converters to supply the cells of
reversible multilevel converters increases the cost and losses of such inverters. The
proposed method introduces 27 levels Inverter fed Induction Motor drive. With the use
of high level inverter, resolution is increase and also the harmonics is highly reduced.
Dixon. J. et al, (2010) reported that Asymmetrical Multilevel Inverter for
Traction Drives Using Only One DC Supply [33]. The main advantage of asymmetrical
multilevel inverters is the optimization of levels with a minimum number of power
supplies. However, this optimized multilevel system still needs a large number of
isolated and floating dc supplies, which makes these converters complicated to
implement in electric vehicles (EVs), because the system will require many
independent battery packs. In this paper, a very simple scheme, based on a small and
cheap high-frequency link (HFL), allows the utilization of only one power supply for
the complete multilevel inverter drive, with an inherent regulation of the voltages
supplied among the H-bridges. It also allows voltage control with the full number of
levels if the dc source is of a variable voltage characteristic. This method is focused on
41
a 27-level asymmetric inverter, but the strategy, using only one power supply, can be
applied to converters with any number of levels. In particular, an asymmetrical 27-level
converter needs nine isolated power supplies, and the proposed system reduces these
nine sources to only one: the battery car. The topology also permits full regenerative
braking working as a three-level converter. The proposed system is intended for
application in EVs from power ratings up to 150 kW. Simulations and experimental
results show the feasibility to implement this “One-source” multilevel system.
K.Bharath, and Satputaley, (2013) Single Phase Asymmetrical Cascaded
Multilevel Inverter Design for induction motor [9]. Multilevel voltage source inverter
offer several advantages compared to their conventional counterparts. Cascaded Hbridge inverter provides Stepped AC voltage wave form with lesser harmonics at
higher levels by combining different ranges of voltage DC sources and the filter
components are reduced by increasing Step levels. By increasing the level of the
inverter we can get several advantages: get a good voltage wave form, Very low THD,
reduced volume and cost. The need of several sources on the DC side of the converter
makes multilevel technology attractive for photovoltaic applications. This paper
provides an overview of a multilevel inverter topology and investigates their suitability
for
single-phase
photovoltaic
systems.
A
simulation
model
is
based
on
MATLAB/SIMULINK is developed.
J. Dixon, et al, (2007), presented High-power machine drive, using no redundant
27-level inverters and active front end rectifiers [20]. A conventional 27-level cascade
multilevel inverter requires a combination of 13 H-bridge (single-phase full-bridge)
inverter modules. In this paper 27 level multilevel
inverter is obtained by using only
3 H-bridge inverter units with different dc voltage sources. By increasing the level of
the inverter we can get several advantages: get a good voltage wave form, Very low
THD, reduced volume and cost. The need of several sources on the DC side of the
converter makes multilevel technology attractive for many high power applications.
42
This paper provides an overview of a multilevel
inverter topology and investigates
their suitability for single-phase.
Dr. Hina Chandwani et al, (2013) presented that a Comparison of Asymmetrical
Cascaded Multilevel Inverter Control Techniques asymmetrical cascaded multilevel
inverter (ACMLI) approach for high voltage and high power output applications [21].
It is based on the cascade connection of the H-bridge inverter cells. Now ever by the
supplies which are in GP with different ratios like 2, 3, etc. The proposed configuration
is shown for 27 level inverters with symmetrical step control, optimization angle
control and. Structural and operational characteristics are discussed and their inherent
advantages are mentioned.
Dhaval Patel et al, (2012) presented that the Analysis and Simulation of
Asymmetrical Type Multilevel Inverter using Optimization Angle Control Technique
cascaded multilevel inverter (MLI) approaches for high voltage and high power output
applications [14]. It is based on the cascade connection of the several H-bridge
inverter cells powered by the supplies which are in GP with different ratios like 2,3,4
etc. The proposed configuration is shown for7,9, 15,27,31 level and 81 level
inverters, having inherent advantages of the cascade H-bridge inverters. Matlab
Simulink is done to verify the performance of the ACMLI using optimization angle
control technique.
S.Kiruthika et al, (2013) presented Multicarrier Based Asymmetric Multilevel
Inverter [37]. A design of Pulse Width Modulation for twenty seven level Asymmetric
Cascaded Multilevel inverter. The emergence of multilevel inverters has been increased
since the last ten years. They are suitable for high voltage and high power applications
due to their ability to synthesize waveforms with better harmonic spectrum. Multilevel
inverters are commonly modulated by using multi-carrier pulse width modulation
techniques such as phase-shifted multi-carrier modulation and level-shifted multicarrier modulation. Amongst these, level-shifted multi-carrier modulations technique
43
produces the best harmonic performance. This work studies a multilevel inverter with
unequal DC sources using level shifting MCPWM technique. By applying this concept,
harmonics can be reduced to a greater extent and Total Harmonic Distortion (THD) at
the output can be improved with lesser number of switches compared to a symmetric
voltage source. A procedure to achieve the appropriate level shifting is also presented.