Session 3
Assessment of Long-term Reliability in Lead-free Assemblies
Sanka Ganesan, Ji Wu, and Michael Pecht
CALCE Electronic Products & Systems Center
University of Maryland
College Park, MD 20742, USA
www.calce.umd.edu
Ricky Lee and Jeffery Lo
Hong Kong University of Science and Technology
Yun Fu, Yonghong Li, and Ming Xu
Aero Combined Environment Laboratory
China Aero-Polytechnology Establishment, Beijing 100028, P.R.China
Abstract
2
Abundant data exist on the short-term reliability (i.e.
less than 5 years) of lead-free solder joints under single
loading conditions. Data on combined loading conditions
and long-term reliability is scarce. The lead-free electronics
will be deployed in many products that serve markets
where long-term (greater than 5 years) is a critical
requirement. In many applications, electronics will be
subjected to long-term exposure to temperature extremes
(high and low), humidity, atmospheric contaminants, and
combined thermo-mechanical loading (temperature cycling
and vibrations).
By definition, lead-free soldering assembly involves
the use of only lead-free materials. This applies both to
printed circuit boards (PCB) soldering materials, namely
solder paste or wave solder for surface-mount or throughhole assembly respectively, and finishes used on
component terminals and PCB mounting pads. Ganesan
and Pecht [1] provide a summary of lead-free solder alloy
compositions. At present, tin-rich alloys with some
combinations of silver, copper, bismuth, and antimony are
the leading lead-free solder candidate materials. Among
those, tin-silver-copper (SAC) eutectic alloy, which has a
melting point of approximately 217°C, appears to be one of
the most promising compositions, based on both current
industry trends, and recommendations by CALCE EPSC,
the International Tin Research Institute (ITRI), National
Electronics Manufacturing Initiative (NEMI), and Japan
Electronics and Information Technology Industries
Association (JEITA).
To assess long-term reliability, an experimental plan
includes assessing the interactions among the applications
conditions. The interacting influences include the growth
of intermetallics at the solder joints due to high
temperature exposure, electro-chemical degradation of
electronics assemblies due to the exposure to humidity and
atmospheric contaminants, formation of tin pest due to
extended exposure to low temperature and the effects of
combined thermo-mechanical loading conditions on the
electronics assemblies. The test vehicle designs incorporate
commercial variations in PCB pad finishes, component
lead finishes. Three PCBs designs were developed to
assess reliability of surface mount assemblies and single
sided through-hole assemblies. The PCB materials include
FR4, polyimide for SMT assemblies and paper-phenolic
type (CEM-1) for through-hole assemblies.
1
There are over 300 lead-free patents for the ternary
SAC alloy. Patents depend on such factors as “solder alloy
composition,” “solder joint” or “intermetallic compound”.
Patent and intellectual property issues on lead-free alloys
have been discussed in studies conducted at CALCE [2-4].
PCB pad finishes can affect the reliability of solder
joint since they may change the final composition of the
solder joints due to the dissolution of species from the
board finishes and the reaction between the solder alloy
and the board finishes. Previous studies showed that Sn3.8Ag-0.7Cu alloy should not be soldered onto a PCB pad
with hot air solder leveling (HASL) finish. This
combination resulted in a weak interface after high
temperature aging [14, 15]. Solectron study showed that
HASL finish creates a low temperature phase in reaction
with Sn-3.5Ag solder in wave soldering which in turn
resulted in fillet lifting [1]. PCB pad finish selection also
depends on the manufacturability: solderability and ability
to create good solder joints after multiple reflows (may be
required in complex systems). Based on these
considerations, PCB pads with Sn or Ag metallization may
offer a robust solution especially in no-clean flux assembly
processes.
Introduction
The electronics industry is migrating to lead-free
electronics, both to comply with government legislations
and to increase market share through product
differentiation. Considering that lead-based electronics
have been in use for over 40 years, the adoption of leadfree technology represents a dramatic change. The
manufacturing of lead-free electronic products involves
assembling lead-free components to lead-free printed
circuit boards using lead-free solder alloys. Key issues that
are being addressed by academia and industry include leadfree solder alloy selection, characterization of lead-free
solder alloy properties and behavior under various stress
loading conditions, lead-free manufacturing, logistics and
intellectual property issues, and lead-free assembly
reliability assessment.
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What We Know?
On components, the source of lead (Pb) is usually the
Sn-Pb alloy at the terminals. For the peripheral components,
Sn-Pb coating is used as lead finish, while for the array
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loading conditions was found to be significantly less than
under temperature cycling. However, combined loading
conditions may be more representative of actual
application environments than single loading tests. There
are no data on the long-term reliability of lead-free
electronics under combined loading conditions such as
temperature cycling and vibration conditions.
components, tin-lead-silver (SnPbAg) alloy balls are in use
as component terminals. To realize the transition of
peripheral components to lead-free, alternative coatings,
such as pure tin (Sn), tin-bismuth (Sn-Bi), tin-copper (SnCu) are being developed and implemented. There are also
commercially available preplated lead frame components
with nickel-palladium-gold (NiPdAu) finish. From the
point view of plating manufacturability, tin plating (matte
finish) appears to be the leading candidate for lead
finishing, followed by Sn-Cu, Sn-Bi, and Ni/Pd/Au. A few
Japanese companies are implementing Sn-Bi plating as
lead finish material. However, there are possible concerns
in the long-term reliability of these components in various
application environments. Fine-pitch peripheral lead-free
components have reliability concerns such as tin
whiskering for pure tin plating, and creep corrosion for
nickel-palladium-gold preplated lead frames. For array
packaging, tin-silver-copper appears to be the leading
metallurgy for component terminals.
2.2
The formation of intermetallic compounds (IMC) at
solder-pad interface is essential for creating a reliable joint.
However, excessive growth of IMC will result in a brittle
interface which can lead to solder failures during the
operating life of the product. IMCs form due to two factors:
wetting reaction of solder alloy with the pad metal on the
board during the soldering process; solid state ageing
during the storage and operating life of the product. During
the wetting reaction, the tin present in the solder
chemically reacts with the pad metal to form the IMC. The
extent of the IMC formation depends upon the type of pad
finish metallurgies like copper (OSP), nickel (ENIG),
immersion silver or immersion tin. The copper-tin IMCs
form in the case of pad finish that contains copper,
immersion tin and immersion silver. In the case of
immersion silver, silver-tin IMCs can also form. Tincopper-nickel IMCs form in the case of pads containing
nickel.
Solder reliability is a concern in the transition to leadfree electronics. There has been long-term, successful use
of tin-lead solders in terms of electronics manufacturing
and solder processing. By contrast, lead-free soldering
assembly prompts many unanswered questions. The
prominent reliability concerns with the use of lead-free
solders are solder joint durability, intermetallic growth,
electro–chemical migration, tin pest and tin whiskers.
2.1
In solid state ageing, the IMCs form due to the
diffusion of reacting species through the initially formed
IMCs. Intermetallics growth in lead-free solder joints due
to high-temperature ageing has been reported. The studies
conducted at CALCE EPSC and elsewhere [1, 14-16]
showed that intermetallics compounds grow during ageing
at high temperature exposure due to solid state diffusion of
reacting species. The growth follows the classical square
root of time dependence. For example, after 1000 hours of
exposure at 150ºC, the SAC solder on copper pad exhibits
an intermetallics thickness of about 7 microns. CALCE
EPSC study also showed that IMC growth does not follow
the square root of time dependence in the case of
immersion silver due to the dissolution of silver in the bulk
solder [14]. However, the combined effects of
intermetallics growth plus vibration have not been
investigated.
Solder Joint Reliability
Over 90% of the previous studies on lead-free solders
were undertaken using SnAgCu alloy. Although a variety
of electronic packages have been considered, most of them
were surface-mount area array devices such as Ball Grid
Arrays (BGA), Chip-Scale (CSP), Flip-Chip (FP) Packages,
Quad Flat Packages (QFPs). Consequently, there is
insufficient number of studies on long-term lead-free
solder joint reliability for through-hole components
assembled by lead-free wave soldering; especially single
sided boards.
The thermo-mechanical durability of lead-free solder
joints in cyclic temperature conditions has been studied for
temperature cycle extremes of 0 and +100°C, -40 and
+125°C, or -55 and +125°C, with -40ºC to 125ºC
temperature cycle being the most widely employed. The
number of cycles to failure under the above testing
conditions was typically found to be several thousand
cycles.
2.3
Tin whiskering
Tin whiskering is one of the key reliability issues
associated with lead-free electronics components. Whiskers
are elongated single crystals of pure tin that have been
reported to grow to more than 10 mm (250 mils) in length
(though they are more typically 1 mm or less) and from 0.3
to 10µm in diameter (typically 1-3 µm). Whiskers grow
spontaneously without an applied electric field or moisture
(unlike dendrites) and independent of atmospheric pressure
(they grow in vacuum as well). Whiskers may be straight,
kinked, hooked, or forked and some are reported to be
hollow. Their outer surfaces are usually striated. Whiskers
can grow in non-filament type which is sometimes called
lumps or flowers. Whisker growth may begin soon after
plating or initiate after years. The unpredictable nature of
whisker incubation and subsequent growth is of particular
concern to systems requiring long term, reliable operation
[1].
Another aspect is the stress conditions experienced by
the solder joints during its operating life. The solder joints
in packages like QFPs and PBGAs are subjected to lower
stress conditions due to compliance of the solder joints and
low thermal mismatch stresses compared to packages like
leadless ceramic chip carriers (large thermal mismatch
stresses) with non-compliant solder joints. Previous
CALCE studies concluded that non-compliant lead-free
solder joints as in leadless ceramic chip carriers under
performed Sn-Pb joints [5-13]. On the other hand, for
plastic QFPs and PBGAs, the reverse is true (lead-free
solder joints outperform the Sn-Pb solder joints), which is
consistent with the thermo-mechanical durability results
reported from several independent studies across the
industry and academia. The time to failure under vibration
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Intermetallic compounds
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2.4
between the lead-free solder joints. This issue may be
exacerbated in the situation of fine pitch components
assembled with lead-free materials and process. These
issues need investigation to ensure long-term reliability
requirements.
Tin pest
Another issue associated with the use of lead-free tinrich alloys is the formation of “tin pest”. The allotropic
transformation of white (β) tin, which has a body-centered
tetragonal structure, to brittle gray (α) tin, which is a
diamond cubic crystal, is known as tin pest. This
transformation occurs at 13.2°C. Above this temperature,
white tin is the stable form. Since the spontaneous
formation of α-tin is rare in conventional Sn-Pb solder
alloy, and tin pest has generally been ignored. This may not
hold in the case of some lead-free solders since the
microstructure of lead-free solders typically contains pure
tin grains with tin-copper and tin-silver intermetallic
compounds dispersed along the grain boundaries. The
allotropic transformation from white tin to gray tin is
accompanied by a 26% increase in volume. The volumetric
strain in a solder joint can potentially have a detrimental
effect on its lifetime. More over, the gray tin is also brittle
and weak which in turn can result in joint failures,
especially in vibration loading conditions.
3
All the changes to the bill of materials for electronics
assembly in the context of lead-free migration are being
driven by high volume consumer, computer, and portable
communication industry where the reliability requirements
are not very stringent and the product life cycle is less than
5 years. However, the impact of these material changes on
long-term or over 20 years of reliability is not understood.
Lead-free electronics will be deployed in many
products that serve markets where long-term (greater than
5 years) is a critical requirement. In many applications,
electronics will be subjected to long-term exposure to
temperature extremes (high and low), humidity,
atmospheric contaminants, and combined thermomechanical loading (temperature cycling + vibrations).
Thus, long-term reliability studies should comprehend the
interactions among these applications conditions and the
long test times. Thus the objectives of this long-term
reliability assessment of lead-free soldered assemblies are
to assess and compare the lead-free technology against the
lead-based for long-term (10 to 30 years) reliability
requirements, and provide recommendations to reduce
reliability risks to achieve long-term reliability goal of 10
to 30 years of operating life for lead-free products.
Kariya studied pest formation of pure tin specimen
(cast ingots) by aging it at a constant temperature of -18°C
for up to two years [18]. 40% of the specimen surface was
transformed into grey tin (tin pest) after ageing for 1.5
years, and this percentage increased to approximately 70%
after exposure for 1.8 years. The test results indicate that an
incubation period is necessary for tin pest formation. No tin
pest was observed on the Sn-37Pb specimen. Kariya’s
studies also provided the time that different alloy additions
retard tin pest transformation [19, 20]. He found that the
small additions of soluble alloying elements like bismuth
and antimony can retard the formation of tin pest.
The key results expected from this long-term
reliability studies include: (1) extent of the growth of
intermetallics in the solder joints as a function of
commercially available PCB pad finishes and component
finishes, (2) assessment of any yet-unknown risks, such as
tin pest of high tin solders joints after long-term exposure
to low temperature, (3) impact of PCB degradation due to
high temperature lead-free soldering in causing corrosion
failures and or degradation in insulation resistance between
solder interconnects, (4) vibration fatigue life and failure
modes of lead-free solder joints with thicker intermetallics,
and possibly with tin pest, (5) Failure mechanisms, mode
in solder joint failures in the combined temperature cycling
+ vibration tests, (6) Long-term life of lead-free assembly
in comparison with the lead-based.
During the life cycle of electronics, tin-rich lead-free
solder joints can be subjected to temperature cycling
(typically between –55°C to 125°C) and/or prolonged
exposure to temperatures below the transformation
temperature, thereby subjecting the joints to allotropic
transformation. If the ambient temperature of the solder
joints is lower than the transformation temperature, the
nucleation of the tin pest will be promoted. The nucleation
of tin pest will be enhanced at lower ambient temperatures
because the undercooling (difference between the service
temperature and the transformation temperature) increases.
The impact of this phenomenon in solder joints has not
been studied. Thus there is a need to understand and
quantify the impact of tin pest on the reliability of lead-free
solder joints subjected to extended periods of low
temperature exposure in field applications.
2.5
4
Experimental Approach
The effort focuses on utilizing current knowledge,
tools and resources to achieve the long-term reliability goal
for electronics products. The approach will be as follows:
Electro-chemical migration
The combined effects of moisture, temperature and
electrical bias on electro-chemical migration between leadfree solder joints on PCB assemblies have not been
considered. The electro-chemical migration is a concern
because the boards are subjected to higher lead-free reflow
temperature, which may potentially cause higher
degradation and higher migration of ions from the interior
of the boards to the surface compared to the boards
subjected to the standard eutectic tin-lead reflow process.
This effect may cause corrosion of PCB metallization.
Moreover long-term exposure to electrical bias and
humidity may cause migration of species (e.g., Ag)
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What We Need to Know?
•
Conduct experiments in accelerated environments
to assess the long-term reliability of commercially
available lead-free technologies.
• Perform failure analysis and interpret results.
Experiments are designed with the objective of
determining the long-term (over 20 years) reliability of
lead-free electronics assembly manufactured using
production qualified process. The study involves subjecting
the test samples to short-term vibrations after long-term
storage at high temperature (125ºC) and low temperature (55ºC), long-term exposure to high temperature (135ºC),
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technology. Moreover, all the assemblies will be built
using production qualified process in order to represent the
actual production conditions of the PCB assembly. On the
PCB pad finish issue, the objective is to create variations
representing the actual manufacturing conditions. Thus, the
experimental builds include PCB pad finishes with
immersion Ag, immersion Sn, electroless NiP/Au (ENIG)
and organic solderability preservative (OSP). The
experimental builds also include the PCB assemblies with
the current lead-based materials and processes to serve as
control.
high humidity (85%RH) with electrical bias, long-term
temperature cycling (~10000 cycles) with temperature
excursions between -40ºC to 125ºC, and the combined
loading conditions of temperature cycling with random
vibrations.
The effect of long exposure to high temperature is
expected to enhance the growth of intermetallics in the
solder joints. Because intermetallic compounds are brittle
in nature, they are expected to degrade the solder joint life
under vibration stress conditions. Thus this interaction
between the intermetallics growth and vibration stress
environment will be studied in the proposed experiments.
On the other hand, the low temperature exposure is
expected to enhance the tin pest formation (due to
allotropic transformation in tin) in tin rich lead-free solder
joints. The effect of this phenomenon on the solder joint
life under vibration stress conditions is unknown at this
point of time. The proposed experiments are expected to
shed some light on this phenomenon. Long-term exposure
of electronics to high temperature high humidity plus
electrical bias will enhance the electrochemical processes,
which ultimately can lead to corrosion of metallization,
reduction in insulation resistance between the solder joints.
This mechanism can be aggravated in lead-free assembly
because of the higher PCB assembly temperature possibly
causing a more degradation (material degradation,
contamination migration) compared to lead-based
assembly..
4.1
4.2
SMT and through-hole boards were designed for this
study. The SMT test boards are made of two materials:
FR4 (the glass transition temperature is ~130ºC) and
polyimide (glass transition temperature is ~250ºC). These
boards have a daisy chain pattern to enable resistance
monitoring of the solder joints of each component. The size
of the board is 8” by 7”. The board typically has 1 ounce
thick copper (~35 microns) pads/traces. The board is
mounted with the selected packages with the dummy
silicon die. The packages have wire bonds connecting the
adjacent leads (not to the die) in order to enable resistance
monitoring of the solder joints when assembled on to the
test board.
In random vibrations test, the vibration stress level will
depend upon the position on the board. This aspect needs
to be considered in the component placement for PCB
layout. The symmetrical layout of the vibration test board
is shown in Figure 1. Figure 2 is the SMT board design for
temperature cycling tests. These boards incorporate a “cutout” feature around each component (except resistors) to
facilitate component removal during temperature cycling
tests to enable failure analysis on each failed component.
These PCBs also incorporate a structure to study the
electrochemical migration in solder joints. This structure
consists of pads with the center–to-center spacing of 0.5
mm (20 mils). This spacing represents the current fine
pitch pad spacing practiced in the industry. During PCB
assembly, the solder paste will be reflowed on these pads
to create solder islands. During HAST testing
(130ºC/85%RH), the electrical bias will be applied
between them to simulate the accelerated electrochemical
migration effect between two adjacent solder joints.
Variations in bill of materials for electronics
products
Most OEMs build electronics products consisting of
several types of commercially available components which
include SMT components in QFPs, BGAs, SOICs, leadless
carriers, passives, and through-hole technology
components. Thus the experiment includes the SMT and
through-hole components. The basis for the selection of the
components is to create variations in the compliance of the
solder joints (example: QFPs vs. leadless ceramic chip
carrier) and thermal mismatch stresses (example: plastic
BGAs vs. ceramic carrier) on the solder joints.
Next consideration involves creating variations in the
lead finish of the components. The lead finish variations
for QFPs include electroplated matte Sn, Sn-Cu and Sn-Bi.
As for BGAs, SnAgCu solder balls are used.
Figure 3 shows the layout for the single sided throughhole technology test board. This board is made of CEM-1
material and has a size of 8” X 5.5”. This board will be
used for both vibration and temperature cycling tests. The
rationale for the inclusion of this design is to create a
representation for electronics assemblies deployed in the
systems such as washers and dryers.
With respect to PCB assembly, again industry has
converged to the SnAgCu (SAC) paste for reflow soldering
of SMT components and SAC or Sn0.7Cu for wave
soldering of through-hole components. Thus these
materials will be fixed in the experimental builds based on
the current process conditions. Thus, test boards will
consist of two types: SMT and single sided through-hole
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Test vehicles
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Figure 1: SMT test board for vibration stress test
Electro-chemical
migration test
structure
Cut-out feature
Figure 2: SMT test board for temperature cycling tests with electrochemical degradation test structure for long-term
storage tests. Cut-out features are provided to enable easy component removal during the temperature cycling test.
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48 ld PDIP
48 ld PDIP
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Session 3
Figure 3: Single sided, through-hole board for vibration and temperature cycling tests
4.3
Testing conditions
The fundamental premise in the proposed assessment of long-term reliability of lead-free electronics is to investigate
and quantify the interactions between the physical phenomena like intermetallics growth and tin pest and the expected field
stress conditions (vibrations, temperature cycling) on the solder joint degradation. The experimental matrix is shown in
Table 1.
Table 1: Experimental matrix
Pre-treatment
Accelerated stressing
Solder and PCB pad finish
Sn-Pb
SAC
SAC
SAC
SAC
HASL
Immersion
Ag
Immersion
Sn
ENIG
OSP
High temp. storage (125ºC/100
hours)
Vibration test
9
9
9
9
9
High temp. storage (125ºC/350
hours)
Vibration test
9
9
9
9
9
Low temp. storage (-55ºC/500
hours)
Vibration test
9
9
9
9
9
Low temp. storage (-55ºC/1000
hours)
Vibration test
9
9
9
9
9
None (Control)
Vibration test
9
9
9
9
9
Not applicable
HAST (130ºC / 85%RH /
672 hours) + Bias (for
corrosion test structure)
9
9
9
9
9
None
Temp. cycling (-40ºC to
125ºC)
9
9
9
9
9
None
Temp. cycling + vibration
9
9
9
9
9
The growth of intermetallics at the solder joints can be
enhanced by subjecting the electronics assemblies to high
temperature storage. The time and temperature conditions
for this test are determined based on the acceleration factor
that relates the extent of growth in the test to the field
conditions. Based on a previous analysis (based on the
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activation energy for IMC growth of 1.05 eV) [16], it is
expected that the test conditions of (125ºC/350 hours) will
simulate the growth of intermetallics that will be observed
in the field after exposure to 55ºC in 28 years. In the
proposed experiments, the growth kinetics of intermetallics
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of electronics assemblies in temperature cycling and the
combined temperature cycling with random vibrations.
and their structural morphology will be studied for all the
combinations of lead finish-SAC-PCB pad finish.
The lead-free alloy that will be studied in this proposal
is tin rich Sn3Ag0.5Cu alloy. The microstructure of this
alloy in the solder joint consists of tin grain matrix with
interdispersed Sn-Ag, Sn-Cu intermetallic compounds. Tin
pest may occur at low temperatures. To accelerate this
phenomenon of tin pest and investigate its impact on long
term reliability, the PCB assemblies will be subjected to
low temperature (-55ºC) storage of 1000 hours. At this
point, we do not know the acceleration factor for this test.
4.4
As assembled PCB samples will be examined under
optical microscopy to assess and compare the quality of the
solder joints. Specifically, analysis will look for difference
in the wetting characteristics, appearance of the joints (dull
vs. shiny), fillet shape, any evidence of bridging, solder
balling, and any evidence of fillet lifting in through-hole
components.
Vibration test involves subjecting the test assemblies
to resonant frequency of vibration in the vibration chamber.
The appropriate power spectral density level for long-term
vibration tests will be determined through simulation and
step stress experiments. Sensors will be mounted and
monitored on the PCB assemblies to measure vibration
stress. The resistance of each daisy chain will be monitored
continuously using the in-house built test equipment during
vibration tests. This equipment will monitor the resistance
of each chain in parallel with detection window of ~70 ns.
The resistance threshold (a programmable quantity in the
system) will be set to 100 ohms. A resistance spike
exceeding the threshold will be counted as a failure event
when the increased resistance persists for at least 1µs.
There is a counter which stores these failure events with
the time stamp. This parallel and continuous measurement
method is expected to ensure that no failure event
(including intermittents) is missed within each vibration
period (can range from 2.5 ms to 12.5 ms). A daisy chain
in vibration test will be considered as failure when there
are consecutive 15 failure events. Time to failure for the
daisy chain will correspond to the time at which the failure
event occurred.
Cross-sectioning and microscopy (Optical, SEM/EDX)
will be performed on each type of component/pad finish
combinations after exposure (up to 1000 hrs.) to high
temperature storage test to determine the extent of
intermetallic compounds growth, their chemical
constituents (EDX), morphology (SEM, TEM) and
stochiometry (XPS). Similar analysis will be performed
for samples after exposure to low temperature to
investigate for the evidence of tin pest in the tin rich solder
joints. Because tin pest is associated with crystal structure
change and which is more likely to initiate from the surface
of the solder joints, ion scattering spectroscopy (ISS)
techniques will be used to determine the tin pest
phenomenon. Microscopic analysis will also be performed
on
the
solder
joints
after
the
temperature/humidity/electrical bias tests to assess the
electrochemical degradation. Optical/SEM analysis of the
solder joints after vibration, temperature cycling and
combined vibration + temperature cycling tests will be
performed to determine the failure mode and morphology.
The plan also includes characterizing the morphology
of the solder joint microstructures, intermetallics, tin pest
in solder joints and tin whiskers in lead and PCB plating
finish metallurgies under long-term aging (high
temperature exposure, low temperature exposure,
temperature cycling) using several characterization
methods including TEM (transmission electron
microscopy), XPS (X-ray photoelectron spectroscopy: to
determine the stochiometry of intermetallics compounds)
and ISS (ion scattering spectroscopy: to determine the
surface crystallographic structures, film thickness, and
possibly surface stresses).
The temperature cycling tests will be conducted in air
convection chambers. The temperature of each board will
be independently monitored using thermocouples installed
at the center of the boards. The temperature profile that
will be used in this study is: temperature excursion
between -40ºC to 125ºC with 15 minutes dwell time at both
high and low temperature extremes and a ramp time of 15
minutes (~10ºC per minute ramp rate) between extremes.
The resistance of the daisy chains in temperature cycling
will be monitored using commercially available Agilent
data loggers.
The data logger switching (polling)
frequency will be set to 82 chains per minute. All the tests
will continue till failure. Failure is defined as one or more
resistance excursions greater than 300 ohms occurring in
each cycle for 10 consecutive temperature cycles. To
define cycles-to-failure, we go back to the first of the ten
final thermal cycles that registered the consecutive failure
readings.
5
Printed Circuit Board Assembly
The printed circuit board assemblies for this study
were assembled in Jabil’s San Jose facility. Jabil Circuits
Inc. is one of the leading edge electronics manufacturing
service (EMS) providers in the world. Jabil offers
manufacturing services to world leading electronics
companies that include consumer, telecommunication,
computing, instrumentation, medical, and automotive
industries. Jabil has design, manufacturing and repair
centers in every major region of the world. Jabil's
manufacturing operations comply with ISO 9000 - Quality
Management System Standards, ISO 14001 –
Environmental Standard, and ISO 18001 - Health and
Safety Standard.
HAST test (135ºC/85%RH with bias for 672 hrs) will
also be conducted to investigate any electrochemical
migration and corrosion phenomena. This study will use
the corrosion test structure that is incorporated on the
temperature cycling test board. This structure will enable
application of electrical bias and to quantify the
electrochemical degradation phenomenon.
The Jabil’s San Jose facility supports high and lowmix PCB and backplane assembly for volumes that range
from just a few units for prototypes, to modest quantities
for pre-production, to hundreds of thousands in volume
The experimental builds include the Sn-Pb assemblies
as controls to assess and compare the long-term reliability
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Analysis methods
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was used. The stencil was sourced from Beam On
Technology (a preferred supplier of Jabil-San Jose
assembly facility). A laser-cut stencil with 5 mils nominal
thickness was used for printing. The quality compliance
certificate from the stencil supplier is shown below.
production. The facility’s capabilities extend from single
sided through-hole to double sided, high density surface
mount assemblies with chip scale packages, mixed
technology assemblies, lead-free assembly, flip chip, chip
on board, and fine pitch high pin count press fit connectors.
The SMT process flow is shown in Figure 4. Figure 5
shows the process flow for through-hole assemblies.
A 10-zone Vitronics-Soltec XPM2 convection reflow oven
was used for reflow. The reflow gas was nitrogen. The
temperature was monitored for PBGAs and resistors.
PBGAs were selected due to their sensitivity to popcorning.
The PBGA saw a peak temperature of 246ºC. The peak
temperature of all the PBGAs was same. The resistors saw
a peak temperature of 250ºC. The time duration for the
PBGAs in the oven above the melting point of the solder
(217ºC) was 78 seconds. The time duration between 150ºC
to 217ºC was 73 seconds. The Pb-free reflow temperature
profile used for the assembly is shown in Figure 6.
The assembly involved two surface mount designs
(vibration and temperature cycling) and one single sided
through-hole design. The surface mount designs, fabricated
using two PCB materials FR4 and polyimide were of 2metal layer construction. The components were mounted
on top side of the surface mount boards only. The single
sided through-hole design boards were fabricated using
CEM-1 material and were assembled using Jabil’s selective
soldering technology.
The total number of assemblies included 306 surface
mount designs (vibration design=169, temperature cycling
design = 137) and 70 through-hole design. The build
sequence started with PbSn assembly for the SMT
vibration and temperature cycle designs. This was followed
by Pb-free assembly of SMT vibration design boards and
temperature cycling design boards. Single sided throughhole boards were assembled last due to scheduling
constraints.
5.1
For the control Pb-63Sn assemblies, the thermal profile
(Figure 7) was used. In this assembly the PBGAs saw the
peak temperatures between 213ºC to 215ºC. In this process,
resistors saw a higher peak temperature of 219ºC. The time
duration above the melting point (183ºC) for this process
ranged from 67-71 seconds. The time duration between
150ºC to 183ºC ranged from 88 to 100 seconds. By
comparing two processes, there is a difference of 31ºC in
peak temperatures experienced by PBGAs. All the
assemblies were subjected to two reflow profiles in order
to simulate actual top and bottom assembly process. Figure
8 shows the assembled board after reflow.
SMT assembly process
A no clean-type 3-Kester R905 paste (Sn3Ag0.5Cu)
was used for the Pb-free assemblies. For control Sn-Pb
assemblies, no-clean-type 3-Kester 256 paste (Sn37Pb)
Bill of Materials
Quantity verification
Incoming inspection
of PCBs
(sample basis)
PCB
serialization
Shipping media
transfer (for CLCCs)
Stencil print
paste
Component
placement
(resistors)
Component
placement
(PBGAs, LQFPs,
CLCCs)
Reflow
Automatic
X-ray and optical
inspection
Defects
assessment
Rework
Defectives
No defectives
Flying probe
(resistance
measurements)
Shipping
Figure 4: Process flow for the SMT boards assembly
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Bill of Materials
Quantity verification
Automatic
optical inspection
Incoming inspection
of PCBs
(sample basis)
Hand-placement
of components
(48 PDIPs)
Defects
assessment
Defectives
Flying probe
(resistance
measurements)
No defectives
Selective soldering
technology
(Versaflow)
Rework
Shipping
Figure 5: Process flow for single sided through-hole boards assembly
Figure 6: Lead-free reflow profile
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Figure 7: Sn-Pb reflow profile
Figure 8: Test board after the reflow
5.2
area of the PBGA. The PBGAs were rated as MSL 3 parts
and were out of the moisture proof bags for a maximum of
2 hours before assembly. The defects were hypothesized to
be due to the combined effects of popcorn phenomenon
occurring in PBGA packages during Pb-free reflow and
PBGA-PCB warpage during higher temperature Pb-free
reflow. With this hypothesis, it was decided to bake all the
PBGAs before lead-free assembly of the rest of the boards
in order to eliminate popcorning as one of the potential
causes. After baking the PBGAs at 125ºC for 24 hours
before reflow, the rest of the SMT lead-free assemblies did
not exhibit the defects based on the X-ray inspection
results.
Inspection
A HP 5Dx X-ray tomography system was used to
inspect the quality of solder joints in the assemblies. The
X-ray images of the solder joints of all the component
types are shown in Figures 9-13. Figure 9 shows the x-ray
image of good PBGA solder joints from the assembled
boards
The 5Dx system was also used to capture the images
of all the defective lead-free PBGA solder joints (see
Figure 144). Defects in solder joints of the SMT vibration
assemblies (FR4 with immersion tin, immersion silver,
ENIG, and OSP finishes, polyimide boards with ENIG
finish) in non-baked Amkor’s 256 Pb-free PBGAs after the
lead-free reflow. The solder joint defects were categorized
in to three major types: open and or insufficient solder,
shorts (bridging) and the combination of shorts with
insufficient solder. All the defects occurred under the die
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It can be concluded that the single factor which had
the most influence in preventing defects was the baking of
Pb-free PBGAs. Further analysis of the failed PBGAs
confirmed that moisture induced interfacial delamination
and popcorning was the root-cause of the observed solder
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joints defects after lead-free reflow. All the affected
assemblies were reworked with assembly house rework
process.
Figure 9: X-ray image of 256 PBGA solder joints
Figure 10: X-ray image of 100 ld LQFP solder joints
Figure 11: X-ray image of 44 ld CLCC solder joints
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Figure 12: X-ray image of 2512 SMT resistor
Figure 13: X-ray image of 1210 SMT resistor
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Over-sized
solder joint
Insufficient
solder joint
Bridged
solder joint
Figure 14: X-ray image of the first article on lead-free FR4 vibration board
5.3
programmable and operating modules: a micro-drop fluxer
mounted on an XY-table, a fix-mounted pre-heating
module and a solder module positioned on an XYZ-table.
To reduce the formation of oxides in the solder bath and to
improve the quality of the solder joints, the solder bath is
inerted with nitrogen. The temperature profile used for the
through-hole assemblies is shown in Figure 16. The
Sn3Ag0.5Cu solder alloy (Kester 905) was used for Pbfree assemblies and the standard eutectic Pb63Sn solder
alloy (Kester 256) was used for control SnPb assemblies. A
no-clean, Lonco65 flux was used during soldering. Figures
17 and 18 show the top side and bottom side of an
assembled through-hole board respectively.
Single sided through-hole assemblies
The assembly steps for single sided through-hole
assembly involved hand- placement of 48 ld PDIPs and
wave soldering. The wave soldering for this study was
accomplished with Jabil’s selective soldering technology
where in individual solder joints are created with the high
precision solder nozzle in ERSA Versaflow equipment (see
Figure 15).
The selective soldering technology is the preferred
method in high mix, low volume assembly facilities. The
ERSA VERSAFLOW consists of 3 independently
Figure 15: ERSA Versaflow equipment used for single sided through-hole assemblies
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Figure 16: Temperature profile for single sided through-hole lead-free assemblies
Figure 17: Top side of an assembled through-hole board
Figure 18: Bottom side of an assembled through-hole board
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6
Time to Failure,” 34th International SAMPE
Technical Conference, Baltimore, MD, 2003
Summary
Abundant data exist on the short-term reliability (i.e.
less than 5 years) of lead-free solder joints under single
loading conditions. Data on combined loading conditions
and long-term reliability is non-existent. The lead-free
electronics will be deployed in many products that serve
markets where long-term (greater than 5 years) is a critical
requirement. In many applications, electronics will be
subjected to long-term exposure to temperature extremes
(high and low), humidity, atmospheric contaminants, and
combined thermo-mechanical loading (temperature cycling
+ vibrations). Thus, this long-term reliability studies
comprehend the interactions among these applications
conditions. These interacting influences include
unacceptable growth of intermetallics at the solder joints
due to high temperature exposure, electro-chemical
degradation of electronics assemblies due to the exposure
to humidity and atmospheric contaminants, formation of tin
pest due to extended exposure to low temperature and the
effects of combined thermo-mechanical loading conditions
on the electronics assemblies.
7
[7] Zhang, Q., Dasgupta, A., and Haswell, P. “Creep
and High-Temperature Isothermal Fatigue of PbFree Solders”, Proceedings of IPACK 03:
International Electronic Packaging Technical
Conference and Exhibition, July 6-11, 2003, Maui,
Hawaii, USA, 2003
[8] Zhang, Q., Haswell, P. and Dasgupta, A.
“Isothermal Mechanical Creep and Fatigue of Pbfree Solders”, International Brazing &Soldering
Conference, San Diego, CA, February 16-19,
2003
[9] Zhang, Q., Haswell, P., and Dasgupta, A. “Cyclic
Mechanical Durability of Sn-3.9Ag-0.6Cu and
Sn-3.5Ag Lead-Free Solder Alloys”, Proceedings
ASME IMECE 2002, New Orleans, LA, 2002
[10] Zhang, Q., Haswell, P., Dasgupta, A., and
Osterman, M. “Isothermal Mechanical Fatigue of
Pb-free Solders: Damage Propagation Rate &
Time to Failure”, 34th International SAMPE
Technical Conference, Baltimore, MD, November
4-7, 2002
Acknowledgements
CALCE Electronic Products and Systems Center has
initiated the long-term lead-free reliability program and is
collaborating with Aero combined Environment
Laboratory of China Aero-Polytechnology Establishment,
Hong Kong University of Science and Technology, Poland
Technologic University, and many companies engaged in
telecommunication, industrial, aerospace, and oil
exploration businesses.
8
[11] Haswell, P. and Dasgupta, A., “Viscoplastic
Constitutive Properties of Lead-free Sn-3.9Ag0.6Cu Alloy,” MRS Proceedings, San Francisco,
CA, 2001
[12] Haswell, P., “Durability Assessment and
Microstructural Observations of Selected Solder
Alloys,” Ph.D. Dissertation, University of
Maryland, College Park, MD, 2001
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