PIERS Proceedings, Marrakesh, MOROCCO, March 20–23, 2011 1430 Soft-switched Converter for Ultracapacitors P. Chlebis, Z. Pfof, A. Havel, and P. Vaculik Department of Electronics, Faculty of Electrical Engineering and Computer Science VŠB — Technical University of Ostrava, 17. Listopadu 15, Ostrava-Poruba 70833, Czech Republic Abstract— The paper deals with design and optimization of a converter for ultracapacitors with zero voltage switching (ZVS) utilization. The converter for ultracapacitors consists of two converters — buck converter and bidirectional half-bridge converter; both of them with ZVS. The converters with ZVS require a different design approach in comparison with common hardswitched converters. Therefore, the paper describes influence of parasitic circuit parameters for the converters with ZVS utilization and their design optimization. The paper provides an analysis of the stages during switching cycle of before-mentioned converters with ZVS as well. 1. INTRODUCTION The ultracapacitor is a capacitor with large capacitance (up to 5000 Farads) and high efficiency (up to 98%). It leads to the idea of using ultracapacitors as an alternative source to batteries, or for extracting higher efficiency from existing power sources, e.g., fuel cells. The ultracapacitor also has other advantages — It is capable of very fast charges and discharges, a millions of cycles without degradation, extremely low internal resistance or ESR, high output power, etc.. Ultracapacitors cannot yet be used as a primary power source in automotive applications. On the other hand, they can be a good choice as a secondary power source that works as an electric power storage system. They are able to deliver peak power for drive demands for acceleration or can be used for storing regenerative braking energy. Zero voltage switching (ZVS) is soft-switching technique, which is suitable for high-frequency operation. ZVS can be realizable on the semiconductor switch VT complemented by resonant elements Lr and Cr . A switch with resonant elements creates a so-called resonant switch (Fig. 1). ZVS eliminates turn-on loss due to zero voltage on the capacitor or bypass diode conducting. Within the turn-off time, the capacitor creates a slowdown semiconductor switch voltage build-up, hence turn-off loss is reduced. The output of converters can be regulated by variable on-time or switching frequency control. MOS-FET transistor is the most suitable semiconductor device for ZVS [2]. The converter for ultracapacitors requires a high dynamics that can be achieved by a high switching frequency. But high switching frequency causes a high switching looses, which reduces the efficiency of whole converter. Therefore, the zero voltage switching keeps the high efficiency of a converter with preservation of high switching frequency. Furthermore, the ultracapacitors has a high efficiency (up to 98%), the converter must have a high efficiency too; otherwise the converter reduces the efficiency of a whole unit. The zero voltage switching is used for other advantages as well such as reduction of magnetic components sizes, increase of a power density of a converter and suppression of EMI of a converter [1]. On the other hand, the zero voltage switching has disadvantages as well. These troublesome disadvantages make more difficult design and construction of ZVS converters. Consequently, the design of ZVS converters needs an optimization, which is described in detail in the following chapter 3. Input converter Primary power source Fuel cell Figure 1: Schematic diagram of a zero-voltage resonant switch. Output converter Ultracapacitors ZVS buck converter ZVS bidirectional half-bridge converter Load DC bus Figure 2: Block diagram of the soft-switched converter for ultracapacitors. Progress In Electromagnetics Research Symposium Proceedings, Marrakesh, Morocco, Mar. 20–23, 2011 1431 2. A CONVERTER FOR ULTRACAPACITORS The soft switched converter for ultracapacitors is designed as a converter for delivering the high peak power in dynamic conditions; whereas the input power source will be operate in steadystate; that means no overloading in the course of delivering the high peak power to the load. Thus, as shown in Fig. 2, the converter for ultracapacitors is connected between the primary power source and the inverter, for example. From the figure can be observed, that the converter for ultracapacitors consists of ZVS buck converter (input converter) and ZVS bidirectional halfbridge converter (output converter). The input converter is designed for ultracapacitors charging, ultracapacitors steady-state voltage value maintaining and for delivering the steady-state power to the load as well. The output converter is designed for voltage step-up from ultracapacitors to the output and for voltage step-down from output to the ultracapacitors. A fuel cell is used as a primary power source for the converter for ultracapacitors; therefore the converter is designed in the middle-power range area with low-voltage level and high-current level input. 2.1. Input Converter — ZVS Buck Converter In this chapter, the behavior of the buck converter with zero voltage switching will be explained. The principle diagram of ZVS buck convertor is shown in Fig. 3(a). Consequently, the time diagram for specification of ZVS buck convertor behavior is shown in Fig. 3(b). In following analysis, every circuit components will be considered as idealized components. The switch VT is turned off at zero-voltage conditions at time t0 and the current commutates into the charged capacitor Cr . The Cr is overcharged over the voltage U1 to the maximum voltage UCrM that can be defined as p UCrM = IO Lr /Cr + U1 (1) When the current iLr changes polarity (t2 ), the capacitor Cr is discharged for achieving zerovoltage switching conditions. The off-time for switch VT is invariable and can be determined as p Toff = t4 − t0 = π Lr Cr (2) When the voltage uCr reaches zero (t4 ), bypass diode VD is conducting and the switch VT can be turned on with no losses. The current iLr changes polarity at t5 and the switch VT is conducting. The current rises to current value IO , which is given by load parameters. The current IO iLr 0 -IO UCrM uCr U1 0 t0 t 1 t2 (a) t3 t4 t5 t6 t7 (b) Figure 3: (a) Principle diagram of ZVS buck converter. (b) Time diagram of ZVS buck converter. IDC iLr IDCavg 0 UDC uCr2 0 t0 (a) uCr1 t1 t2 t3 t4 t5 t6 (b) Figure 4: (a) Principle diagram of ZVS bidirectional half-bridge converter for voltage step-up. (b) Time diagram of ZVS bidirectional half-bridge converter for voltage step-up. PIERS Proceedings, Marrakesh, MOROCCO, March 20–23, 2011 1432 iLr reaches the constant value IO at t6 and after what the switch VT is tuned off at t7 , the switching period is repeated. 2.2. Output Converter — ZVS Bidirectional Half-bridge Converter The behavior of the ZVS bidirectional half-bridge converter for voltage step-up will be explained in this chapter. The converter for voltage step-down is the same for current waveform, if the switches are reverse switched. The principle diagram of the convertor is shown in Fig. 4(a) and the time diagram is shown in Fig. 4(b). Just like in previous chapter, every circuit components will be considered as idealized components in analysis. The switch VT 2 is turned on at time t0 , the current iLr rises to the current value IDC according to IDC = UU −C Ton /Lr (3) When the current reaches desired current IDC (t1 ), VT 2 is turned off at zero-voltage conditions caused by slowdown voltage build-up on capacitor Cr2 . While Cr2 is charged by the current iLr , capacitor Cr1 is discharged for achieving ZVS conditions. When the voltage uCr1 reaches zero (t2 ), bypass diode VD 1 is conducting and VT 1 can be turned on with no losses. The passing current through VD 1 decreases and changes polarity at t3 . The switch VT 1 is now conducting for a short time, which is necessary for ZVS conditions maintenance. The switch VT 1 is turned off at t4 and capacitor Cr1 is charged to voltage value UDC , whereas capacitor Cr2 is discharged to zero voltage. The switch VT 2 can be turned on with no losses at t5 , because the bypass diode VD 2 is conducting. When the current changes polarity at t6 , the switch VT 2 is conducting and switching period starts repeatedly. 3. DESIGN OPTIMIZATION OF ZVS CONVERTERS The design optimization of above mentioned converters will be described in this chapter. In general soft-switched converters are more exacting in comparison with hard-switched converters, especially for control and regulating microprocessor system. Furthermore, the resonant inductor as well as capacitor for soft-switched converters must have low losses; otherwise the efficiency of a converter is uselessly reduced and consequently can be even lower than efficiency of a hard-switched converter. In the case of a high current passing through ZVS buck converter, the maximum current value can be a dangerous for a semiconductor switch. The high maximum current value is causes by the steep current rising, because of demand on high switching frequency achievement, thus short conducting time of the switch. From the current waveform of the ZVS buck converter (Fig. 5(a)) can be observed that the average current value of 22 A is quite different in comparison with the maximum current value of 73.6 A. This maximum current value is a value of a cut-off current of the switch. During the resonant stage, the switch is stressed by a voltage value on the parallel resonant capacitor, which achieving the maximum value according to Eq. (1). The voltage stress is dangerous (a) (b) Figure 5: The voltage and current waveforms of a buck converter. (a) C1 — gate pulses, C2 — resonant capacitor voltage, C3 — resonant inductor current (10 mV/A). (b) C1 — resonant capacitor voltage, C2 — ultracapacitors voltage, C3 — resonant inductor current (10 mV/A). Progress In Electromagnetics Research Symposium Proceedings, Marrakesh, Morocco, Mar. 20–23, 2011 1433 too, because it can easily exceed the maximum drain-source voltage value of a semiconductor switch. The Fig. 5(a) shows that the maximum voltage value reaches to 200 V DC, whereas the input voltage value is 25 V DC. The influence of parasitic inductances of soft-switched converter circuit can be observed during the resonant cycle, thus during the off-time of the switches. Especially, the parasitic inductance of ultracapacitors causes the change of ultracapacitors voltage value. The Fig. 5(b) shows the voltage R ultracapacitors waveform across the ultracapacitors. The used ultracapacitors are BOOSTCAP° with a capacitance of 3 000 F and a voltage of 2.7 V DC; in total seventeen ultracapacitors are connected in series. The parasitic inductance of ultracapacitors was derived by the simulation of the measured waveform. It was found out that self-inductance of the one ultracapacitor cell is 16 nH. There is impact of the parasitic inductance of wires as well. The self-inductance of wires causes similar problem as a parasitic inductance of ultracapacitors. Thus, the change of voltage value across the wire can be observed during the resonant cycle. The solution to influence of parasitic inductances consists in filter network utilization. Especially, the influence of parasitic inductance of ultracapacitors can be suppressed by appropriately designed LC smoothing filter network. It was found out that the LC filter can suppress the influence of parasitic inductances, but no eliminate. That means the influence of parasitic inductances can be neglected with filter network utilization. The ZVS bidirectional half-bridge converter needs an optimization of control system for switching algorithm and of output DC bus design as well in comparison with hard-switched converter. The switching algorithm must be optimized, because both of the switches must be switched during one switching period (Fig. 4(b)). Furthermore, the converter needs a power source on the output, which can be realized by a capacitor with appropriately capacitance value. The power source on the converter output is important for achieving a zero voltage switching conditions. As was mentioned before (Fig. 4(b)), the auxiliary switch is switched within the time t3 and t4 , thus the current direction is from output DC bus to ultracapacitors. Duration of conducting time of auxiliary switch is depending on the capacitance value of resonant capacitors. 4. CONCLUSION The design and optimization of a converter for ultracapacitors with zero voltage switching was presented. Soft-switched converters have some advantages and also disadvantages, which make more difficult design and construction of these converters. Nowadays, increased demands on controlling microprocessor are insignificant, because of increased computing power of microprocessor [3]. Other demands need some design optimization. Consequently, the ZVS converter for ultracapacitors can works with high switching frequency with no restriction, which commonly make trouble hardswitched converters due to higher switching power losses. ACKNOWLEDGMENT The research described in this paper was supervised by Prof. Ing. Petr Chlebiš, CSc., Department of Electronics, VŠB — TU Ostrava and supported by GACR project 102/08/0775: New structures and control algorithms of mobile hybrid systems. REFERENCES 1. Rashid, M. H., Power Electronics Handbook, Academic Press, California, USA, 2001, ISBN 0-12-571650-2. 2. Dudrik, J. and N.-D. Trip, “Soft-switching PS-PWM DC-DC converter for full-load range applications,” IEEE Transactions on Industrial Electronics, Vol. 57, No. 8, 2010, ISSN 02780046. 3. Osmancik, L., M. Polak, P. Simonik, L. Hrdina, P. Skotnica, and P. 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