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CHAPTER -5 (BIPOLAR JUNCTION TRANSISIOR) : ELECTRONIC DEVICES

EARLY EFFECT or " Base Width Modulation"
Decrease in effective base width because of increase in magnitude
of collector voltage has two consequences
First there is less chance for recombination within the base region.
Hence the transport factor T (i.e. common base current gain ) and


also  increases with an increase in the magnitude of the collector
junction voltage.
Second, charge gradient is increased within the base, and
consequently, the amount of minority carriers injected across the
emitter junction increases.
If the collector reverse bias is sufficienlly increased, then the depletion
layer completely extends across the base and reaches upto emitter.
This condition is known as "Punch through" or "reach through"
when punch through occurs, it causes a short circuit between collector
and emitter and then the device stops acting as a transistor. The
phenomenon of punch through occurs only in the case of thin base
transistors. For transistor with thicker base failure occurs by
avalanche breakdown before punch through is reached.
PERSONAL REMARK :

In a bipolar junction transistor
an increase in magnitude of
collector voltage increases the
space-charge width at the
output junction diode. This
causes the effecitive base
width to decrease. This effect
is known as (IES-EC-2013)
(a) Hall effect
(b) Early effect
(c) Miller effect
(d) Zener effect
Sol.(b) Early effect
Ex.
MAXIMUM VOLTAGE RATINGS


When a reverse bias across the CB junction is increased beyond a
particular limit, the junction breaks down due to avalanche , at the
junction IC shoots up rapidly.
There is an upper limit to the maximum allowable collector junction
voltage, since at high voltages there is the possibility of voltage
breakdown in the transistor.
Avalanche
(occus when
Multiplication base is thick)

Two types of Breakdown
are possible
Reach through (occus when
or
base is thin)
Punch through


The maximum reverse biasing voltage which may be applied before
breakdown between the collector and base terminals of the transistor
under the condition that emitter lead be open terminal is represented
by BVCBO.
The avalanche multiplication factor depends on the voltage
V CB between collector and base. The multiplier M is
experimentally found to be M
1
 VCB 

1  
 BVCBO 

n
At VCB = B VCBO , M  
The exponent n ranges between 2 to 10 and determines the sharpness
of the IC  VCB curve.
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Since the emitter is heavily doped to improve the emitter efficiency,
BVCEO is much smaller than BVCBO. i.e.
1
h FE
BVCEO  BVC BO n

PERSONAL REMARK :

BVC EO  0.52 BVCBO
Figure shows between common emitter current gain versus collector
current i.e.  Versus IC characteristics.

10
2
10
1
1
10

8
10 10 6 10 4 10
I c (A)
2
Figure shows Breakdown voltages of common emitter configuration
and common base configuration.
VCEO
VCBO
Collector Voltage




BJT SWITCHING SPEED
There are transistors that are referred to as switching transistors
due to the speed with which they can switch from one voltage level
to another.
In a practical transistor, the transistor takes finite time to switch
from one state to another.
The speed at which the BJT inverter can change its logic is limited
by the delays of the transistor in switching between saturation and
cut-off modes of operation.
The total time required for the transistor to switch from the "OFF"
to "ON" state is designated as tON and defined by
tON = td + tr where , td is the delay time and tr is the rise time.
and the total time required for the transistor to switch from the "ON"
to "OFF" state is designated as tOFF and defined by
tOFF = ts + tf where , ts is the storage time and tf is the fall time.
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
Consider the simple BJT inverter circuit with input pulse applied as
shown
switch, td is delay time, tr is rise
RC
VF

For a transistor used as a
Ex.
+ VCC
Vi
PERSONAL REMARK :
time, ts is storage time and tf is
V0
fall time. Then turn-on time tON
RB
Vi
and turn-off time t OFF are
t
respectively (IES-EC-2012)
VR
IF
V
V
I F  F and I R  R
RB
RB
(Since VF and VR  VBE )
t
IB 
IC(sat) t
(td + ts) and (tr + tf)
(b)
(td + tf) and (ts + tr)
(c)
(tr + ts) and (td + tf)
(d)
(td + tr) and (ts + tf)
Sol.(d) Turn-ON time, tON = delay
time + rise time i.e.tON = td + tr
Turn-OFF time tOFF = storage
time + fall time i.e. tOFF = ts +tf
Ex. Determine RB and RC for the
transistor inverter shown below.
(Given IC = 10 mA)
IB n
QB
(a)
Q B d QB

n
dt
VCC = 10 V
(where n is the mean life time
of electron in the p-region)
t= Mean transit time
t
RC
VC
RB
Note : t is related to p and n
 = 250
VI
tON = Charging of diffusion capacitance
(i.e. t r = rise time)
tS = Storage time because of removal of
IC
excess minority carriers stored in the region
IC(sat) t
td = discharge time (i.e. saturation
to cut-off or from VH to V L)
VC
Vi
10 V
10 V
0V
0V
t
10 V
t
0V
Sol. Given that transistor circuit
shown is works as an inverter,
i.e. saturation region

Three component of delay are
t total

t on

ts

td
Therefore, IC = IC sat 
or 10 mA 
1
t ON   n ln  I
c(sat)

1  I
F





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t s  n l n
I F  IR
I c (sat)
 IR
I F
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VCC  VCE (sat )
RC
10 V  0.2 9.8V

RC
RC
1  I c (sat ) 
d   n l n 

  I R 
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

The rise time and fall time occurs due to the fact that a base
current step is used to saturate the transistor or return it from
saturation to cut-off.
The delay time occurs as the minority carriers takes time to cross
base region and collected at the collector and attain a value equal to
10 % of its maximum.
IC
PERSONAL REMARK :
9.8 V
 0.98 K
10 mA
or R C 
and IB 
ICsat

where, I B 
Transistor
'ON'
Transistor
'OFF'
or R B 
100%
90%


10 mA
= 40 A
250
VI  VBE 10  0.7

RB
RB
9.3 V
 232.5 k
40 A
10%
t
ts
td
tf
tr
tON
toff

The storage time interval ts result from the fact that a transistor has
excess minority carriers stored in the base when in saturation. The
excess storage charge has to be removed to turn off the transistor.

The storage time, in general, is several times higher than the rise or
fall time.

For high speed circuits the storage time is reduced by not driving
transistor deep into saturation. Example Schottky transistor.

Relation between  and 


Relation between  and 




and  
1 
1 
1
1 
Relation between  and 
=+1
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
COMPARISON OF DIFFERENT CONFIGURATIONS
S.
Characteristics C-B
C-E
No.
1.
Input resistance Very low (about Low
(about 1
20)
k)
2.
Output
Very high
High
resistance
(about 1 M) (about 40
k)
3.
Voltage gain
Very high
Moderate
4.
Current gain
1
Moderate
5.
Phase shift
0º or 360°
180º
between input
and output
voltages
6.
Applications
For high
For audio
frequency
frequency
circuits as
circuits
preamplifier
PERSONAL REMARK :

C-C
Very high
(about 500
k)
Low (about
50 )
Less than 1
Very high
0º or 360º
For
impedance
matching
Note :

In the case of CB-configuration current gain Ai is less than unity,
voltage gain AV is high input resistance, Ri is lowest and output
resistance Ro is highest of the three configuration. The CB stage
has few applications. It is sometimes used to match a very low
impedance source, to derive a high-impedance load. It is also used
as a constant-current source. Its main application is in cascode
amplifier (CE-CB) which is used in video amplifier to increase
bandwidth.

In the case of CE-configuration we see that only the common-emitter
stage is capable of both a voltage gain and current gain greater than
unity. This configuration is the most widely used among the three
configurations. We also observe from the above table that the
magnitudes of Ri and Ro lies between those for the CB and CC
configurations. It may be remember that CE-configuration is
usually used in the intermediate stages.

In the case of CC-configuration, we observe that voltage gain is
approximately unity while the current gain Ai is very high. Input
impedance, Ri is the highest and output impedance, Ro is the lowest
of the three configurations. That’s why this circuit finds wide
application as a buffer stage between a high-impedance source
to drive a low impedance load. It is also used for impedance
matching applications.

OPERATING POINT
For the proper operation of a transistor, in any application, we set a
fixed levels of certain currents and voltages in a transistor. These
value of currents and voltages define the point at which transistor
operates. This point is known as operating point or quiescent point or
simply Q-point. Since the level of the currents and voltage are fixed
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therefore, the operating point is also called d.c. operating point.
Or in other words, zero signal values of VCE and IC are called
the operating point or Q-points. Here zero signal means in the
absence of signal.
PERSONAL REMARK :

Selection of operating point

As we have discussed earlier biasing is nothing but a selection of
operating point  Let us assume that we want to transistor work
as an amplifier, so we will bias a transistor in such manner that its
IC (mA)
VCC
RC
B
Active region
D
C
E
Saturation
region
IB = 0
O
Cut-off region
A
VCE
Figure 1
(in
pu
ts
ign
al)
i
IC (mA)
2
(output current)
t

V

quiescent point (Q) always remain in the active region after applying
the input signal. Here an important question arises that at which
place in the active region we bias the transistor  For simple
understanding there are three possibilities i.e., D, C, E to bias a
transistor which will work as an amplifier. The points D, C, E are
shown in the figure 1. From figure 1 it is clear that there are three
possibilities to bias a transistor in active region to work as an amplifier
(namely D, C and E points).
If point D is selected as the operating point, the upper portion of the
positive half will be clipped off as this point lies very near to the
saturation region [see figure 2].

B
0
clipping
0

2
t
D
C
E
A
0
(output voltage)
O
IB = 0
VCE

2 t
clipping
Figure 2 : Output characteristics if D is selected as the operating point
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On the other hand, if point E is selected as the operating point, the
peak of the negative half will be clipped off as this point lies very
near to the cut-off region [see in figure 3]. Thus, in both the cases
distorted signal is obtained at the output.
PERSONAL REMARK :

IC (mA)

i
V
D
t

2
(output current)
(in
pu
ts
ign
al)
B
0
C

0
2
A
E
t
IB = 0
0
0
VCE
(output voltage)

clipping
clipping
2 t
Figure 3 : Output characteristics if E is selected as the operating point
However, if point C is selected as the operating point, full cycle of
the signal is obtained in the amplified form at the output [see figure
4]. In this case, signal is not distorted at all.
sig
na
l)
B
i
V
(output current)
t

(in
pu
t
IC (mA)
2

no clipping
0

D
0

C
2 t
E
A
0
(output voltage)
0
IB = 0
VCE

2 t
no clipping
Figure 4: Output characteristics if C is selected as the operating point
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PROBLEMS BASED ON GATE/IES/PSUs
1.
PERSONAL REMARK :
In the transistor circuit shown in figure, collector to-ground voltage is
+20 V. Which of the following is the probable cause
of error ?
(GATE-EE-1994)
(a)
Collector-emitter terminals shorted
(b)
Emitter to ground connection open
(c)
10 k resistor open
(d)
Collector-base terminals shorted
Ex.
Determine VC and VB for the
network shown below
+20V
RC
10k
= 45
10  F
R B 100 k
VEE = (–9V)
or VCE = VCC = 20 V.
In the circuit of figure the value of the base current IB will be
0.0 micro amperes
(b)
18.2 micro amperes
(c)
26.7 micro amperes
(d)
40.0 micro amperes
V0
10  F
If emitter to ground terminal is open, then IE = 0
(a)
C2
Vi
Sol.(b) If CE terminal is shorted, then VC = 0 V.
2.
1.2 k
C1
+10V 47k
or IC = 0 mA and VCE = VCC – ICRC

(GATE-EE-2000)
Sol. Applying Kirchhoff's voltage
in the clockwise direction for
the base-emitter loop will
result in
– IB RB – VBE + VEE = 0
+5V
5k
and IB =
Sol.(b) Apply KVL in the input loop
IE = 9.3 mA
Substitution yield
50
IB +
0.7V–
0.7 + IE 1 K – 10 = 0 V
1k
9.3
9.3
IB =
mA =
mA = 0.182 mA

(  1)
–10V
VEE – VBE
RB
IB =
9 V – 0.7 V .3 V
=
= 83  A
100 k
100 k
IC =  IB = (45) (83  A) = 3.735 mA
VC = – IC RC = –3.735 mA x1.2 k 
3.
Consider the circuit shown in figure. If the  of the transistor is 30 and
ICBO is 20 nA and the input voltage is + 5V, the transistor would be
operating in
(GATE-EE-2006)
(a)
saturation region
(b)
active region
(c)
breakdown region
(d)
or VC= – 4.48V
Ans.
VB = – IB RB = – (83  A) 100 k 
or VB = – 8.3 V
Ans.
+12V
2.2k
+12V
15k
Vi
cut-of region
Q
2.2k
Sol.(b) Apply KCL at base terminal as shown right
VB – Vi VB  12

+ IB = 0
15
100
100k
–12V
Vi
VB
IB
Q
Vi = 5 V and VBE = 0.7 or VB – VE = 0.7 Since VE = 0 V
Therefore VB = 0.7
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IC = IB + ( + 1) ICBO = 4.59 + 0.0006  4.60 mA
VCE = VCC – ICRC = 12 – 10.12 = 1.88 V Therefore VCE > 0.2 V
PERSONAL REMARK :
Ex.
Therefore transistor is operating in the active region.

For the transistor shown below,
assume that transistor have
very high  , find I1.
10.7 V
4.
I1
The common Emitter forward current gain of the transistor shown in
(F = 100). The transistor is operationg in
(GATE-EE- 2007)
10 k 
0.7 V
+ 10V
RE
(a) Saturation region
(b) Cut-off region
1 k
RB
(c) Reverse active region
270 k
RC
(d) Forward active region
Let us assume that BJT is operating in active region.
Apply KVL in the input loop, we get
10 – IE RE – VEB – IB RB = 0 or10 – (IC + IB) RE – VEB – IB RB = 0
I1 =
Ex.
1 0 .7  0 .7
= 1 mA
10 k
For the transistor shown below,
assume that transistor have
very high , find V2.
12 V
9.3
R B  (1  ) R E
IB =
or IB =
and
IC = IB = 100 × 0.025 = 2.5 mA
5.6 k
9.3
= 0.025 mA
  10  1
4V
VEC  10 – IERE – IC RC = 10 – 2.5 (1 + 1)
The transistor used in the circuit shown below has a  of 30 and ICBO
is negligible.
(GATE-EE- 2011)
15 k
2.4 k
10 V
(a) 2 V (b)  2 V
(c) 4 V (d)  4 V
Sol.(b) Given that is very high it
means IC = IE
From the given circuit
IE =
2.2 k
1k
V2
2.7 V
or VEC  5 V i.e. VEC > VEC(sat) Hence BJT is operating in active
region.
5.
(a) 1 mA
(b) 10 mA
(c) 0. 1 mA (d) 1 A
Sol.(a) From the given circuit
10 – IB ( + 1) RE – 0.7 – IB RB = 0
or
and
10.7 V
1 k
Sol.(d)From the given circuit, we observe that the given BJT is a pnp type
and since Base-Emitter (BE) junciton is forwand biased, it means the
transistor is not operating in cut-off region.
or
10 k
=100
 4  10
 2.5 mA and
2.4 k 
V2 = –5.6 × 103 ×2.5×10–3
D
VBE = 0.7 V
or V2 = – 14 = – 2 V
VCE(sat) = 0.2 V
VZ = 5 V
-12 V
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If the forward voltage drop of diode is 0.7 V, then the current through
collector will be
(a) 168 mA (b) 108 mA (c) 20.54 mA (d) 5.36 mA
Sol.(d) The Zener diode is ‘ON’ also diode D is forward biased.
Assume that transistor is operating in the active region.
Applying KVL in the input loop , we get
I B  0.7  VBE  5 or I B  5  0.7  VBE  3.6 mA
I c   I B  108 mA or
PERSONAL REMARK :
Ex.
For the transistor shown
below, assume that transistor
have very high , find I and
V.
1V
15 k
Vc  2.2I c  237.6
0V
VE  12V gives VCE  225.6V
Therefore transistor is operating in deep saturation and our
assumption is wrong.
Now Since given, VCE(sat) = 0.2 V,
Applying KVL in the output section
– IC 2.2 K – VCE(sat) + 12 = 0
or IC =
12 – VCE(sat)
2.2 K

12 – 0.2 11.8V
=
= 5.36 mA
2.2 K
2.2 K
Hence alternative (d) is the correct choice
6.
The phenomenon known as “Early Effect” in a bipolar transistor refers
to a reduction of the effective base-width caused by:
(a) Electron-hole recombination at the base
10 k
10 V
(a) 1 mA, 1 V (b) 2 mA, 2 V
(c) 2 mA, 1 V (d) 1 mA, 2 V
Sol.(a) Given that is very high it
means IC = IE
From the given circuit
IE =
0  (10)
 1 mA and
10 k
(GATE-EC-2006)
(b) The reverse biasing of the base-collector junction
(c) The forward biasing of emitter base-junction
(d) The early removal of stored base charge during saturation to cut
off switching
Sol.(b)Early effect phenemenon is caused due to large reverse biasing of
C - B junction.
7.

The breakdown voltage of a transistor with its base open is BVCEO and
that with emitter open is BVCBO, then:
(GATE-EC- 1995)
(a) BVCEO=BVCBO
(b) BVCEO>BVCBO
(c) BVCEO<BVCBO
(d) BVCEO is not related to BVCBO
1V
15 k
B
=0

0V
10 k
10 V
V = –0 × 15 × 103 = 1 V
Sol.(c) BVCEO = 0.52 BVCBO.From the relation, BVCEO < BVCBO
8. A BJT is said to be operating in the saturation region if:
(a) Both the junctions are reverse biased
(GATE-EC-1995)
(b) Base-emitter junction is reverse biased and base collector junction
is forward biased
(c) Base-emitter junction is forward biased and base collector junction
reverse-biased
(d) Both the junctions are forward biased
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PERSONAL REMARK :
Sol.(d)
Ex.

In the circuit shown in figure
below,
what
would
be
the minimum value of such
that the transistor is in
saturation ? Assume
9.
VCEsat = 0.2 V.
If a transistor is operating, with both of its junctions forward biased, but
with the collector base forward bias greater than the emitter-base
forward bias, then it is operating in the:
(GATE-EC- 1996)
(a) Forward active mode
(b) Reverse saturation mode
(c) Reverse active mode
(d) Forward saturation mode
[IES-EC: 2007-10 Marks ]
+5V
1 k
0.1mA
Sol.(b) Both emitter - base (EB) and collector base junctions (CB) are
forward biased so transistor is in saturation region. C-B junction is
more forward biased than E-B therefore reverse saturation mode.
10. In a bipolar junction transistor the collector breakdown voltage
increases:
(GATE-EC-1992)
(a) the base doping is increased and the base width is reduce
10 k
V BB
Sol.
Apply KVL in the output loop
we get ,
(b) the base doping is reduced and the base width is increased
–5 + IC RC + VCE(sat) = 0
(c) the base doping base and width are reduced
or IC RC = 5 – 0.5
(d) the base doping and base width are increased
Sol.(c) The breakdown voltage and depletion width is inversely proportional
to the doping concentration on both the sides of junction.Since
depletion width is increased base width is reduced.
or IC =
4.8
= 4.8 mA .... (i)
1k
Minimum Base current IB(min.)
which is required to put the
transistor in saturation mode is
11. The breakdown voltage of a BJT will be reduced if:
related as.
(GATE-EC-1992)
IB(min.)  I C

(a) the collector doping concentration is increased
(b) the base width is reduced
IC
4.8
= 48

Iβ
0.1
(c) the emitter doping concentration to base doping concentration is
reduced.
or  
(d) the collector doping concentration is reduced
Therefore minimum value of
required is 48
Sol.(a) On increasing collector doping concentration the collector breakdown
will be reduced, VBR 
12.
[given that IB(min.) = 0.1 mA]
1
Doping Concentration
In a transistor having finite , the forward bias across the base emitter
junction is kept constant and the reverse bias across the collector base
junction is increased. Neglecting the leakage across the collector base
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junction and the depletion region generating current, the base current
will:
(GATE-EC-1992)
(a) Increase
(b)
Decreases (c) Remain constant
(d)
PERSONAL REMARK :

Zero
Sol.(b) If the base width is reduced, lesser recombination of carriers will
take place coming from emitter region and therefore, more charge
carriers will flow through the base to collector IC will increase, IB will
I
decrease and we know that , β  C i.e. β increases.
IB
13. The “Early effect” in a bipolar junction transistor is caused by:
(GATE-EC-2001)
(a)
fast turn-on
(b) fast turn-off
(c) large collector base
reverse bias
(d) large emitter-base
forward bias
Sol.(c) The “Early effect” in a bipolar junction transistor is caused by large
collector base reverse bias.
14. For common emitter configuration which one of the following statements
is correct?
(IES-EE-2005)
(a) large current gain and high input resistance
(b) large voltage gain and low output resistance
(c) small voltage gain and low input resistance
(d) small current gain and high output resistance
Sol.(b) CE configuration has large voltage gain & low output resistance
15. Match List I (Type of Amplifier Configuration) with List II
(Characteristic Property) and select the correct answer using the code
given below the list:
(IES-EE-2006)
List-I
List-II
A. Common emitter amplifier
1.
Very low output resistance
B. Emitter follower
2.
C. Common base amplifier
3.
Current gain  1
Beta multiplication
D. Darlington pair
4.
Very high power gain
Codes:
A
B
C
D
(a) 4
1
2
3
(b)
A
B
C
D
2
3
4
1
4
3
(c) 4
3
2
1
(d)
2
1
Sol.(a) CE amplifier - Very high power gain
Emitter Follower - Very low output resistance
Common base amplifier - Current gain = 1
Darlington pair -  multiplication pair
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16.
For a transistor, turn-off time is :
(IES-EE-2011)
PERSONAL REMARK :

(a) Sum of storage time and fall time
(b) Maximum value of fall time
(c)
Maximum value of fall time
(d)
Sum of rise time and fall time
Sol.(a) OFF time, tOFF = ts +tf where , ts = storage time and tf = fall time
17. Which one of the following statements is correct in respect of BJT?
(IES-EE-2006)
(a) Avalanche multiplication starts when the reverse biased collectorbase voltage VCBequals the avalanche breakdown voltage BVCBO
(b) The early effect starts as soon as punchthrough occurs in a
transistor
(c) The small signal current gain hfe = large signal current gain hFE
when  hFE /  Ic =0.
(d) In the CE mode, a transistor can be cut off by reducing IB to zero
17(a) As soon as breakdown occurs the current IC increase
exponentially due to avalanche multiplication.
18. If F and R denote the forward and inverted mode current gains of a
BJT, which one of the following is correct?
(IES-EE-2007)
(a) F = R
(b)
F <R
(c)
F   R
(d) F >>R
Sol.(d)BJT is not symmetrical device. If the emitter and collector are
interchanged, the value of current gain Ris much lower than their
forward mode counterparts.R is in the range of 0.01 to 0.5
whereas R is in the range of 0.95 to 0.99.
19. The Si transistor as shown in the circuit below has  = 50 and negligible
leakage current.If VCC = 18 V, VEE = 4 V, RE = 200, RC= 4 k,
RB= 72 k,what is the value of the quiescent collector current ICQ?
(a)
1.1 mA
(b)
2 mA
(c)
5 mA
(d)
3.6 mA
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Sol.(b) Apply KVL in the input loop
IBRB+VBE + IERE  VEE = 0
or IE =
or IE =
or Ic =
PERSONAL REMARK :

VEE  VBE
R
RE+ B
+ 1
4  0.7
= 2.05 mA
0.2 +1.41

I E =2.00 mA
+1
20. "Early Effect" in BJT refers to
(IES-EE-2002)
(a) avalanche breakdown
(b) thermal runaway
(c) base narrowing
(d) zener breakdown
Sol.(c) As VCB is increased further in npn transistor, depletion region in
CB junction increases resulting in narrowing of base. IC increases
and r0 = VA/IC appears.
21.
The Darlington pair is mainly used for
(a)
impedance matching
(IES-EE-2002)
(b) wideband voltage amplification
(c) power amplification
(d) reducing distortion
Sol.(a) Due to high input impedance and low output impedance it is used
in impedance matching.
22.
The thermal run-away in a CE transistor amplifer can be
prevented by biasing the transistor in such a manner that
(a)
VCE 
(c) VCE 
VCC
2
(b) VCE 
VCC
2
VCC
2
(IES-EC-2000)
(d) None of these
Sol.(b)
23.
In a transistor biased in the active region, thermal runway is due
to
(a)
(IES-EC-2012)
Base emitter voltage V BE which decreases with rise in
temperature
(b)
Change in reverse collector saturation current due to rise in
temperature
(c)
Heating of the transistor
(d)
Changes in which increase with temperature
Sol.(b)
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24.
The voltage V0 of the circuit shown in the given figure is
+5V
(a) 5 V
(c) 2.5 V
(IES-EC-1999)
Ex.
2
3.1V
(b) 3.1 V
PERSONAL REMARK :
VC
C
5

In the bipolar current source
of figure shown below the
diode voltage and transistor
BE voltage are equal
20 V
B
(d) zero
E
10 k 
Sol.(b) Consider the circuit when there is no zener diode
4.7 k
+5V
10 k 
2
20 V
VC
If base current is neglected
then collector current is
(a) 6.43 mA (b) 2.13 mA
(c) 1.48 mA (d) 9.19 mA
5
We
see
that
the
transistor
is
in
cut-off
region,
So, IB = IC = 0 VC = 5 V. As VC = 5 V, VB = 0 V the zener diode
Sol(b) Given that ,VBE = 0.7 V , IB  0
The equivalent circuit for
determining the voltage at base
terminal is shown
turns ON, which clamps the CB junction at 3.1 V
+20 V
+5V
2
B
3.1V
I2
VC
5

20 V
0.7V
0.7V
20 V
So, VC = 3.1 V
25. A transistor is operated as a non-saturated switch to eliminate
(a) Storage-time
(b) Turn-off time
(c) Turn-on time
(d)
(IES-EC-1998)
Delay time
Sol.(a) Due to operation in saturation region there is deposition of excess
minority carriers across the C – B junction which has to be removed
during transistion from reverse bias to forward bias. To remove storage
KCL at point B we get ,I1 + I2 = 0
or
VB  0 VB  0.7  0.7  20

=0
10 K 
10 k 
or VB =  9.3 V
Now, Applying KVL in the input
section we get
VB  VBE  IC R E  20  0
or  9.3  0.7  I C 4.7 K  20  0
time modern transistor switches are operated between active and
or IC 
cut-off region.
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10 V
 2.13 mA
4.7 K
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