EE241
EE141 - Fall 1999
Introduction to Digital
Integrated Circuits
Tu-Th 9:30 - 11:00 am
203 McLaughlin
EE141
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What is this class about?
Introduction to digital integrated circuits.
l CMOS devices and manufacturing technology. CMOS inverters and gates. Propagation delay, noise margins, and power dissipation. Regenerative logic circuits. Arithmetic, interconnect, and memories. Programmable logic arrays. Design methodologies.
What will you learn?
l Understanding, designing, and optimizing digital circuits with respect to different quality metrics: cost, speed, power dissipation, and reliability
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Practical Information
EE141 l Instructors:
» Jan Rabaey
511 Cory Hall , 3-8206, jan@eecs.berkeley.edu
Office hours: Mo 1:30-3pm (231 Cory); Tu 11-12:30pm (511 Cory)
» Bora Nikolic
570 Cory Hall , tbd, bora@eecs.berkeley.edu
Office hours: Mo 11-12:30pm; We 2-3:30pm l TAs:
» Rhett Davis, wrdavis@EECS.Berkeley.EDU - Office hours: W 12:30-2pm (297 Cory)
» Vikram Shenoy, vshenoy@cory.EECS.Berkeley.EDU - Office hours: (297 Cory)
» David Wang, dvwang@joy.EECS.Berkeley.EDU - No Office Hours
» Englin Yeo, yeo@cory.EECS.Berkeley.EDU - Office hour: M 5-6:30pm (297 Cory) l “The Paperless Class” http:”//infopad.eecs.berkeley.edu/~icdesign/ee141”
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Discussions & Labs l Discussion Sessions - flexible assignment
» M 4-5pm; 405 Davis; Englin Yeo;
» W 4-5pm 285 Cory; Rhett Davis; l Labs - 353 Cory!
» Tu 3-6 pm (TBA),
» We 11-2 pm (TBA),
» Th 3-6 pm (TBA),
» Fr 11-2pm (TBA)
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Class Organization l +/- 10 assignments l One Integrated Design Project with 2 deliverables l Laboratories:
» 7 software labs
» 2 hardware labs
EE141 l 2 midterms; 1 final
» midterm1: Th 9/23; midterm2: Th 10/29
» final: Fr 12/10 (8-11am)
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Grading Policy l Homeworks: 10% l Labs: 10% l Projects: 20% l Midterms: 30% l Final: 30%
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Class Material l Textbook: “Digital Integrated Circuits - A Design
Perspective”, by J. Rabaey l Class notes: Web page (New stuff!) + http://infopad.eecs.berkeley.edu/~icdesign/instructors.html
l Lab Reader;
Available on the web page!
Selected material will be made available from
Copy Central l Check web page for the availability of tools
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New Software l Micromagic “max” and “sue”
» A modern version of the good ol’ magic
» On-line documentation and tutorials l HSPICE and IRSIM for simulation
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Getting Started l Assignment 1: Getting SPICE to work see web-page l NO discussion sessions or labs this week.
l First discussion sessions in Week 2 l First Software Lab in Week 3
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Digital Integrated Circuits l Introduction: Issues in digital design l The inverter - CMOS l Combinational logic structures l Sequential logic gates; timing l Arithmetic building blocks l Interconnect: R, L and C l Memories and array structures l Design methods
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Introduction
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The First Computer
The Babbage
Difference Engine
(1832)
25,000 parts cost: £17,470
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ENIAC - The first electronic computer
(1946)
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The Transistor Revolution
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First transistor
Bell Labs, 1948
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The First Integrated Circuits
Bipolar logic
1960’s
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ECL 3-input Gate
Motorola 1966
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Evolution in Complexity
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Evolution in Transistor Count
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Evolution in Speed/Performance
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Major challenges in digital design l The large
» Complexity l And the small
» Very-high speed design (> 1 GHz)
» Power dissipation
» Interconnect
» Clocking
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Intel 4004 Micro-Processor
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Intel Pentium (II) microprocessor
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Silicon in 2010
Die Area: 2.5x2.5 cm
Voltage: 0.6 V
Technology: 0.07
µ m
DRAM
DRAM (Logic)
SRAM (Cache)
Density Access Time
(Gbits/cm2)
8.5
2.5
0.3
(ns)
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1.5
Custom
Std. Cell
Gate Array
Single-Mask GA
FPGA
Density Max. Ave. Power Clock Rate
(Mgates/cm2) (W / cm2) (GHz)
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54
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1.5
5
2.5
0.4
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12.5
4.5
1
0.7
0.25
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The Challenge
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Source: sematech97
A growing gap between design complexity and design productivity
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Design Abstraction Levels
SYSTEM
+
MODULE
GATE
CIRCUIT
S n+
G
DEVICE n+
D
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