The FPGA Implementation of Amplitude-Locked Loop
System for Co-channel Communication Chip Design
Chia-Hung Huang, Yin-Chih Chen, and Gwo-Jia Jong
Department of Electronic Engineering
National Kaohsiung University of Applied Sciences
Chien Kung Campus 415, Chien Kung Road, Kaohsiung 807, Taiwan
vul35j8@gmail.com, jevonschen0312@hotmail.com,
gjjong@cc.kuas.edu.tw
Abstract. The modulated carrier is often interfered by any type of noises. The
co-channel separation system is a demodulation function with dominant and
subdominant signals using the receiver of modulation process system by
operating at the same as the carrier modulation system. In this thesis, we
adopted the field-programmable gate array (FPGA) design platform to develop
and achieve the co-channel separation and demodulation chip design for the
additive white Gaussian noise (AWGN) interference. In this thesis, the FPGA of
Compact-RIO system are integrated and applied to attain the function of
communication characteristic chip and hardware design by programming the
graphical language.
Keywords: Co-channel, FPGA, AWGN, PLL, ALL, Communication chip
prototype design.
1 Introduction
To suppress co-channel interference (CCI) is an important technique when mobile or
wireless are used to communicate the message. In this thesis, the focus is presented to
separate the mixed signal by the Phase-locked loop (PLL) and Amplitude-locked loop
(ALL) systems. However, the CCI is presented those conventional techniques will
suffer severe degradation. The envelope is no longer held in constant and the
instantaneous frequency is not kept on fixed proportional ratio to the original signal.
The PLL output will contain large in band spikes and get some unintelligible
turbulence.
The separation system architectures have four subsystems. The subsystems consist
of the co-channel frequency modulation multi-speech signals generator, PLL system,
ALL system [2-12] and filters. The final purpose, the separation system can
demonstrate to recover the original dominant and subdominant signals. Finally, we
developed a Field-Programmable Gate Array (FPGA) [1] based on the separation
models of PLL and ALL using a high-level design tool. We used National
Instruments (NI) / LabVIEW and NI compact-RIO [13] for the separation model cochannel FM multi-signals separating design. NI compact-RIO can be implemented the
FPGA design using the LabVIEW FPGA Project. In order to run with PC software in
S. Lin and X. Huang (Eds.): CSEE 2011, Part V, CCIS 218, pp. 458–461, 2011.
© Springer-Verlag Berlin Heidelberg 2011
The FPGA Implementation of Amplitude-Locked Loop System
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hardware co-simulation, it is designed by the Real-Timer hardware to the implement.
This hardware is supported and downloaded by the interface format for Ethernet. The
signal separating components that require PLL and ALL are designed by the
LabVIEW FPGA tool and implemented on NI cRIO-9116 Reconfigurable Chassis.
We investigate one approach using high-level tools to map a signal separating
algorithm to reconfigurable hardware. The first approach uses the FPGA tool to
model the system within LabVIEW. Finally, these system modules are synthesized to
hardware. The designs utilized one Xilinx Virtex-5 reconfigurable I/O (RIO) FPGA.
2 Simulated System for Compact-RIO Chip Design
2.1 The Front-End Frequency-Shift Keying Transmission
d (t ) =
2 Eb
cos(2π fi t )
Tb
0 ≤ t ≤ Tb
Fig. 1. Bit-stream transmission
Fig. 2. The transmitter for co-channel case
(1)
460
C.-H. Huang, Y.-C. Chen, and G.-J. Jong
3 Phase-Locked Loop (PLL) System and Amplitude-Locked Loop
(ALL) System
CCI is the interference due to the mixture of signals with similar carrier frequencies.
It is necessary to find efficient techniques to reduce the harmful effects of CCI in FM
analogue or digital communication system. The mobile users often operate in the
presence of cumbersome interference along with multi-path, Rayleigh fading channel
and AWGN channel that leads to signal distortion and signal fading at the receiver. In
Fig. 2, the interference between signals from these cells is called CCI. The co-channel
signals are transmitted by the same carrier frequency f c in the AWGN channel [14].
3.1 Signals Separation of Co-channel and Signals Analysis
Fig. 3. The architecture fo separation system with AWGN in channel
Signals analysis for m=1
When we assume m = 1 , the interference of
yFM 1 (t )
yFM 2 (t ) are equal. So we
utilize the ALL system get the signal of the other for setting m = 1 , and we can get
dominant or subdominant signal by tuning the m value. This system is the advantage
and
to adopt the communication security. It can be very useful for replacing the
encryption system. It is shown the dominant signal is alternate to subdominant signal
in Fig. 4.
Fig. 4. The separation signals using the filters for
m =1
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4 Discussion and Conclusion
The FPGA runs all code in hardware; it provides the high reliability and determinism
that is ideal for hardware-based interlocks, custom timing and triggering, or
eliminating the custom circuitry normally required with custom sensors. The result of
chip design system could proof the successful separation signals with AWGN for cochannel transmission. The design system is also be achieved the digital
communication chip prototype design model by building, program verifying, and
communication function implementation for the physical application of the industry.
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