Chapter 4
Field-Effect Transistors
Metal-oxide semiconductor field effect transistor
(MOSFET)
and
Junction field-effect transistor (JFET)
4.1 Characteristics of the MOS capacitor
MOS capacitor is essential to MOS transistor operation
Metal Electrode - "Gate"
v
T OX
G
Oxide
P-Type Silicon Substrate or "Body"
Figure 4.1 - MOS capacitor structure on p-type silicon
Accumulation Region
Depletion Region
V <<
G
TN
V
------ - ----
+
+
+
+
+
+++++ + + + + ++
--
-
--
-
--
P
(a)
V <
G
TN
V
Hole
Accumulation
Layer
P
(b)
Wd
Inversion Region
V >V
G
TN
+++ + ++ + + + ++
-
-
Depletion
Layer
-
-
Electron
Inversion
Layer
P
(c)
4.2 Structure of the NMOS transistor
Metal
W
Silicon Dioxide
( SiO 2)
S
G
n+
Source
Region
D
Cha
nne
l Re
gio
n
L
B
n ++
Drain
Region
te
tra
bs )
u
e S dy
yp (Bo
P-T
vS
vG
v
D
iG
iS
iD
Gate (G)
Source (S)
n+
Drain (D
n+
Channel Region
D
G
B
L
P-Type Substrate
S
Body (B)
iB
v
(b)
(c)
B
Figure 4.3 - (a) NMOS transistor structure (b) cross section
and (c) circuit symbol
4.3
Qualitative I-v behavior of the NMOS transistor
VGS << V
S
TN
D
+
n
n+
Immobile
Acceptor
Ion
(a)
Depletion
Region
p
B
V GS< V TN
S
D
+
n
n
+
Depletion
Region
p
(b)
B
V GS > V
S
TN
+
n
n
p
(c)
D
n-type Inversion
Layer
+
Depletion
Region
B
F igure 4. 4 - (a) V GS < < V TN (b) V GS < V TN (c) V GS > V TN
v DS ~~0
v GS
v GS > V TN
iG
vOX
iD
iS
n+
n+
i(x)
v(x)
p
iB
B
x
0
L
Figure 4.5 - M odel for determ ining i-v characteristics of the N M O S transistor
4.4 Linear region characteristics of the NMOS transistor
The electron charge per unit length at point x
''
(vox − VTN ) C/cm for
Q ' = −WCOX
vox >= VTN
(*)
''
C
where
OX = ε OX / TOX , oxide capacitance per unit
2
area ( F/cm )
ε OX = oxide permittivity ( F / cm)1
TOX = oxide thickness (cm).
vox
represents the voltage across the oxide and is a
function of position x in the channel
vOX = vGS − v(x)
where
v(x) = voltage at any point x in the channel referred
to the source
Note that
vox
must exceed VTN for an inversion
'
layer to exist, so Q will be zero until
At the source end of the channel
decreases to
the channel.
vOS = vGS − vDS
vox > VTN
.
vOX = vGS , and it
at the drain end of
The electron drift current at any point in the channel
is given by the product of the charge per unit length
times the velocity vx
i ( x ) = Q ' ( x )v x ( x )
The charge
Q'
is represented by Eq.(*) and the
velocity vx of electrons in the channel is determined
by the electron mobility and the transverse electric
field in the channel, so
''
( v OX − V TN )][ − µ n E x ]
i ( x ) = Q ' v x = [ −WC OX
The transverse electric field is equal to the negative of
the spatial derivative of the voltage in the channel
dv( x)
Ex = −
dx
So the current at any point in the channel
dv( x)
dx
− v( x ) − VTN )]dv( x)
''
i( x) = − µ nCOX
W (vGS − v( x ) − VTN )]
''
i( x)dx = − µ nCOX
W (vGS
Integrating i (x ) along the channel, we get
''
iDS = µ n COX
v
W
(vGS − VTN − DS )vDS
L
2
or
iDS = K N'
W
v
(vGS − VTN − DS )vDS
L
2
'
''
=
µ
K
C
where n
n ox and
VGS − VTN >= VDS >= 0
or
iDS
= K N (vGS − VTN −
vDS
)vDS
2
W
=
where K n K L
'
n
Interpretation of the Linear Region I-V characteristic
8.00e-4
Drain-Source Current (A)
V
=5V
GS
6.00e-4
V GS= 4 V
4.00e-4
V GS= 3 V
2.00e-4
V
GS
0.00e+0
0.0
0.2
0.4
=2V
0.6
0.8
Drain-Source Voltage (V)
F ig u re 4 .6 - N M O S i-v c h a ra c te ris tic s in th e lin e a r re g io n (V S B = 0 )
The resistance of the FET in the linear region near
the origin, called the on-resistance Ron, is defined as
iDS
Ron = {
vDS
vDS
−1
=
}
−0 Q − po int
1
W
(VGS − VTN )
K
L
'
n
4.4
Saturation of the I-V characteristics
S
n
v GS > V TN
G
vDS Small
D
+
n
Depletion
Region
p
+
Acceptor Ion
B
S
n
v GS > V TN
G
+
=v
v
> vGS - V TN
DS
n
Depletion
Region
v
D
GS
- V TN
+
p
B
S
n
Depletion
Region
v GS > V TN
G
+
DS
D
n
p
+
Pinch-off Point
B
Figure 4.7 -
(a) MOSFET in the linear region
(b) MOSFET with channel just pinched off at the drain
(c) Channel pinch off for vDS > vGS - VTN
v GS
v DS
n+
n+
v( x
PO
)=v
-V
GS
TN
x
xPO
L
Figure 4.8 - Inversion layer in the saturation region, also known as the pinchoff
region
Since the voltage across the inverted channel is
constant, the drain to source current in saturation is
2.20e-4
Drain-Source Current (A)
VGS = 5 V
Linear
Region
2.00e-4
1.80e-4
Pinchoff Locus
1.60e-4
Saturation Region
1.40e-4
VGS= 4 V
1.20e-4
1.00e-4
8.00e-5
V
6.00e-5
GS
=3V
4.00e-5
2.00e-5
0.00e+0
V
0
2
4
6
Š1V
GS
VGS= 2 V
8
10
12
Drain-Source Voltage (V)
Figure 4.9 - Output characteristics for an NMOS transistor with
VTN = 1 V and Kn = 25 x 10-6 A/V2
also constant ( independent from VDS )
iDS
K N' W
=
(vGS − VTN ) 2 for vDS ≥ (vGS − VTN ) ≥ 0
2 L
1.00e-4
Drain-Source Current (A)
9.00e-5
8.00e-5
7.00e-5
Pinchoff Point VDS= VGS - VTN = 2 V
6.00e-5
5.00e-5
Saturation Region Equation
4.00e-5
3.00e-5
VGS = 3 V
2.00e-5
Linear Region Equation
1.00e-5
0.00e+0
0
2
4
6
8
10
12
Drain-Source Voltage (V)
Figure 4.10 - Output characteristic showing intersection of the linear
region and saturation region equations at the pinchoff point
4.6 Channel-length modulation
2.50e-4
V
Drain-Source Current (A)
GS
=5V
2.00e-4
1.50e-4
V
=4V
GS
1.00e-4
V GS= 3 V
5.00e-5
V
GS
=2V
0.00e+0
-5.00e-5
0
2
4
6
8
10
12
Drain-Source Voltage (V)
F ig u r e 4 .1 1 - O u tp u t c h a r a c te r is tic s in c lu d in g th e e ffe c ts o f
c h a n n e l le n g th m o d u la tio n
vGS
n+
v DS
n+
Pinchoff point
L
∆L
LM
x
Figure 4.12 - Channel length modulation
There is an effective reduction of the channel length
by increasing VDS in saturation ( ∆L increases).
This causes some increase in iDS
iDS
K n' W
=
(vGS − VTN ) 2 (1 + λvDS )
2 L
where λ is called channel-length modulation
parameter
NMOS Transistor mathematical model summary
For all regions
'' W
K n = µ n C ox
L
Cutoff region:
iG = 0
i DS = 0
iB = 0
for vGS ≤ VTN
Linear region:
iDS = K N (vGS − VTN −
vDS
)vDS
2
for vGS − VTN ≥ v DS ≥ 0
Saturation region:
K
iDS = N (vGS − VTN ) 2 (1 + λv DS ) for v DS ≥ vGS − VTN ≥ 0
2
4.7 Transfer characteristics and the depletion-mode
MOSFET
250
Drain-Source Current (uA)
Enhancement-Mode
200
Depletion-Mode
150
100
50
0
VTN = -2 V
-50
-4
-2
VTN = +2 V
0
2
4
6
Gate-Source Voltage (V)
Figure 4.13 - Transfer characteristics for enhancement-mode and
depletion-mode NMOS transistors
S
G
n+
D
n+
Implanted n-type
Channel Region
L
p-type Substrate
B
F ig u r e 4 .1 4 - C r o s s s e c tio n o f a d e p le tio n -m o d e N M O S
tr a n s is to r
4.8 Body effect or substrate sensitivity
VTN = VTO + γ ( vSB + 2φ F − 2φ F )
Where VTO
= zero-substrate-bias value for VTN (V )
γ = body-effect parameter V
2φ F = surface potential parameter (V)
3.00
2.75
Threshold Voltage (V)
2.50
2.25
2.00
1.75
1.50
1.25
1.00
V
0.75
TO
0.50
0.25
0.00
-1
0
1
2
3
4
5
6
Source-Bulk Voltage (V)
Figure 4.15 - Threshold variation with source-bulk voltage for a NMOS
transistor with VTO = 1 V, 2φF = 0.6 V and γ = 0.75 V .
4.9 PMOS transistors
PMOS transistor mathematical model summary
For all regions
K n = µ n C ox''
W
L
iG = 0
iB = 0
Cutoff region:
iSD = 0 for vSG ≤ −VTP (vGS ≥ VTP )
Linear region:
vSD
iSD = K P (vSG + VTP − )vSD for vSG + VTP ≥ vSD ≥ 0
2
Saturation region:
K
iSD = P (vSG + VTP ) 2 (1 + λvSD ) for vSD ≥ vSG + VTP ≥ 0
2
v
v <0
S
iS
v <0
G
i
D
Gate
G
iD
Drain
Source
p+
Channel Region
p+
L
N-Type Substrate
i
B
Body
v >0
B
Figure 4.16 - Cross section of an enhancement-mode PMOS transistor
2.50e-4
V
Source-Drain Current (A)
SG
= 5 V (V = -5 V)
GS
2.00e-4
1.50e-4
V
= 4 V (V = -4 V)
SG
GS
1.00e-4
V
= 3 V (V = -3 V)
V
= 2 V (V = -2 V)
SG
5.00e-5
SG
0.00e+0
-5.00e-5
GS
GS
VSG Š 1 V (V
-2
0
2
4
6
8
-1 V)
GS
10
12
Source-Drain Voltage (V)
Figure 4.17 - Output characteristics for a PM OS transistor with
V TP = -1 V
Current and voltage relationships in PMOS are like
in NMOS except that their polarities are reversed.
MOSFET circuit symbols and model summary
IEEE Standard MOS transistor circuit
symbols
D
D
G
G
B
B
S
S
(a) NMOS enhancement-mode device
(b) PMOS enhancement-mode device
D
D
G
G
B
B
S
(c) NMOS depletion-mode device
S
(d) PMOS depletion-mode device
Arrow points in Dthe direction of bulk-channel diodes
D
G
S
(e) Three-terminal NMOS transistor
G
S
(f) Three-terminal PMOS transistor
In these symbols arrow points in the direction of the
positive current
Mathematical Model Summary
NMOS Transistor model summary
For all regions
K n = µn Cox''
W
L
iG = 0
iB = 0
Cutoff region:
i DS = 0 for vGS ≤ VTN
Linear region:
iDS = K N (vGS − VTN
vDS
−
)vDS for
2
v GS − VTN ≥ v DS ≥ 0
Saturation region:
iDS
KN
=
(vGS − VTN ) 2 (1 + λv DS )
for
2
v DS ≥ vGS − VTN ≥ 0
Threshold voltage:
VTN = VTO + γ ( v SB + 2φ F − 2φ F )
PMOS transistor mathematical model summary
For all regions
'' W
K n = µ n C ox
L
iG = 0
iB = 0
Cutoff region:
iSD = 0 for vSG ≤ −VTP (vGS ≥ VTP )
Linear region:
vSD
iSD = K P (vSG + VTP − )vSD
2
for
vSG + VTP ≥ vSD ≥ 0
Saturation region:
KP
(vSG + VTP ) 2 (1 + λvSD ) for vSD ≥ vSG + VTP ≥ 0
iSD =
2
Threshold voltage:
VTP = VTO − γ ( vBS + 2φF − 2φF )
D
S
+
i DS
G
B
+
v DS
SG
G -
v BS
+
+
B
-
v SB
vGS
-
v
+
v SD
-
-
i SD
+
S
D
PMOS
transistor
NMOS transistor
Figure 4.19 - NMOS and PMOS transistor circuit symbols
Table 4.1 - Categories of MOS Transistors
NMOS Device
PMOS Device
Enhancement-mode
VTN > 0
VTP < 0
Depletion-mode
VTN <= 0
VTP >=0