LTC6244
Dual 50MHz, Low Noise,
Rail-to-Rail, CMOS Op Amp
FEATURES
DESCRIPTION
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The LTC®6244 is a dual high speed, unity-gain stable CMOS
op amp that features a 50MHz gain bandwidth, 40V/μs slew
rate, 1pA of input bias current, low input capacitance and
rail-to-rail output swing. The 0.1Hz to 10Hz noise is just
1.5μVP-P and 1kHz noise is guaranteed to be less than
12nV/√Hz. This excellent AC and noise performance is
combined with wide supply range operation, a maximum
offset voltage of just 100μV and drift of only 2.5μV/°C,
making it suitable for use in many fast signal processing
applications, such as photodiode amplifiers.
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Input Bias Current: 1pA (Typ at 25°C)
Low Offset Voltage: 100μV Max
Low Offset Drift: 2.5μV/°C Max
0.1Hz to 10Hz Noise: 1.5μVP-P
Slew Rate: 40V/μs
Gain Bandwidth Product: 50MHz
Output Swings Rail-to-Rail
Supply Operation:
2.8V to 6V LTC6244
2.8V to ±5.25V LTC6244HV
Low Input Capacitance: 2.1pF
Available in 8-Pin MSOP and Tiny DFN Packages
APPLICATIONS
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Photodiode Amplifiers
Charge Coupled Amplifiers
Low Noise Signal Processing
Active Filters
Medical Instrumentation
High Impedance Transducer Amplifier
This op amp has an output stage that swings within 35mV
of either supply rail to maximize the signal dynamic range
in low supply applications. The input common mode
range extends to the negative supply. It is fully specified
on 3V and 5V, and an HV version guarantees operation
on supplies of ±5V.
The LTC6244 is available in the 8-pin MSOP, and for compact designs, it is packaged in the tiny dual fine pitch lead
free (DFN) package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Very Low Noise Large Area Photodiode
VOS Distribution
120
0.25pF
PHILIPS
BF862
JFET
100
–
–5V
4.7μF*
IPD
4.99k
VBB
90
1M
5V
4.99k
110
1/2
LTC6244HV
+
VOUT = 1M • IPD
BW = 350kHz
NOISE = 291nV AT 10kHz
VOUT
NUMBER OF UNITS
5V
LTC6244MS8
VS = 5V, 0V
VCM = 2.5V
TA = 25°C
80
70
60
50
40
30
–5V 6244 TA01a
20
10
HAMAMATSU LARGE AREA
PHOTODIODE
S1227-1010BQ
CPD = 3000pF
0
–60
20
40
–40 –20
0
INPUT OFFSET VOLTAGE (μV)
60
6244 TA01b
* CAN BE MICROPHONIC, FILM, X7R, IF NEEDED.
6244fb
1
LTC6244
ABSOLUTE MAXIMUM RATINGS (Note 1)
Total Supply Voltage (V+ to V–)
LTC6244..................................................................7V
LTC6244HV ...........................................................12V
Input Voltage.......................... (V+ + 0.3V) to (V– – 0.3V)
Input Current........................................................±10mA
Output Short Circuit Duration (Note 2)............. Indefinite
Operating Temperature Range
LTC6244C ............................................ –40°C to 85°C
LTC6244I.............................................. –40°C to 85°C
LTC6244H .......................................... –40°C to 125°C
Specified Temperature Range (Note 3)
LTC6244C ................................................ 0°C to 70°C
LTC6244I.............................................. –40°C to 85°C
LTC6244H .......................................... –40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
PIN CONFIGURATION
TOP VIEW
9
OUT A 1
–IN A 2
+IN A 3
V– 4
8 V+
TOP VIEW
7 OUT B
A
B
OUT A
–IN A
+IN A
V–
6 –IN B
5 +IN B
1
2
3
4
8
7
6
5
V+
OUT B
–IN B
+IN B
MS8 PACKAGE
8-LEAD PLASTIC MSOP
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 43°C/W
EXPOSED PAD (PIN 9) CONNEECTED TO V–
(PCB CONNECTION OPTIONAL)
TJMAX = 150°C, θJA = 250°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LTC6244CDD#PBF
LTC6244CDD#TRPBF
LCCF
8-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LTC6244HVCDD#PBF
LTC6244HVCDD#TRPBF
LCGD
8-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LTC6244IDD#PBF
LTC6244IDD#TRPBF
LCCF
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC6244HVIDD#PBF
LTC6244HVIDD#TRPBF
LCGD
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC6244HDD#PBF
LTC6244HDD#TRPBF
LCCF
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC6244HVHDD#PBF
LTC6244HVHDD#TRPBF
LCGD
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC6244CMS8#PBF
LTC6244CMS8#TRPBF
LTCCM
8-Lead Plastic MSOP
0°C to 70°C
LTC6244HVCMS8#PBF
LTC6244HVCMS8#TRPBF LTCGF
8-Lead Plastic MSOP
0°C to 70°C
LTC6244IMS8#PBF
LTC6244IMS8#TRPBF
LTCCM
8-Lead Plastic MSOP
–40°C to 85°C
LTC6244HVIMS8#PBF
LTC6244HVIMS8#TRPBF
LTCGF
8-Lead Plastic MSOP
–40°C to 85°C
LTC6244HMS8#PBF
LTC6244HMS8#TRPBF
LTCCM
8-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
6244fb
2
LTC6244
ELECTRICAL CHARACTERISTICS
(LTC6244C/I, LTC6244HVC/I) The l denotes the specifications which apply
over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage (Note 4)
MS8 Package
0°C to 70°C
–40°C to 85°C
l
l
DD Package
0°C to 70°C
–40°C to 85°C
l
l
VOS Match Channel-to-Channel (Note 5) MS8 Package
0°C to 70°C
–40°C to 85°C
l
l
DD Package
0°C to 70°C
–40°C to 85°C
l
l
TC VOS
Input Offset Voltage Drift, MS8 (Note 6)
IB
Input Bias Current (Notes 4, 7)
IOS
MIN
l
MAX
UNITS
40
100
225
300
μV
μV
μV
100
650
800
950
μV
μV
μV
40
160
275
325
μV
μV
μV
150
800
900
1.1
μV
μV
mV
0.7
2.5
μV/°C
75
pA
pA
75
pA
pA
1
l
Input Offset Current (Notes 4, 7)
TYP
0.5
l
Input Noise Voltage
0.1Hz to 10Hz
en
Input Noise Voltage Density
f = 1kHz
in
Input Noise Current Density (Note 8)
0.56
fA/√Hz
RIN
Input Resistance
Common Mode
1012
Ω
CIN
Input Capacitance
Differential Mode
Common Mode
f = 100kHz
3.5
2.1
pF
pF
VCM
Input Voltage Range
Guaranteed by CMRR
l
0
CMRR
Common Mode Rejection
0V ≤ VCM ≤ 3.5V
l
74
105
dB
CMRR Match
Channel-to-Channel (Note 5)
AVOL
Large Signal Voltage Gain
1.5
8
μVP-P
12
3.5
nV/√Hz
V
l
72
100
dB
VO = 1V to 4V
RL = 10k to VS/2
0°C to 70°C
–40°C to 85°C
l
l
1000
600
450
2500
V/mV
V/mV
V/mV
VO = 1.5V to 3.5V
RL = 1k to VS/2
0°C to 70°C
–40°C to 85°C
l
l
300
200
150
1000
V/mV
V/mV
V/mV
VOL
Output Voltage Swing Low (Note 9)
No Load
ISINK = 1mA
ISINK = 5mA
l
l
l
15
40
150
35
75
300
mV
mV
mV
VOH
Output Voltage Swing High (Note 9)
No Load
ISOURCE = 1mA
ISOURCE = 5mA
l
l
l
15
45
175
35
75
325
mV
mV
mV
PSRR
Power Supply Rejection
VS = 2.8V to 6V, VCM = 0.2V
l
75
105
dB
PSRR Match
Channel-to-Channel (Note 5)
l
73
100
dB
Minimum Supply Voltage (Note 10)
l
2.8
ISC
Short-Circuit Current
l
25
IS
Supply Current per Amplifier
l
V
35
6.25
mA
7.4
mA
6244fb
3
LTC6244
ELECTRICAL CHARACTERISTICS
(LTC6244C/I, LTC6244HVC/I) The l denotes the specifications which apply
over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GBW
Gain Bandwidth Product
Frequency = 100kHz, RL = 1kΩ
l
35
50
MHz
SR
Slew Rate (Note 11)
AV = –2, RL = 1kΩ
l
18
35
V/μs
FPBW
Full Power Bandwidth (Note 12)
VOUT = 3VP-P, RL = 1kΩ
l
1.9
3.7
MHz
ts
Settling Time
VSTEP = 2V, AV = –1, RL = 1kΩ, 0.1%
535
ns
(LTC6244C/I, LTC6244HVC/I) The l denotes the specifications which apply over the specified temperature range, otherwise
specifications are at TA = 25°C. VS = 3V, 0V, VCM = 1.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage (Note 4)
MS8 Package
0°C to 70°C
–40°C to 85°C
l
l
DD Package
0°C to 70°C
–40°C to 85°C
l
l
VOS Match Channel-to-Channel (Note 5) MS8 Package
0°C to 70°C
–40°C to 85°C
l
l
DD Package
0°C to 70°C
–40°C to 85°C
l
l
IB
IOS
Input Bias Current (Notes 4, 7)
MIN
0.1Hz to 10Hz
en
Input Noise Voltage Density
f = 1kHz
in
Input Noise Current Density (Note 8)
UNITS
175
250
325
μV
μV
μV
100
650
800
950
μV
μV
μV
40
200
300
350
μV
μV
μV
150
800
900
1.1
μV
μV
mV
75
pA
pA
75
pA
pA
0.5
l
Input Noise Voltage
MAX
40
1
l
Input Offset Current (Notes 4, 7)
TYP
1.5
8
μVP-P
12
0.56
nV/√Hz
fA/√Hz
VCM
Input Voltage Range
Guaranteed by CMRR
l
CMRR
Common Mode Rejection
0V ≤ VCM ≤ 1.5V
l
70
105
dB
CMRR Match
Channel-to-Channel (Note 5)
AVOL
Large Signal Voltage Gain
0
1.5
V
l
68
100
dB
VO = 1V to 2V
RL = 10k to VS/2
0°C to 70°C
–40°C to 85°C
l
l
200
100
85
800
V/mV
V/mV
V/mV
VOL
Output Voltage Swing Low (Note 9)
No Load
ISINK = 1mA
l
l
12
45
30
110
mV
mV
VOH
Output Voltage Swing High (Note 9)
No Load
ISOURCE = 1mA
l
l
12
50
30
110
mV
mV
PSRR
Power Supply Rejection
VS = 2.8V to 6V, VCM = 0.2V
l
ISC
PSRR Match
Channel-to-Channel (Note 5)
Minimum Supply Voltage (Note 10)
Short-Circuit Current
75
105
dB
l
73
100
dB
l
2.8
l
8
V
15
mA
6244fb
4
LTC6244
ELECTRICAL CHARACTERISTICS
(LTC6244C/I, LTC6244HVC/I) The l denotes the specifications which apply
over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 0V, VCM = 1.5V unless otherwise noted.
SYMBOL
PARAMETER
IS
Supply Current per Amplifier
GBW
Gain Bandwidth Product
CONDITIONS
MIN
l
Frequency = 100kHz, RL = 1kΩ
l
35
TYP
MAX
4.8
5.8
50
UNITS
mA
MHz
(LTC6244HVC/I) The l denotes the specifications which apply over the specified temperature range, otherwise specifications are at
TA = 25°C. VS = ±5V, 0V, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage (Note 4)
MS8 Package
0°C to 70°C
–40°C to 85°C
l
l
DD Package
0°C to 70°C
–40°C to 85°C
l
l
VOS Match Channel-to-Channel (Note 5) MS8 Package
0°C to 70°C
–40°C to 85°C
l
l
DD Package
0°C to 70°C
–40°C to 85°C
l
l
TC VOS
Input Offset Voltage Drift, MS8 (Note 6)
IB
Input Bias Current (Notes 4, 7)
IOS
MIN
l
MAX
UNITS
50
220
275
375
μV
μV
μV
100
700
800
1050
μV
μV
μV
50
250
325
400
μV
μV
μV
150
900
1000
1100
μV
μV
μV
0.7
2.5
μV/°C
75
pA
pA
75
pA
pA
1
l
Input Offset Current (Notes 4, 7)
TYP
0.5
l
Input Noise Voltage
0.1Hz to 10Hz
en
Input Noise Voltage Density
f = 1kHz
in
Input Noise Current Density (Note 8)
0.56
fA/√Hz
RIN
Input Resistance
Common Mode
1012
Ω
CIN
Input Capacitance
Differential Mode
Common Mode
f = 100kHz
3.5
2.1
pF
pF
VCM
Input Voltage Range
Guaranteed by CMRR
l
–5
CMRR
Common Mode Rejection
–5V ≤ VCM ≤ 3.5V
l
80
105
dB
l
78
95
dB
VO = –3.5V to 3.5V
RL = 10k
0°C to 70°C
–40°C to 85°C
l
l
2500
1500
1200
6000
V/mV
V/mV
V/mV
RL = 1k
0°C to 70°C
–40°C to 85°C
l
l
700
400
300
3500
V/mV
V/mV
V/mV
CMRR Match
Channel-to-Channel (Note 5)
AVOL
Large Signal Voltage Gain
1.5
8
μVP-P
12
3.5
nV/√Hz
V
VOL
Output Voltage Swing Low (Note 9)
No Load
ISINK = 1mA
ISINK = 10mA
l
l
l
15
45
360
40
75
550
mV
mV
mV
VOH
Output Voltage Swing High (Note 9)
No Load
ISOURCE = 1mA
ISOURCE = 10mA
l
l
l
15
45
360
40
75
550
mV
mV
mV
6244fb
5
LTC6244
ELECTRICAL CHARACTERISTICS
(LTC6244HVC/I) The l denotes the specifications which apply over the
specified temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, 0V, VCM = 0V unless otherwise noted.
SYMBOL
PSRR
PARAMETER
MIN
TYP
l
75
110
dB
PSRR Match
Channel-to-Channel (Note 5)
l
73
106
dB
2.8
40
55
mA
Power Supply Rejection
CONDITIONS
VS = 2.8V to 10.5V, VCM = 0.2V
Minimum Supply Voltage (Note 10)
l
ISC
Short-Circuit Current
l
IS
Supply Current per Amplifier
l
GBW
Gain Bandwidth Product
Frequency = 100kHz, RL = 1kΩ
SR
Slew Rate (Note 11)
MAX
UNITS
V
7
8.8
mA
l
35
50
MHz
AV = –2, RL = 1kΩ
l
18
40
V/μs
l
1.9
4.25
MHz
330
ns
FPBW
Full Power Bandwidth (Note 12)
VOUT = 3VP-P, RL = 1kΩ
ts
Settling Time
VSTEP = 2V, AV = –1, RL = 1kΩ, 0.1%
(LTC6244H) The l denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = 5V, 0V,
VCM = 2.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage (Note 4)
MS8 Package
DD8 Package
VOS Match Channel-to-Channel (Note 5) MS8 Package
DD8 Package
–40°C to 125°C
TC VOS
Input Offset Voltage Drift, MS8 (Note 6)
IB
Input Bias Current (Notes 4, 7)
IOS
MIN
l
l
l
l
l
MAX
UNITS
40
125
400
μV
μV
100
650
950
μV
μV
40
160
400
μV
μV
150
800
1160
μV
μV
0.7
2.5
1
l
Input Offset Current (Notes 4, 7)
TYP
2
pA
nA
250
pA
pA
3.5
V
0.5
l
μV/°C
VCM
Input Voltage Range
Guaranteed by CMRR
l
0
CMRR
Common Mode Rejection
0V ≤ VCM ≤ 3.5V
l
74
dB
l
72
dB
VO = 1V to 4V
RL = 10k to VS /2
l
350
V/mV
VO = 1.5V to 3.5V
RL = 1k to VS /2
l
125
CMRR Match
Channel-to-Channel (Note 5)
AVOL
Large Signal Voltage Gain
V/mV
VOL
Output Voltage Swing Low (Note 9)
No Load
ISINK = 1mA
ISINK = 5mA
l
l
l
40
85
325
mV
mV
mV
VOH
Output Voltage Swing High (Note 9)
No Load
ISOURCE = 1mA
ISOURCE = 5mA
l
l
l
40
85
325
mV
mV
mV
6244fb
6
LTC6244
ELECTRICAL CHARACTERISTICS
(LTC6244H) The l denotes the specifications which apply from –40°C to
125°C, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
TYP
MAX
UNITS
75
dB
l
73
dB
l
2.8
V
Short-Circuit Current
l
20
mA
IS
Supply Current per Amplifier
l
GBW
Gain Bandwidth Product
Frequency = 100kHz, RL = 1kΩ
SR
Slew Rate (Note 11)
AV = –2, RL = 1kΩ
l
17
V/μs
FPBW
Full Power Bandwidth (Note 12)
VOUT = 3VP-P, RL = 1kΩ
l
1.8
MHz
PSRR
Power Supply Rejection
PSRR Match
Channel-to-Channel (Note 5)
Minimum Supply Voltage (Note 10)
ISC
VS = 2.8V to 6V, VCM = 0.2V
MIN
l
l
6.25
7.4
30
mA
MHz
(LTC6244H) The l denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = 3V, 0V,
VCM = 1.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage (Note 4)
MS8 Package
DD8 Package
VOS Match Channel-to-Channel (Note 5) MS8 Package
DD8 Package
IB
IOS
Input Bias Current (Notes 4, 7)
MIN
l
l
l
l
MAX
UNITS
40
175
400
μV
μV
100
650
950
μV
μV
40
160
400
μV
μV
150
800
1200
μV
μV
2
pA
nA
250
pA
pA
1
l
Input Offset Current (Notes 4, 7)
TYP
0.5
l
VCM
Input Voltage Range
Guaranteed by CMRR
l
0
CMRR
Common Mode Rejection
0V ≤ VCM ≤ 1.5V
l
70
dB
dB
CMRR Match
Channel-to-Channel (Note 5)
1.5
V
l
68
AVOL
Large Signal Voltage Gain
VO = 1V to 2V
RL = 10k to VS /2
l
75
VOL
Output Voltage Swing Low (Note 9)
No Load
ISINK = 1mA
l
l
30
110
mV
mV
VOH
Output Voltage Swing High (Note 9)
No Load
ISOURCE = 1mA
l
l
30
110
mV
mV
PSRR
Power Supply Rejection
VS = 2.8V to 6V, VCM = 0.2V
l
75
dB
PSRR Match Channel-to-Channel
(Note 5)
l
73
dB
2.8
5
Minimum Supply Voltage (Note 10)
l
ISC
Short-Circuit Current
l
IS
Supply Current per Amplifier
l
GBW
Gain Bandwidth Product
Frequency = 100kHz, RL = 1kΩ
l
V/mV
V
mA
4.8
28
5.8
mA
MHz
6244fb
7
LTC6244
ELECTRICAL CHARACTERISTICS
(LTC6244HVH) The l denotes the specifications which apply from –40°C to
125°C, otherwise specifications are at TA = 25°C. VS = ±5V, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage (Note 4)
DD8 Package
VOS Match Channel-to-Channel (Note 5) DD8 Package
TC VOS
Input Offset Voltage Drift, MS8 (Note 6)
IB
Input Bias Current (Notes 4, 7)
IOS
MIN
l
l
l
MAX
UNITS
100
700
1050
μV
μV
150
900
1165
μV
μV
0.7
2.5
1
l
Input Offset Current (Notes 4, 7)
TYP
2
pA
nA
250
pA
nA
0.5
l
μV/°C
Input Noise Voltage
0.1Hz to 10Hz
en
Input Noise Voltage Density
f = 1kHz
in
Input Noise Current Density (Note 8)
0.56
fA/√Hz
RIN
Input Resistance
Common Mode
1012
Ω
CIN
Input Capacitance
Differential Mode
Common Mode
f = 100kHz
3.5
2.1
pF
pF
VCM
Input Voltage Range
Guaranteed by CMRR
l
–5
CMRR
Common Mode Rejection
–5V ≤ VCM ≤ 3.5V
l
80
105
dB
l
78
95
dB
l
2500
1000
6000
V/mV
V/mV
l
700
170
3500
V/mV
V/mV
CMRR Match
Channel-to-Channel (Note 5)
AVOL
Large Signal Voltage Gain
VO = –3.5V to 3.5V
RL = 10k
RL = 1k
1.5
8
μVP-P
12
3.5
nV/√Hz
V
VOL
Output Voltage Swing Low (Note 9)
No Load
ISINK = 1mA
ISINK = 10mA
l
l
l
15
45
360
40
75
550
mV
mV
mV
VOH
Output Voltage Swing High (Note 9)
No Load
ISOURCE = 1mA
ISINK = 10mA
l
l
l
15
45
360
40
75
550
mV
mV
mV
PSRR
Power Supply Rejection
VS = 2.8V to 10.5V, VCM = 0.2V
l
75
110
dB
PSRR Match Channel-to-Channel
(Note 5)
l
73
106
dB
Minimum Supply Voltage (Note 10)
l
2.8
ISC
Short-Circuit Current
l
40
55
V
l
mA
IS
Supply Current per Amplifier
GBW
Gain Bandwidth Product
Frequency = 100kHz, RL = 1kΩ
l
35
50
9.3
MHz
mA
SR
Slew Rate (Note 11)
AV = –2, RL = 1kΩ
l
18
40
V/μs
FPBW
Full Power Bandwidth (Note 12)
VOUT = 3VP-P, RL = 1kΩ
l
1.9
4.3
MHz
ts
Settling Time
VOUT = 2V, AV = –1 , RL =1kΩ
l
330
ns
6244fb
8
LTC6244
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 3: The LTC6244C/LTC6244HVC are guaranteed to meet specified
performance from 0°C to 70°C. They are designed, characterized and
expected to meet specified performance from –40°C to 85°C, but are not
tested or QA sampled at these temperatures. The LTC6244I/LTC6244HVI,
are guaranteed to meet specified performance from –40°C to 85°C. The
LTC6244H is guaranteed to meet specified performance from –40°C to
125°C.
Note 4: ESD (Electrostatic Discharge) sensitive device. ESD protection
devices are used extensively internal to the LTC6244; however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
Note 5: Matching parameters are the difference between the two amplifiers
of the LTC6244. CMRR and PSRR match are defined as follows: CMRR
and PSRR are measured in μV/V on the amplifiers. The difference is
calculated between the sides in μV/V. The result is converted to dB.
Note 6: This parameter is not 100% tested.
Note 7: This specification is limited by high speed automated test
capability. See Typical Characteristics curves for actual typical
performance.
Note 8: Current noise is calculated from the formula: in = (2qIB)1/2
where q = 1.6 × 10–19 coulomb. The noise of source resistors up to
50GΩ dominates the contribution of current noise. See also Typical
Characteristics curve Noise Current vs Frequency.
Note 9: Output voltage swings are measured between the output and
power supply rails.
Note 10: Minimum supply voltage is guaranteed by the power supply
rejection ratio test.
Note 11: Slew rate is measured in a gain of –2 with RF = 1k and RG =
500Ω. VIN is ±1V and VOUT slew rate is measured between –1V and +1V.
On the LTC6244HV/LTC6245HV, VIN is ±2V and VOUT slew rate is measured
between –2V and +2V.
Note 12: Full-power bandwidth is calculated from the slew rate:
FPBW = SR/2πVP.
6244fb
9
LTC6244
TYPICAL PERFORMANCE CHARACTERISTICS
VOS Distribution
60
120
LTC6244MS8
VS = 5V, 0V
VCM = 2.5V
TA = 25°C
100
50
NUMBER OF UNITS
NUMBER OF UNITS
90
LTC6244DD
VS = 5V, 0V
VCM = 2.5V
TA = 25°C
80
70
60
50
40
NUMBER OF UNITS
110
VOS Temperature Coefficient
Distribution
VOS Distribution
40
30
20
30
10
20
10
0
–60
20
40
–40 –20
0
INPUT OFFSET VOLTAGE (μV)
60
–500 –350 –200 –50 100 250
INPUT OFFSET VOLTAGE (μV)
VOS Temperature Coefficient
Distribution
7
6
5
4
3
8
500
7
400
6
300
5
4
3
2
2
TA = 125°C
TA = 25°C
TA = –55°C
1
1
0
–6 –5 –4 –3 –2 –1 0 1 2 3
DISTRIBUTION (μV/°C)
4
5
0
6
0
2
4
8
10
6
TOTAL SUPPLY VOLTAGE (V)
6422 G04
1000
800
700
TA = 125°C
600
100
TA = 85°C
10
TA = 25°C
1
0
–100
–200
TA = 125°C
TA = 25°C
TA = –55°C
–300
–400
–1 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
INPUT COMMON MODE VOLTAGE (V)
6244 G06
1 1.5 2 2.5 3 3.5 4 4.5
COMMON MODE VOLTAGE (V)
5
6244 G07
Input Bias Current vs Temperature
MS8 PACKAGE
VS = 5V, 0V
MS8 PACKAGE
VCM = VS/2
400
300
200
100
0
–100
–300
0.1
0.5
100
10000
500
–200
0
200
Input Bias Current
vs Common Mode Voltage
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA)
MS8 PACKAGE
VS = 5V, 0V
12
VS = 5V, 0V
NORMALIZED TO
25°C VOS VALUE
6244 G05
Input Bias Current
vs Common Mode Voltage
10000
Offset Voltage
vs Input Common Mode Voltage
OFFSET VOLTAGE (μV)
SUPPLY CURRENT (mA)
NUMBER OF UNITS
9
8
2.4
6422 G03
Supply Current vs Supply Voltage
(Per Amplifier)
LTC6244DD
VS = 5V, 0V
VCM = 2.5V
2 LOTS
–55°C TO 125°C
10
1.6
6244 G02
6244 G01
11
400
INPUT BIAS CURRENT (pA)
0
14
13 LTC6244MS8
VS = 5V, 0V
12
VCM = 2.5V
11 2 LOTS
10 –55°C TO 125°C
9
8
7
6
5
4
3
2
1
0
–2.4 –1.6 –0.8
0
0.8
DISTRIBUTION (μV/°C)
TA = 125°C
TA = 25°C
1000
100
10
VS = 10V
VS = 5V
1
TA = 85°C
–400
–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0
COMMON MODE VOLTAGE (V)
6244 G08
0.1
25 35 45 55 65 75 85 95 105 115 125
TEMPERATURE (°C)
6244 G09
6244fb
10
LTC6244
TYPICAL PERFORMANCE CHARACTERISTICS
Output Saturation Voltage
vs Load Current (Output Low)
10
1
0.1
TA = 125°C
TA = 25°C
TA = –55°C
0.1
1
10
LOAD CURRENT (mA)
VS = ±5V
1
0.1
TA = 125°C
TA = 25°C
TA = –55°C
0.01
0.1
100
1
10
LOAD CURRENT (mA)
PHASE
60
60
40
20
GAIN
40
0
30
–20
20
–40
10
–60
0
–80
VS = ±5V
VS = ±1.5V
–10
–20
10k
100k
30
70
60
42
40
36
34
32
40
0
2
10
4
6
8
TOTAL SUPPLY VOLTAGE (V)
28
–50
12
AV = 1
0.01
100M
6244 G16
VS = ±5V
VS = ±2.5V
RISING
50
25
0
75
TEMPERATURE (°C)
–25
6244 G14
Channel Separation vs Frequency
90
80
70
60
50
40
30
20
TA = 25°C
–10 V = ±2.5V
S
–20 AV = 1
–30
–40
–50
–60
–70
–80
–90
10
–100
0
–110
–10
10k
100k
1M
10M
FREQUENCY (Hz)
125
0
TA = 25°C
VS = ±2.5V
100
100
6244 G15
CHANNEL SEPARATION (dB)
AV = 2
FALLING
38
30
COMMON MODE REJECTION RATIO (dB)
OUTPUT IMPEDANCE (Ω)
10
1M
10M
FREQUENCY (Hz)
44
Common Mode Rejection Ratio
vs Frequency
100
100k
AV = –2
48 RF = 1k, RG = 500Ω
46 CONDITIONS: SEE NOTE 11
GAIN BANDWIDTH
50
–120
100M
TA = 25°C
VS = ±2.5V
AV = 10
5 25 45 65 85 105 125
TEMPERATURE (°C)
50
50
40
110
1
VS = ±1.5V
Slew Rate vs Temperature
PHASE MARGIN
Output Impedance vs Frequency
0.001
10k
CL = 5pF
RL = 1k
–100
1M
10M
FREQUENCY (Hz)
0.1
VS = ±5V
50
60
6244 G13
1000
60
30
–55 –35 –15
PHASE MARGIN (DEG)
70
50
–20
GAIN
BANDWIDTH
6244 G12
TA = 25°C
CL = 5pF
RL = 1k
PHASE (DEG)
GAIN (dB)
80
120
CL = 5pF
100
RL = 1k
VCM = VS/2 80
20
0
Gain Bandwidth and Phase
Margin vs Supply Voltage
GAIN BANDWIDTH (MHz)
90
40
VS = ±1.5V
6244 G11
Open Loop Gain vs Frequency
60
70
40
100
6244 G10
100
PHASE
MARGIN
SLEW RATE (V/μs)
0.01
80
VS = 5V, 0V
GAIN BANDWIDTH (MHz)
OUTPUT HIGH SATURATION VOLTAGE (V)
VS = 5V, 0V
Gain Bandwidth and Phase
Margin vs Temperature
PHASE MARGIN (DEG)
OUTPUT LOW SATURATION VOLTAGE (V)
10
Output Saturation Voltage
vs Load Current (Output High)
100M
6244 G17
–120
10k
100
1M
10M
FREQUENCY (Hz)
100M
6244 G18
6244fb
11
LTC6244
TYPICAL PERFORMANCE CHARACTERISTICS
Power Supply Rejection Ratio
vs Frequency
NEGATIVE
SUPPLY
POSITIVE
SUPPLY
60
50
40
30
20
10
0
200
150
100
50
0
–50
–100
–150
TA = 125°C
TA = 25°C
TA = –55°C
–200
–250
–300
–10
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
0
1
2 3 4 5 6 7 8
TOTAL SUPPLY VOLTAGE (V)
6244 G19
–60
–70
RL = 10k
–80
RL = 1k
–90
–100
4
TA = 25°C
VS = 5V, 0V
–60
–70
RL = 10k
–80
RL = 1k
–90
–30
1.5 2 2.5 3 3.5 4
OUTPUT VOLTAGE (V)
–5
CHANGE IN OFFSET VOLTAGE (μV)
–50
TA = –55°C
–150
6244 G25
–60
–70
RL = 100k
–80
RL = 10k
–90
0
4.5 5
0.5
2
1.5
1
OUTPUT VOLTAGE (V)
6244 G24
VS = ±1.5V
–20
VS = ±5V
–25
–30
TA = 25°C
VS = ±2.5V
VCM = 0V
35
–15
VS = ±2.5V
–35
–45
40
TA = 25°C
–10
3
2.5
Noise Voltage vs Frequency
30
25
20
15
10
5
–40
– 200
–50 –40 –30 –20 –10 0 10 20 30 40 50
OUTPUT CURRENT (mA)
5
TA = 25°C
VS = 3V, 0V
–50
Warm-Up Drift vs Time
VS = ±5V
TA = 25°C
3.5
3
2.5
4
4.5
POWER SUPPLY VOLTAGE (±V)
6244 G23
Offset Voltage vs Output Current
TA = 125°C
2
–110
0 0.5 1
6244 G22
100
TA = 125°C
TA = 25°C
TA = –55°C
–40
–100
–110
5
150
SOURCING
–20
6244 G21
NOISE VOLTAGE (nV/√Hz)
2 3
–5 –4 –3 –2 –1 0 1
OUTPUT VOLTAGE (V)
OFFSET VOLTAGE (μV)
0
–10
–50
1.5
10
–100
–110
SINKING
10
Open-Loop Gain
–50
INPUT VOLTAGE (μV)
INPUT VOLTAGE (μV)
–50
–100
20
–40
–40
TA = 25°C
VS = ±5V
0
30
Open-Loop Gain
–40
50
40
6244 G20
Open-Loop Gain
200
9
INPUT VOLTAGE (μV)
70
50
VCM = VS/2
250
OUTPUT SHORT-CIRCUIT CURRENT (mA)
90
80
300
TA = 25°C
VS = ±2.5V
CHANGE IN OFFSET VOLTAGE (μV)
POWER SUPPLY REJECTION RATIO (dB)
100
Output Short-Circuit Current
vs Power Supply Voltage
Minimum Supply Voltage
0
0
5 10 15 20 25 30 35 40 45 50 55 60
TIME AFTER POWER UP (SEC)
6244 G26
10
100
1k
10k
FREQUENCY (Hz)
100k
6244 G27
6244fb
12
LTC6244
TYPICAL PERFORMANCE CHARACTERISTICS
0.1Hz to 10Hz Voltage Noise
Series Output Resistance and
Overshoot vs Capacitive Load
Noise Current vs Frequency
1000
60
TA = 25°C
VS = ±2.5V
VCM = 0V
VOUT = 100mV
VS = ±2.5V
AV = –2
50
30pF
100
40
OVERSHOOT (%)
NOISE CURRENT (fA/√Hz)
VOLTAGE NOISE (500nV/DIV)
VS = 5V, 0V
10
1k
30
RS = 10Ω
–
+
500Ω
RS
CL
20
1
10
RS = 50Ω
0.1
100
TIME (1s/DIV)
0
1k
10k
FREQUENCY (Hz)
6244 G28
60
50
1k
30
–
+
VOUT = 100mV
VS = ±2.5V
AV = 1
900
VS = ±5V
800 AV = 1
TA = 25°C
700
RS = 10Ω
RS
CL
20
RS = 50Ω
10
SETTLING TIME (ns)
40
1k
40
30
RS = 50Ω
20
–
+
10
100
CAPACITIVE LOAD (pF)
10
1000
100
CAPACITIVE LOAD (pF)
VOUT
1k
500
1mV
1mV
300
200
10mV
10mV
100
–3
–2
0
1
–1
2
OUTPUT STEP (V)
3
6244 G34
4
1mV
10mV
–4
–3
–2
0
1
–1
2
OUTPUT STEP (V)
3
4
Distortion vs Frequency
–30
–40
8
7
6
5
4
AV = +2
3
2
–4
1k
1mV
6244 G33
9
OUTPUT VOLTAGE SWING (VP-P)
SETTLING TIME (ns)
1k
600
400
0
1000
10
–
+
VOUT
300
Maximum Undistorted Output
Signal vs Frequency
900
1k
VIN
400
–
+
6244 G32
Settling Time
vs Output Step (Inverting)
VIN
500
100
6244 G31
VS = ±5V
800 AV = –1
TA = 25°C
700
600
10mV
CL
VS = ±5V
TA = 25°C
HD2, HD3 < –40dBc
1
10k
AV = –1
100k
1M
FREQUENCY (Hz)
DISTORTION (dBc)
10
NOTE: EXCEEDS INPUT
COMMON MODE RANGE
200
RS
0
0
0
Settling Time
vs Output Step (Noninverting)
RS = 10Ω
OVERSHOOT (%)
OVERSHOOT (%)
30pF
1000
6244 G30
Series Output Resistance and
Overshoot vs Capacitive Load
VOUT = 100mV
VS = ±2.5V
AV = –1
50
100
CAPACITIVE LOAD (pF)
6244 G29
Series Output Resistance and
Overshoot vs Capacitive Load
60
10
100k
VS = ±2.5V
AV = +1
VOUT = 2VP-P
–50
RL = 1k, 2ND
–60
–70
–80
RL = 1k, 3RD
–90
10M
6244 G35
–100
10k
100k
1M
FREQUENCY (Hz)
10M
6244 G36
6244fb
13
LTC6244
TYPICAL PERFORMANCE CHARACTERISTICS
–30
–30
–40
–50
–60
RL = 1k, 2ND
–70
RL = 1k, 3RD
–80
VS = ±5V
AV = +1
VOUT = 2VP-P
–40
–50
–60
RL = 1k, 2ND
–70
–80
–90
–90
–100
10k
100k
1M
FREQUENCY (Hz)
10M
DISTORTION (dBc)
VS = ±2.5V
AV = +2
VOUT = 2VP-P
DISTORTION (dBc)
DISTORTION (dBc)
–40
Distortion vs Frequency
Distortion vs Frequency
Distortion vs Frequency
–30
100k
1M
FREQUENCY (Hz)
–50
–60
–80
10M
Small-Signal Response
–100
10k
200ns/DIV
10M
Large-Signal Response
Small-Signal Response
6244 G40
100k
1M
FREQUENCY (Hz)
6244 G39
0V
0V
VS = ±2.5V
AV = 1
RL = ∞
RL = 1k, 3RD
6244 G38
6244 G37
0V
RL = 1k, 2ND
–70
–90
RL = 1k, 3RD
–100
10k
VS = ±5V
AV = +2
VOUT = 2VP-P
VS = ±2.5V
AV = 1
RL = ∞
CL = 75pF
6244 G41
200ns/DIV
VS = ±5V
AV = 1
RL = ∞
2μs/DIV
6244 G42
Output Overdrive Recovery
Large-Signal Response
VIN
0V
1V/DIV
0V
VOUT
0V
2V/DIV
VS = ±2.5V
AV = –1
RL = 1k
200ns/DIV
6244 G43
VS = ±2.5V
AV = 3
RL = 3k
200ns/DIV
6244 G44
6244fb
14
LTC6244
APPLICATIONS INFORMATION
Amplifier Characteristics
ESD
Figure 1 is a simplified schematic of the LTC6244, which
has a pair of low noise input transistors M1 and M2. A
simple folded cascode Q1, Q2 and R1, R2 allow the input
stage to swing to the negative rail, while performing level
shift to the Differential Drive Generator. Low offset voltage
is accomplished by laser trimming the input stage.
The LTC6244 has reverse-biased ESD protection diodes on
all input and outputs as shown in Figure 1. These diodes
protect the amplifier for ESD strikes to 4kV. If these pins
are forced beyond either supply, unlimited current will
flow through these diodes. If the current transient is less
than 1 second and limited to one hundred milliamps or
less, no damage to the device will occur.
Capacitor C1 reduces the unity cross frequency and improves the frequency stability without degrading the gain
bandwidth of the amplifier. Capacitor CM sets the overall
amplifier gain bandwidth. The differential drive generator
supplies signals to transistors M3 and M4 that swing the
output from rail-to-rail.
The photo of Figure 2 shows the output response to an
input overdrive with the amplifier connected as a voltage
follower. If the negative going input signal is less than
a diode drop below V–, no phase inversion occurs. For
input signals greater than a diode drop below V–, limit the
current to 3mA with a series resistor RS to avoid phase
inversion.
The input common mode voltage range extends from
V– to V+ – 1.5V. In unity gain voltage follower applications,
exceeding this range by applying a signal that reaches 1V
from the positive supply rail can create a low level instability
at the output. Loading the amplifier with several hundred
micro-amps will reduce or eliminate the instability.
The amplifier input bias current is the leakage current of
these ESD diodes. This leakage is a function of the temperature and common mode voltage of the amplifier, as
shown in the Typical Performance Chacteristics.
Noise
The LTC6244 exhibits low 1/f noise in the 0.1Hz to 10Hz
region. This 1.5μVP-P noise allows these op amps to be
used in a wide variety of high impedance low frequency
applications, where Zero-Drift amplifiers might be inappropriate due to their input sampling characteristic.
In the frequency region above 1kHz the LTC6244 also
shows good noise voltage performance. In this frequency
region, noise can easily be dominated by the total source
V+
2.5V
V+
V–
ITAIL
V+
CM
DESD1
M3
DESD2
VIN+
M1
DESD5
M2
DIFFERENTIAL
DRIVE
GENERATOR
VIN–
DESD3
DESD4
V–
V–
–2.5V
V+
VO
DESD6
C1
+2.5V
V–
V+
BIAS
VOUT AND VIN OF FOLLOWER WITH LARGE INPUT OVERDRIVE
V–
Q1
R1
Q2
RS
0Ω
VIN
R2
V–
6244 F01
Figure 1. Simplified Schematic
–
M4
1/2
LTC6244
VOUT
+
–2.5V
6244 F02
Figure 2. Unity Gain Follower Test Circuit
6244fb
15
LTC6244
APPLICATIONS INFORMATION
resistance of the particular application. Specifically, these
amplifiers exhibit the noise of a 4k resistor, meaning it is
desirable to keep the source and feedback resistance at or
below this value, i.e., RS + RG||RFB ≤ 4k. Above this total
source impedance, the noise voltage is not dominated by
the amplifier.
In low gain configurations and with RF and RS in even
the kilohm range (Figure 3), this pole can create excess
phase shift and possibly oscillation. A small capacitor CF
in parallel with RF eliminates this problem.
Noise current can be estimated from the expression in =
√2qIB, where q = 1.6 • 10–19 coulombs. Equating √4kTRΔf
and RS√2qIBΔf shows that for source resistors below
50GΩ the amplifier noise is dominated by the source
resistance. See the Typical Characteristics curve Noise
Current vs Frequency.
The DD package is leadless and makes contact to the PCB
beneath the package. Solder flux used during the attachment of the part to the PCB can create leakage current
paths and can degrade the input bias current performance
of the part. All inputs are susceptible because the backside
paddle is connected to V– internally. As the input voltage
changes or if V– changes, a leakage path can be formed
and alter the observed input bias current. For lowest bias
current, use the LTC6244 in the MS8 package.
Achieving Low Input Bias Current
Proprietary design techniques are used to obtain simultaneous low 1/f noise and low input capacitance. Low input
capacitance is important when the amplifier is used with
high source and feedback resistors. High frequency noise
from the amplifier tail current source, ITAIL in Figure 1,
couples through the input capacitance and appears across
these large source and feedback resistors.
Photodiode Amplifiers
Photodiodes can be broken into two categories: large area
photodiodes with their attendant high capacitance (30pF
to 3000pF) and smaller area photodiodes with relatively
low capacitance (10pF or less). For optimal signal-to-noise
performance, a transimpedance amplifier consisting of an
inverting op amp and a feedback resistor is most commonly
used to convert the photodiode current into voltage. In low
noise amplifier design, large area photodiode amplifiers
require more attention to reducing op amp input voltage
noise, while small area photodiode amplifiers require
more attention to reducing op amp input current noise
and parasitic capacitances.
Stability
The good noise performance of these op amps can be
attributed to large input devices in the differential pair.
Above several hundred kilohertz, the input capacitance
can cause amplifier stability problems if left unchecked.
When the feedback around the op amp is resistive (RF), a
pole will be created with RF, the source resistance, source
capacitance (RS, CS), and the amplifier input capacitance.
CF
RF
–
RS
CIN
CS
OUTPUT
6244 F03
+
Figure 3. Compensating Input Capacitance
6244fb
16
LTC6244
APPLICATIONS INFORMATION
Large Area Photodiode Amplifiers
A simple large area photodiode amplifier is shown in
Figure 4a. The capacitance of the photodiode is 3650pF
(nominally 3000pF), and this has a significant effect on
the noise performance of the circuit. For example, the
photodiode capacitance at 10kHz equates to an impedance
of 4.36kΩ, so the op amp circuit with 1MΩ feedback has a
noise gain of NG = 1 + 1M/4.36k = 230 at that frequency.
Therefore, the LTC6244 input voltage noise gets to the
output as NG • 7.8nV/√Hz = 1800nV/√Hz, and this can
clearly be seen in the circuit’s output noise spectrum in
Figure 4b. Note that we have not yet accounted for the
op amp current noise, or for the 130nV/√Hz of the gain
resistor, but these are obviously trivial compared to the op
CF
3.9pF
RF
1M
5V
IPD
–
HAMAMATSU
LARGE AREA
PHOTODIODE
S1227-1010BQ
CPD = 3000pF
1/2
LTC6244HV
VOUT = 1M • IPD
BW = 52kHz
NOISE = 1800nV/√Hz AT 10kHz
VOUT
+
–5V
6244 F04a
OUTPUT NOISE (800nV/√Hz/DIV)
Figure 4a. Large Area Photodiode Transimpedance Amplifier
1k
10k
FREQUENCY (Hz)
100k
amp voltage noise and the noise gain. For reference, the
DC output offset of this circuit is about 100μV, bandwidth
is 52kHz, and the total noise was measured at 1.7mVRMS
on a 100kHz measurement bandwidth.
An improvement to this circuit is shown in Figure 5a,
where the large diode capacitance is bootstrapped by a
1nV/√Hz JFET. This depletion JFET has a VGS of about
–0.5V, so that RBIAS forces it to operate at just over 1mA of
drain current. Connected as shown, the photodiode has a
reverse bias of one VGS, so its capacitance will be slightly
lower than in the previous case (measured 2640pF), but
the most drastic effects are due to the bootstrapping.
Figure 5b shows the output noise of the new circuit.
Noise at 10kHz is now 220nV/√Hz, and the 130nV/√Hz
noise thermal noise floor of the 1M feedback resistor
is discernible at low frequencies. What has happened is
that the 7.8nV/√Hz of the op amp has been effectively
replaced by the 1nV/√Hz of the JFET. This is because the
1M feedback resistor is no longer “looking back” into the
large photodiode capacitance. It is instead looking back
into a JFET gate capacitance, an op amp input capacitance,
and some parasitics, approximately 10pF total. The large
photodiode capacitance is across the gate-source voltage of the low noise JFET. Doing a sample calculation at
10kHz as before, the photodiode capacitance looks like
6kΩ, so the 1nV/√Hz of the JFET creates a current noise
of 1nV/6k = 167fA/√Hz. This current noise necessarily
flows through the 1M feedback resistor, and so appears
as 167nV/√Hz at the output. Adding the 130nV/√Hz of the
resistor (RMS wise) gives a total calculated noise density
of 210nV/√Hz, agreeing well with the measured noise of
Figure 5b. Another drastic improvement is in bandwidth,
now over 350kHz, as the bootstrap enabled a reduction
of the compensating feedback capacitance. Note that the
bootstrap does not affect the DC accuracy of the amplifier,
except by adding a few picoamps of gate current.
6244 F04b
Figure 4b. Output Noise Spectral Density of the Circuit of Figure
4a. At 10kHz, the 1800nV/√Hz Output Noise is Due Almost
Entirely to the 7.8nV Voltage Noise of the LTC6244 and the High
Noise Gain of the 1M Feedback Resistor Looking Into the High
Photodiode Capacitance
There is one drawback to this circuit. Most photodiode
circuits require the ability to set the amount of applied
reverse bias, whether it’s 0V, 5V, or 200V. This circuit has
a fixed reverse bias of about 0.5V, dictated by the JFET.
6244fb
17
LTC6244
APPLICATIONS INFORMATION
CF
0.25pF
CF
0.25pF
5V
RF
1M
5V
IPD
–
HAMAMATSU
LARGE AREA
PHOTODIODE
S1227-1010BQ
CPD = 3000pF
1/2
LTC6244HV
VOUT = 1M • IPD
BW = 350kHz
OUTPUT NOISE = 220nV/√Hz
AT10kHz
VOUT
PHILIPS
BF862
JFET
RF
1M
5V
4.99k
–
–5V
4.7μF
X7R
+
1/2
LTC6244HV
IPD
+
4.99k
–5V
–5V
VBB
6244 F04a
OUTPUT NOISE (200nV/√Hz/DIV)
Figure 5a. Large Area Diode Bootstrapping
VOUT = 1M • IPD
BW = 250kHz
OUTPUT NOISE = 291nV/√Hz
AT 10kHz
VOUT
6244 F06a
HAMAMATSU LARGE AREA
PHOTODIODE
S1227-1010BQ
CPD = 3000pF
Figure 6a. The Addition of a Capacitor and Resistor Enable the
Benefit of Bootstrapping While Applying Arbitrary Photodiode
Bias Voltage VBB
1k
10k
FREQUENCY (Hz)
100k
6244 F05b
Figure 5b: Output Noise Spectral Density of Figure 5a. The
Simple JFET Bootstrap Improves Noise (and Bandwidth)
Drastically. Noise Density at 10kHz is Now 220nV/√Hz, About
a 8.2x Reduction. This is Mostly Due to the Bootstrap Effect
of Swapping the 1nV/√Hz of the JFET for the 7.8nV/√Hz of the
Op Amp
The solution is as shown in the circuit of Figure 6a, which
uses a capacitor-resistor pair to enable the AC benefits of
bootstrapping while allowing a different reverse DC voltage
on the photodiode. The JFET is still running at the same
current, but an arbitrary reverse bias may be applied to
the photodiode. The output noise spectrum of the circuit
with 0V of photodiode reverse bias is shown in Figure 6b.
Photodiode capacitance is again 3650pF, as in the original
circuit of Figure 4a. This noise plot with 0V bias shows
that bootstrapping alone was responsible for a factor of
6.2 noise reduction, from 1800nV/√Hz to 291nV/√Hz at
10kHz, independent of photodiode capacitance. However,
photodiode capacitance can now can be reduced arbitrarily
OUTPUT NOISE (275nV/√Hz/DIV)
–5V
RBIAS
4.99k
5V
PHILIPS
BF862
JFET
1k
10k
FREQUENCY (Hz)
100k
6244 F06b
Figure 6b: Output Spectrum of Circuit of Figure 6a, with
Photodiode Bias at 0V. Photodiode Capacitance is Back Up,
as in the Original Circuit of Figure 4a. However, it can be
Reduced Arbitrarily by Providing Reverse Bias. This Plot
Shows that Bootstrapping Alone Reduced the 10kHz Noise
Density by a Factor of 6.2, from 1800nV/√Hz to 291nV/√Hz
by providing reverse bias, and the photodiode can also be
reversed to support either cathode or anode connections
for positive or negative going outputs.
The circuit on the last page of this data sheet shows further reduction in noise by paralleling four JFETs to attain
152nV/√Hz at 10kHz, a noise of 12 times less than the
basic photodiode circuit of Figure 4a.
6244fb
18
LTC6244
APPLICATIONS INFORMATION
Small Area Photodiode Amplifiers
Small area photodiodes have very low capacitance, typically
under 10pF and some even below 1pF. Their low capacitance makes them more approximate current sources to
higher frequencies than large area photodiodes. One of
the challenges of small area photodiode amplifier design
is to maintain low input capacitance so that voltage noise
does not become an issue and current noise dominates. A
simple small area photodiode amplifier using the LTC6244
is shown in Figure 7. The input capacitance of the amplifier consists of CDM and one CCM (because the +input is
The circuit of Figure 8a makes some slight improvements.
Operation is still transimpedance mode, with RF setting
the gain to 1MΩ. However, a noninverting input stage A1
with a gain of 3 has been inserted, followed by the usual
inverting stage performed by A2. Note what this achieves.
The amplifier input capacitance is bootstrapped by the
feedback of R2:R1, eliminating the effect of A1’s input
CDM (3.5pF), and leaving only one CCM (2.1pF). The op
amp at Pins 5, 6 and 7 was chosen for the input amplifier
to eliminate extra pin-to-pin capacitance on the (+) input.
The lead capacitance on the corner of an MSOP package
is only about 0.15pF. By using this noninverting configuration, input capacitance is minimized.
CF
0.1pF
RF
1M
IPD
SMALL AREA
PHOTODIODE
VISHAY
TEMD1000
CPD = 1.8pF
VOUT = 1M • IPD
BW = 350kHz
NOISE = 120μVRMS
MEASURED ON A
350kHz BW
VOUT
5V
–
1/2
LTC6244HV
–5V
+
–5V
grounded), or about 6pF total. The small photodiode has
1.8pF, so the input capacitance of the amplifier is dominating
the capacitance. The small feedback capacitor is an actual
component (AVX Accu-F series), but it is also in parallel
with the op amp lead, resistor and parasitic capacitances,
so the total real feedback capacitance is probably about
0.4pF. The reason this is important is that this sets the
compensation of the circuit and, with op amp gain bandwidth, the circuit bandwidth. The circuit as shown has a
bandwidth of 350kHz, with an output noise of 120μVRMS
measured over that bandwidth.
6244 F07
Figure 7. LTC6244 in a Normal TIA Configuration
0.07pF
(PARASITIC)
RF
1M
IPD
SMALL AREA
PHOTODIODE
VISHAY
TEMD1000
CPD = 1.8pF
5
6
–5V
R4
6.98k
5V
+
8
A1 1/2
LTC6244HV
–
R1
499Ω
7
R2
1k
C1
56pF
R3
1k
2
3
C2
150pF
–
A2 1/2
LTC6244HV
+
VOUT = 1M • IPD
BW = 1.6MHz
NOISE = 1.2mVRMS
MEASURED ON A
2MHz BW
1
6244 F08a
VOUT
4
–5V
Figure 8a: Using Both Op Amps for Higher Bandwidth. A1 Provides a Gain of 3 Within the Loop, Increasing the Gain Bandwidth
Product. This Bootstraps the CDM Accross A1’s Inputs, Reducing Amplifier Input Capacitance. Inversion is Provided by A2, so that
the Photodiode Looks Into a Noninverting Input. Pin 5 was Selected Because it is in the Corner, Removing One Lead Capacitance
6244fb
19
LTC6244
APPLICATIONS INFORMATION
Total capacitance at the amplifier’s input is now one CCM
(2.1pF) plus the photodiode capacitance CPD (1.8pF), or
about 4pF accounting for parasitics. The shunt impedance
at 1MHz, for example, is XC = 1/(2πfC) = 39.8kΩ, and
therefore, the noise gain at 1MHz is NG = 1+Rf/XC = 26.
The input voltage noise of this amplifier is about 15nV/√Hz,
after accounting for the effects of R1 through R3, the
noise of the second stage and the fact that voltage noise
does rise with frequency. Multiplying the noise gain by
the input voltage noise gives an output noise density due
to voltage noise of 26 • 15nV/√Hz = 390nV/√Hz. But the
noise spectral density plot of Figure 8b shows an output
noise of 782nV/√Hz at 1MHz. The extra output noise is
due to input current noise, multiplied by the feedback
impedance. So while the circuit of Figure 8a does increase
bandwidth, it does not offer a noise advantage. Note,
however, that the 1.2mVRMS of noise is now measured in
a 2MHz bandwidth, instead of over a 350kHz bandwidth
of the previous example.
A Low Noise Fully Differential Buffer/Amplifier
The circuit of Figure 9a uses an LTC6244 to make a low
noise fully differential amplifier. The amplifier’s gain, input
impedance and –3dB bandwidth can be specified independently. Knowing the desired gain, input impedance and
–3dB bandwidth, RG, CF and CIN can be calculated from
the equations shown in Figure 9b. The common mode
gain of this amplifier is equal to one (VOUTCM = VINCM)
and is independent of resistor matching. The component
values in the Figure 9a circuit implement a 970kHz, gain
= 5, differential amplifier with 4k input impedance. The
output differential DC offset is typically less than 500μV.
The differential input referred noise voltage density is
shown in Figure 10. The total input referred noise in a
1MHz bandwidth is 16μVRMS.
OUTPUT NOISE (150nV/√Hz/DIV)
In differential signal conditioning circuits, there is often a
need to monitor a differential source without loading or
adding appreciable noise to the circuit. In addition, adding gain to low level signals over appreciable bandwidth
is extremely useful. A typical application for a low noise,
high impedance, differential amplifier is in the baseband
circuit of an RFID (radio frequency identification) receiver.
The baseband signal of a UHF RFID receiver is typically a
low level differential signal at the output of a demodulator
with differential output impedance in the range of 100Ω to
400Ω. The bandwidth of this signal is 1MHz or less.
50k
1M
FREQUENCY (Hz)
5M
6244 F08b
Figure 8b: Output Noise Spectrum of the Circuit in Figure 8a.
Noise at 1MHz is 782nV/√Hz, Due Mostly to the Input Current
Noise Rising with Frequency
6244fb
20
LTC6244
+
1/2
LTC6244
–
VIN+
RIN
2k
RG
10k
2k
+
VOUT
CF
33pF
2k
CIN
82pF
VIN–
CIN
82pF
RG
10k
RIN
2k
CF
33pF
1/2
LTC6244
6244 F09a
VOUT–
+
V–
Figure 9a. Low Noise Fully Differential Buffer/Amplifier
(f–3dB = 970kHz, Gain = 5, RIN = 4k)
Input Impedance = 2 • RIN
VOUT + – VOUT –
R
= G
RIN
VIN + – VIN –
5MHz
Maximum Gain =
f3dB
1
4398 • f3dB • (Gain + 2)
Gain + 2
8.977 • Gain • RIN • f3dB
f3dB =
f–3dB = 970kHz
GAIN = 5
RIN = 4k
24
20
16
12
8
4
10k
100k
FREQUENCY (Hz)
1M
6244 F10
A Low Noise AC Difference Amplifier
–
CIN =
28
Figure 10. Differential Input Referred Noise
V+
CF =
32
2k
2k
Gain =
INPUT REFERRED NOISE (nV/√Hz)
APPLICATIONS INFORMATION
1
4000 • π 2 • RG • CF • CIN
In the signal conditioning of wideband sensors and transducers, a low noise amplifier is often used to provide gain
for low level AC difference signals in the frequency range
of a few Hertz to hundreds of kilo-Hertz. In addition, the
amplifier must reject common mode AC signals and its input
impedance should be higher than the differential source
impedance. Typical applications are piezoelectric sensors
used in sonar, sound and ultrasound systems and LVDT
(linear variable differential transformers) for displacement
measurements in process control and robotics.
The Figure 11a circuit is a low noise, single supply AC
difference amplifier. The amplifier’s low frequency –3dB
bandwidth is set with resistor R5 and capacitor C3, while
the upper –3dB bandwidth is set with R2 and C1. The
input common mode DC voltage can vary from ground to
V+ and the output DC voltage is equal to the VREF voltage.
The amplifier’s gain is the ratio of resistors R2 to R1 (R4
= R2 and R3 = R1). The component values in the circuit
of Figure 11a implement an 800Hz to 160kHz AC amplifier with a gain equal to 10 and 12nV/√Hz input referred
voltage noise density shown in Figure 11b. The total input
referred wideband noise is 4.5μVRMS, in the bandwidth of
500Hz to 200kHz.
Figure 9b. Design Equations for Figure 9a Circuit
6244fb
21
LTC6244
APPLICATIONS INFORMATION
C1
47pF
R2
20k
R1
2k
V1
–
VOUT
1/2 LTC6244
+
C3
1000pF
V+
R5
200k
–
R3
2k
R4
20k
V2
1/2 LTC6244
C2
47pF
+
VREF
6244 F11a
VOUT = GAIN • ( V2 – V1) + VREF
R2
R3 = R1, R4 = R2, C1= C2
R1
BANDWIDTH = fHI – fLO
GAIN =
fHI =
1
1
,f =
2 • π • R2 • C1 LO 2 • π • R5 • C3
INPUT REFERRED NOISE (nV/√Hz)
Figure 11a. Low Noise AC Difference Amplifier
(Bandwidth 800Hz to 160kHz, Gain = 10)
28
BW = 800Hz TO 160kHz
GAIN = 10
24
20
16
12
8
4
0
1
10
FREQUENCY (kHz)
1000
6244 F11b
Figure 11b. Input Referred Noise
6244fb
22
LTC6244
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
R = 0.125
TYP
5
0.70 ±0.05
3.5 ±0.05
1.65 ±0.05
2.10 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PACKAGE
OUTLINE
0.40 ± 0.10
8
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 0509 REV C
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.200 REF
0.75 ±0.05
4
0.25 ± 0.05
1
0.50 BSC
2.38 ±0.10
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
6244fb
23
LTC6244
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS8) 0307 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6244fb
24
LTC6244
REVISION HISTORY
REV
DATE
DESCRIPTION
B
12/09
Change to Figure 2
(Revision history begins at Rev B)
PAGE NUMBER
15
6244fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LTC6244
TYPICAL APPLICATION
Ultralow Noise Large Area Photodiode Amplifier
5V
5V
–5V
Photodiode Amplifier Output
Noise Spectal Density
J4
R4
J2
5V
R3
RF
1M
J1
VOUT = 1M • IPD
BW = 400kHz
NOISE = 150μVRMS
MEASURED ON 100kHz
BANDWIDTH
VOUT
R2
5V
R1
–
C1
C2
C3
C4
IPD
1/2
LTC6244HV
+
R5
4.99k
HAMAMATSU
LARGE AREA
PHOTODIODE
S1227-1010BQ
CPD = 3000pF
–5V
6244 TA02a
–5V
OUTPUT NOISE (200nV/√Hz/DIV)
CF
0.25pF
J3
5V
1
C1 TO C4: 4.7μF X7R
J1 TO J4: PHILIPS BF862 JFETS
R1 TO R4: 4.99k
10
(kHz)
100
6244 TA02b
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1151
±15V Zero-Drift Op Amp
Dual High Voltage Operation ±18V
LT1792
Low Noise Precision JFET Op Amp
6nV/√Hz Noise, ±15V Operation
LTC2050
Zero-Drift Op Amp
2.7 Volt Operation, SOT-23
LTC2051/LTC2052
Dual/Quad Zero-Drift Op Amp
Dual/Quad Version of LTC2050 in MS8/GN16 Packages
LTC2054/LTC2055
Single/Dual Zero-Drift Op Amp
Micropower Version of the LTC2050/LTC2051 in SOT-23 and DD Packages
LTC6087/LTC6088
Dual/Quad 14MHz CMOS Op Amps
Rail-to-Rail, Low Cost
LTC6240/LTC6241/
LTC6242
Single/Dual/Quad, 18MHz CMOS Op Amps
Low Noise, Rail-to-Rail
6244fb
26
Linear Technology Corporation
LT 1209 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006