UART Ne e ds :
4 for RS-232
Wa rning:
2 for RS-485
1 for Blue Toot h
Xbe e , GPS a nd DC a ll
s ha re t he s a me UART
1 for GPS, Xbe e or DC
Only one ca n be us e d
Ma jor Cha nge s from
TS-8900 t o TS-8950
De fa ult =
Support s iMX6 wit h high pe rforma nce GPU
Adde d Sle e p Mode wit h Touch wa ke up
3 for RS-232
1 for RS-485
Jumpe rs e na ble 2nd RS-485 or 422
Adde d USB cons ole
But t his los e s COM1 RTS a nd CTS
Prima ry Et he rne t port is Giga bit
1 for Blue Toot h
Cha nge d POE from 12 wa t t s t o 24 wa t t s
1 for Xbe e / GPS/ DC
Adde d 3rd RS-232 port
Adde d t hird USB Hos t port (5x1 he a de r)
Adde d A/ D t o monit or a ll powe r ra ils (a nd Supe rCa p)
Adde d 12 s e cond Powe r Hold circuit
Adde d Fre e s ca le a cce le rome t e r opt ion
Adde d GPS opt ion
Opt iona l
Support s mSATA opt ion
Support s MiniPCIe ce ll mode ms (opt iona l)
4
RN5-D
5
10K
6
D
Q7-A
G
2
S
1
Te chnologic Sys t e ms
TS-8950
Tit le :
Re v:
A
Da t e
April 27, 2015
Docume nt a t ion
De s igne r
She e t
1
of 18
5V Powe r Supply (4.0 Amps )
VIN
D6
5V_A
VIN
POE_24V
Powe r Input
U8
U5
FB34
D5
2
120 ohm
FB32
VIN
BOOST
8V-28V
5V
GND
120 ohm
C54
3
.1 uF
FB30
28V
C45
10 uF
C46
10 uF
50V
50V
C99
7
220uF
SS
A3
C146
.1 uF
6.3V
D
S
DRAIN
SOURCE
SOURCE
5
SW_5V
6
G
VDD
CAP
Boos t
Buffe r
3.3 nF
.1 uF
2
EN_SW_5V
8
FB31
5
I_ADJ
5.0V FB
ON
GND
6
FET_SW_CUR_LIMIT_TDFN8
120 ohm
8
5V_A
C154
CH1
2
DRAIN
C48
12 mohm
C155
120 ohm
1
D9
7
4
K
1
A1
2
1
4.7 uH
10 nF
SW
.1 uF
3
3
4.5V-42V
C55
TVS7
CN18
N-Cha nne l
L6
C220
C55 mus t be ve ry ne a r U5
SW_5V
5V_A
350 ohm
1
.1 uF
PAD
GND
4
REG_LM22679-5V_5A_SMT
TVS9
5V
3
4
Whe n CH1 popula t e d, FB31 a nd 32 not
Android
Pus h Swit che s
SW1
1
PUSH_SW_1#
Home
4
2
3
4
RN7-D
10K
SW_PUSH_RT_TH
5
Ba t t e ry
SBC_3.3V
SW2
for RTC
1
PUSH_SW_2#
Ba ck
1
2
3
4
RN7-A
10K
SW_PUSH_RT_TH
V_BAT
8
SBC_3.3V
K1
R76
1.2K
Te chnologic Sys t e ms
Tit le :
Re v:
TS-8950
A
Da t e
April 27, 2015
5V Powe r, Android Pus h Sw
De s igne r
She e t
2
of 18
USB Port s
2x Hos t RA USB Port s
USB Powe r Swit ch
J8
Dua l A
USB 2.0
FB20
USB_HOST_5V
220 ohm
U7
5
N-Cha nne l
3
5V_A
4
1
7
SBC_3.3V
C111
2
.1 uF
DRAIN
D
6
USB_DN3_M
SOURCE
S
DRAIN
SOURCE
7
USB_DN3_P
5
8
USB_HOST_5V
Boos t
Buffe r
8
8
RN10-A
10K
3
4
6
2
2
2
USB_DN2_P
1
7
EN_USB_5V
1
CAP
RN10-B
10K
DAT+
Top
GND
FRAME
TVS3
USB_DN2_M
C49
3.3 nF
DAT-
6
G
VDD
VBUS
VBUS
FRAME
DATDAT+
GND
FRAME
FRAME
9
10
11
12
CONN_USB_2_DUAL_RA
5
FB9
220 ohm
ON
3
GND
FET_SW_CUR_LIMIT_TDFN8
4
1
TVS_USB2_NUP4114_SC88
ON by de fa ult
Int e rna l USB He a de r
USB 2.0 MUX
FB18
Allows SiLa b or iMX6 t o us e USB De v Port
HD1
USB_HOST_5V
220 ohm
U32
3
A
USB_DEVICE_P
2
7
D+
B
3
14
3
SILAB_3.3V
RN9-C
6
10K
5
9
11
DB
10
C
USB_SILAB_P
12
D
13
USB_OTG_P
9
USB_DN2_M
USB_SILAB_M
5V
5V
USB-
USB-
USB+
USB+
GND
GND
FRAME
FRAME
2
4
USB_DN4_M
6
USB_DN4_P
8
10
USB_DN2_P
CONN_USB_5X2_HEADER
TVS2
USB_OTG_M
USB
ID
VBUS
SEL_CD
PW_SEL
1
FB21
SEL_AB
VCC
4
5
7
A 6
USB_DEVICE_M
1
GND
GND
15
16
1
8
6
4.7V_A
2
5
220 ohm
USB_HOST_5V
C120
.1 uF
3
Cons ole
USB_SW_TS3USB3200_QFN16
4
TVS_USB2_NUP4114_SC88
Jumpe r ON =
Ena ble SiLa b Cons ole
Te chnologic Sys t e ms
Tit le :
Re v: A
TS-8950
Da t e
April 27, 2015
USB port s
De s igne r
She e t
3 of 18
RS-232 Tra ns ce ive r
C112
SW_5V
.1 uF
C114
U15
C115
3.3V < -- 5V
.1 uF
Le ve l s hift e r
12
14
C1-
.1 uF
15
C2+
16
C2-
COM1_TXD_3V
COM1_RTS_3V
7
6
C113
.1 uF
Vcc
C1+
C116
C141
11
V+
13
V-
17
2
T1
COM1_TXD
3
T2
.1 uF
COM1_RTS
.1 uF
COM2_TXD_3V
SBC_3.3V
U19
COM3_TXD_3V
1
COM1_RXD_3V
19
DIR
VCC
2
2.49K
3
4
COM2_RXD_3V
5
COM3_RXD_3V
CAN_2_RXD_3V
6
RXD1_485_3V
7
8
CAN_1_RXD_3V
9
EN 485
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
GND
21
1
T3
COM2_TXD
28
T4
COM3_TXD
20
8
OE
R121
COM1_CTS_3V
20
5
18
9
R1
COM1_RXD
4
R2
COM1 RS-485 Drive r
COM1_CTS
17
26
R3
16
22
15
14
CAN_2_RXD_5V
13
27
23
R4
19
COM2_RXD
COM3_RXD
C124
18
R5
12
CAN_1_RXD_5V
11
OFF_BD_RESET#
RXD2_485_5V
24
EN_RX
4
SW_5V
RXD1_485_5V
SD#
25
RN2-D
SW_5V
5
SW_5V
RN2-B
10K
U45
GND
10
4
TXD1_485
SP213_SOIC2810
1
RXD1_485_5V
74LVC245_TSSOP20
.1 uF
2
10K
3
TXEN1_485
TXD
VCC
RXD
X+
TXEN
X-
EN 422
2
RXEN#
GND
8
7
6
COM1_485_DAT+
7
5
COM1_485_DAT8
6
RXD_422_3V
10K
RN2-A
SP485EEN_SOIC8
10K
RN2-C
1
3
Jumpe r e na ble s RS-485 or 422
Als o dis a ble s COM1 Ha nds ha ke s
Opt iona l
2nd CAN Tra nce ive r
CAN Tra nce ive r
SW_5V
R66
C144
.1 uF
U12
CAN Te rm
270
CAN_EN#
8
EN#
VCC
TXD
CANH
RXD
CANL
VREF
GND
R69
3
270
SW_5V
CAN_2_TXD
C117
.1 uF
U11
CAN_EN#
CAN_1_TXD
CAN_1_RXD_5V
8
1
4
5
EN#
R67
VCC
TXD
CANH
RXD
CANL
VREF
GND
TJA1050_SOIC
CAN_2_RXD_5V
270
3
1
4
5
7
CAN2_H
6
CAN2_L
2
1
7
CAN_1_H
2
TJA1050_SOIC
TVS6
24V
6
CAN_1_L
Not popula t e d
2
1
2
RN3-A
10K
8
1
2
3
TVS5
RN3-B
10K
NUP2105L_SOT23
24V
7
3
NUP2105L_SOT23
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v:
A
Da t e
April 27, 2015
COM Port s , CAN
De s igne r
She e t
4 of 18
COM Port s
COM1
COM2
COM3
He a de r
He a de r
He a de r
CN5
CN6
COM1_485_DAT+
COM1_485_DATCAN_1_H
CAN_1_L
1
6
4
9
TX+ _(DCD)
COM2_485_DAT+
TX-_(DSR)
COM2_485_DATRX+ _CANH_(DTR)
COM_422_RX+
RX-_CANL_(RI)
COM_422_RX-
COM1_TXD
COM1_RTS
COM1_RXD
COM1_CTS
3
7
2
8
TXD
NC
10
COM2_TXD
RTS
1
6
4
9
3
7
RXD
GND
5
COM2_RXD
CTS
2
8
CN7
1
TX+ _(DCD)
6
TX-_(DSR)
RX-_CANL_(RI)
TXD
4
CAN2_H
RX+ _CANH_(DTR)
9
CAN2_L
NC
3
COM3_TXD
10
7
RTS
RXD
GND
5
2
COM3_RXD
8
CTS
TX+ _(DCD)
TX-_(DSR)
RX+ _CANH_(DTR)
RX-_CANL_(RI)
TXD
NC
10
RTS
RXD
GND
5
CTS
HD_COM_2X5_2.54MM
HD_COM_2X5_2.54MM
COM1
HD_COM_2X5_2.54MM
COM2
COM2 RS-485 Drive r
COM3
COM2 RS-422 Re ce ive r
C156
SW_5V
SW_5V
1
RN11-A
SW_5V
3
8
10K
RN11-D
10K
U46
4
COM1_RTS
1
RXD2_485_5V
3
TXEN2_485
2
7
TXD
RXD
TXEN
RXEN#
VCC
X+
XGND
8
1
3
COM2_485_DAT+
7
COM2_485_DAT6
TXD
VCC
RN3-C
10K
8
6
RXD_422_5V
6
5
4
5
2
RXD
TXEN
RXEN#
X+
XGND
6
COM_422_RX+
7
5
COM_422_RX5
10K
RN3-D
SP485EEN_SOIC8
RN11-C
10K
SP485EEN_SOIC8
RN11-B
10K
U47
.1 uF
4
4
3
2
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v:
A
Da t e
April 27, 2015
COM Port s , Expa ns ion He a de r
De s igne r
She e t
5
of 18
Te lit SL869
GPS Ra dio
RF Conn.
RA SMA
U36
1
2
GND
CAN_TX
RF_IN
CAN_RX
GND
14
15
4
GPS_PPS
TX2
NC
RX2
NC
EXT_INT
NC
SCL
XBEE_RXD
3
20
4
XBEE_TXD
RN9-D
5
21
SDA
1_PPS
TX OUT
RX IN
VBATT
9
S
D
FB5
23
G
220 ohm
1
USB_P
USB_M
3
63 mA t yp.
C102
.1 uF
30
27 pF
17
27 pF
R36
140
16
1
2
3
4
5
L1
R37
140
27 nH
8
PF2
19
18
7
C64
6
27 pF
5
22
VCC_IN
GND
VCC_IN
GND
C101
.1 uF
11
10
C62
R35
200 mA
VDD_USB
Q3
2
C63
OUT
10K
SBC_3.3V
CN14
12
13
24
FB6
SW_5V
RADIO_GPS_SL869
220 ohm
EN_GPS_3.3V#
Xbe e a nd GPS ra dios ca n not bot h be ins t a lle d
Acce le rome t e r
U21
VDD
VDIO
14
SBC_3.3V
1
5V --> 3.3V
DIO Port
C158
I2C_CLK
4
SBC_3.3V
SCL
.1 uF
I2C_DAT
6
C127
SDA
U18
1
19
ACCEL_INT
SPARE_2
11
9
13
15
16
2
ISA_IRQ5
INT2
.1 uF
DNC
NC
ISA_IRQ6
ISA_IRQ9
RXD_422_5V
NC
SPI_CS2#
NC
SPI_MOSI
SPI_CLK
NC
GND
7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
13
15
16
12
17
18
19
20
20
I2C_DAT
OE
I2C_CLK
CAP
ISA_IRQ7
8
VCC
HD2
INT1
C159
3
.1 uF
DIR
I2C_LSB
GND
GND
2
3
4
5
6
7
8
9
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
5
GND
18
17
16
15
14
11
IRQ5
PUSH_SW_1#
IRQ6
DIO_7
IRQ7
DIO_9
IRQ9
DIO_11
SPI_MISO
RXD_422_3V
R96
SW_5V
LCD_3.3V
PUSH_SW_2#
DIO_8
DIO_10
DIO_12
XBEE_TXD
XBEE_RXD
10
10
HD_2X10_2.54MM_TH
51
74LVC245_TSSOP20
12
ACCEL_MMA8451_QFN16
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v: A
Da t e
April 27, 2015
DIO, COM Port s
De s igne r
She e t
6
of 18
Audio CODEC
U37
20
SBC_3.3V
VDD_IO
LINEOUT_R
11
SPKR_R
C106
.1 uF
LINEOUT_L
12
SPKR_L
R129
2.49K
L4
COIL_1UH_0805
R70
5
SBC_3.3V
VDDA
1 ohm
MIC
C30
15
CN10
C107
.1 uF
.1 uF
10 uF
Audio
C157
R119
2.49K
A
MIC_BIAS
30
1.5V
16
SPKR+
1
2
3
4
5
6
7
8
9
10
A
SPKR-
HD_2X5_TH_2.54MM
VDD_D
C96
C108
HP_R
.1 uF
2
100uF
4V
HP_L
Ana log
Input s
13
14
100uF
4V
LINEIN_R
I2C_CLK
27
29
AUD_CLK
AUD_FRM
AUD_TXD
AUD_RXD
SYS_MCLK
23
26
25
21
8
9
17
19
22
28
4
1) MIC
NC
I2C_DAT
2) AUD GND
I2C_CLK
3) MIC Bia s
CP_FILT
24
AC97
LINEIN_L
HP_VGND
I2C_DAT
C97
6
18
4) AUD GND
NC
I2S_SCLK
5) HP Right
I2S_LRCLK
VAG
10
6) HP Right Re t urn
I2S_DIN
7) AUD 5V or NC
I2S_DOUT
C103
SYS_MCLK
NC1
CTRL_ADR0_CS
NC2
CTRL_MODE
NC3
A_GND
NC4
GND1
NC5
GND2
NC6
8) Ke y
.1 uF
GND_PADDLE
9) HP Le ft
31
32
10) HP Le ft Re t urn
Low = I2C
7
1
3
33
A
CODEC_SGTL5000_QFN32
TVS4
Touch Scre e n
Cont rolle r
SILAB_3.3V
1
6
2
3
U48
C123
14
.1 uF
5
13
VCC_IO
VCC_AN
4
X+
Y+
VREF
X-
1
SPI_CLK
4
SPI_MOSI
2
SPI_MISO
16
TOUCH_CS#
3
BUSY
Y-
DOUT
15
TVS_USB2_NUP4114_SC88
7
CN11
8
1
9
2
AUX_IN
V_BAT_IN
12
PAD
TSC2046_QFN16
4
XR
YU
XL
YB
11
CON4_RA_FPC_1MMP_TH
CS#
PENIRQ#
Touch Scre e n
Conne ct or
3
GND
TOUCH_WAKE#
SBC_3.3V
6
CLK
DIN
5
C200
C201
C202
C203
10 nF
10 nF
10 nF
10 nF
10
17
Pin 1 is on le ft s ide
looking int o conne ct or
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v: A
Da t e
April 27, 2015
LCD, Audio, TouchScre e n
De s igne r
She e t
7 of 18
Gig Ma gJa ck
LCD Conn.
R62
ETH_RIGHT_LED
T2
270
ETH_LEFT_LED
260 mA t yp.
19 20
14
CN4
Alignme nt
Pe gs
R63
FB7
13
220 ohm
11
MDI_0_P
1
LCD_3.3V
270
2
1
3.3V
3.3V
12
3
10
MDI_0_M
2
4
4
MDI_1_P
3
GND
GND
6
5
MDI_1_M
LVDS_TX0_P
3
MDI_2_P
LVDS_TX0_M
6
7
2
LVDS_TX1_M
7
7
LVDS_TX1_P
9
MDI_3_M
8
8
9
10
16
POE
15
C209
10 nF
C210
10 nF
C211
10 nF
C207
RX_IN0+
GND
Le ft
Shie ld
POE
18
LVDS_TX2_M
LVDS_TX2_P
21
22
RX_IN1RX_IN1+
GND
17
10 nF
11
12
RX_IN2RX_IN2+
MAGJACK_GIG_7800
13
LVDS_CLK_M
LVDS_CLK_P
14
15
16
Le ft LED (Gre e n)
RX_IN0-
5
8
MDI_3_P
6
4
1
MDI_2_M
5
R112
Ze ro
Link / Act ivit y
17
18
19
20
GND
RX_CLKRX_CLK+
GND
NC1
NC2
GND
GND
TS_20-PIN_RA_LVDS_2.54MM_TH
Us e r Jumpe rs
Force Boot
t o SD ca rd
SBC_3.3V
4
RN10-D
10K
R73
OFF_BD_RESET#
BUS_DIR
1.2K
SD Boot
JMP_1
5
USER_JMP_1#
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v: A
Da t e
April 27, 2015
LCD, Audio, TouchScre e n
De s igne r
She e t
8 of 18
Ba ckLight Powe r
BK_Lit e
Ze ne r Prot e ct s a ga ins t
L5
COIL_10UH_560MA_3X3MM
FB11
120 mA
Ope n circuit loa d
P1
19V-20V t yp.
1
SW_5V
220 ohm
2
D2
C110
3
C28
10 uF
27V Ma x.
SW
1
4
C78
10 uF
5
3
D7
C67
U9
.1 uF
22V
25V
CONN_JST_2POS_SMT
1000 pF
VIN
2.5V t o 20V
1
R136
25.5K
2
BACK_LITE_V
RN5-A
1
8
4
1.25V FB
3
R74
BACK_LITE_I
EN/ SS
GND
LCD_3.3V
2
LCD_3.3V
REG_SC4503_BOOST_SOT23
VCC
R84
12 ohm
12 ohm
R85
12 ohm
5.10K
1
RESET#
3
R83
R108
U13
2
R125
2.49K
1.2K
10K
R77
1.2K
GND
R41
5.62K
STM1001S-2.9V_SOT23
120 mA is t yp. cont inuous
R75
LED Ba ckLight is ra t e d a t .
1.2K
U27
C27
VCC
2
LCD_3.3V
3
2
RN5-C
10K
6
LCD_3.3V
10 uF
R83 not popula t e d
4
1
LCD_PWM
5
GND
Ma y be ne e de d for hi bright LCD
3
NC7SZ125P5X_SC70
RN5-B
10K
Spe a ke r Amp
7
R105
60 Hz corne r
SPKR_R
5.10K
GND
GND
C89
R106
RN4-A
8
SPKR_L
5.10K
C105
1
10K
.47 uF
.1 uF
C88
U29
SW_5V
.47 uF
4
VIN-
VDD
VIN+
VOUT+
6
C90
3
A
.47 uF
2
1
SW_5V
2
RN4-B
BYPASS
VOUT-
K3
5
1
2
8
SHUTDOWN
GND
7
7
LM4864_SOIC8
3
SPKR+
D
5
EN_SPKR
3
1 MT125
1 MT125
MT5
1 MT125
MT6
1 MT125
6
MT7
1 MT125
1 MT125
MT10
1 MT125
R113
Ze ro
R115
Ze ro
R116
Ze ro
R118
Ze ro
R111
Ze ro
S
4
4
RN4-C
10K
MT4
SPKRQ5-B
G
MT3
-
SPEAKER_32MM_PIEZO_TH
10K
MT2
+
RN4-D
10K
5
MT9
1 MT125
R117
Ze ro
Te chnologic Sys t e ms
Tit le :
Re v:
TS-8950
A
Da t e
April 27, 2015
Ba cklight Powe r Et he rne t
De s igne r
RLM
She e t
9
of 18
2nd Et he rne t Port
U28-A
19
SBC_3.3V
SMSC
USB Hub
27
C136
C137
C138
.1 uF
.1 uF
.1 uF
33
39
Typica l 3.3V curre nt
46
VDD33IO1
VDD18CORE1
VDD33IO2
VDD18CORE2
15
38
C35
VDD33IO3
10 uF
VDD33IO4
VDD33IO5
VSS
wit h a ll port s a ct ive
is 288 mA (950 mw)
C140
.1 uF
65
LAN9514_SMSC_QFN64
U28-C
UPSTREAM
58
USB_HOSTA_M
59
USB_HOSTA_P
USB
DOWNSTREAM
USBDM0
USBDM2
USBDP0
USBDP2
1
USB_DN4_M
2
U28-F
USB_DN4_P
SBC_3.3V
12
OFF_BD_RESET#
14
PRCTL2
USBDM3
3
16
17
input t o s e ns e ove r curre nt
18
61
60
PRCTL3
USBDP3
GPIO3
11
SBC_3.3V
4
GPIO4
PRCTL4
USBDM4
USBDP4
VBUS_DET
USB_DN2_P
47
PRCTL5
U28-E
USB_DN2_M
Ca n be us e d a s out put s , t o
e na ble port powe r, or a s a n
NRESET
6
40
SBC_3.3V
USB_DN3_M
34
7
USB_DN3_P
XI
13
TEST4
GPIO5
TEST3
GPIO6
TEST2
GPIO7
35
R51
U28-D
28
36
NTRST
12.1K
EEDI
37
29
42
30
43
31
32
TEST1
TMS
EEDO
TDI
EECS
TDO
EECLK
26
25
24
23
TCK
XO
LAN9514_SMSC_QFN64
R990
USBDM5
1.0M
USBDP5
41
8
USB_MINI_M
44
9
USB_MINI_P
AUTOMDIX_EN
LAN9514_SMSC_QFN64
CLK24_OUT
CLK24_EN
45
LAN9514_SMSC_QFN64
Y1
62
VDD18USBPLL
USBRBIAS
63
25 MHz
R52
12.1K
LAN9514_SMSC_QFN64
C70
C71
15 pF
FB8
15 pF
FB15
SMSC_1.8V
220 ohm
C205
SBC_3.3V
220 ohm
10 nF
C139
ETH2
.1 uF
RJ45
R90
4
12 ohm
5
R92
R91
51
12 ohm
C134
RX-
RX_CT
ALIGN
SMSC
Et he rne t Port
R93
ALIGN
.1 uF
51
R94
51
C133
3
TX_CT
POE_RX
1
2
POE_TX
TXPOE_45
POE_78
5
C128
.1 uF
C129
.1 uF
C130
.1 uF
C131
.1 uF
C204
10
49
10 nF
51
54
57
64
NFDX_LED
VDD33A1
VDD33A2
NLNKA_LED
NSPD_LED
20
21
22
VDD33A3
VDD33A4
VDD33A5
RXP
RXN
48
VDD18ETHPLL
TXP
SPEED_LED#
C72
C73
15 pF
15 pF
11
R68
ACT_LED#
TXN
50
C132
.1 uF
12
POE_TX
FB35
9
POE_45
10
POE_78
LLED-
R61
Gre e n
SHD
13
53
FB36
LLED+
270
52
55
POE_RX
ACT_LED#
SPEED_LED#
SMSC_1.8V
8
SBC_3.3V
VDD33A6
VDD33A7
7
TX+
ETHERNET PHY
220 ohm
18
POE_24V
.1 uF
U28-B
SBC_3.3V
17
C135
R95
51
.1 uF
FB13
6
T3
RX+
14
SHD
15
16
RLED+
RLED-
Ye llow
R114
Ze ro
270
MAGJACK_POE_10_100
56
EXRES
LAN9514_SMSC_QFN64
R50
12.1K
Te chnologic Sys t e ms
TS-8950
Tit le :
Re v:
A
Da t e : April 27, 2015
Et he rne t 2 Port
De s igne r
She e t
10 of 18
Digi/ Ma xSt re a m
3.3V Powe r Supply for LCD
XBe e Ra dio
LCD
3.3V
C74
CN12
15 pF
U26
FB10
1
SW_5V
220 ohm
2
LX2
PVIN2
4
9
5
6
7
R80
8
EN_LCD_3.3V
R107
5.10K
LCD_3.3V
16
XBEE_RXD
2.2uH
3
2
DIN
VCC
10
FB
C31
C32
10 uF
10 uF
OFF_BD_RESET#
NC
11
PGND1
CTL0
RESET#
DIO1
DIO2
13
PGND3
DIO3
17
PAD_GND
CTL3
5
1.2K
12
PGND2
CTL1
CTL2
R72
12
XBEE_CTS#
CTS#
3
AGND
DIO4
Ma x 50 uF !
9
DTR#
DIO5
16
REG_SC183C_BUCK_2A_QFN16
RTS# / DIO6
DIO12
PWM/ RSS/ DIO10
13
14
8
1
FIL_3.3V
DOUT
DIO0
1.2K
KILL_LCD_PWR#
XBEE_TXD
3.30V nomina l
AVIN
10 uF
.1 uF
L2
15
LX3
C29
C125
14
LX1
PVIN1
ON/ SLP#
DIO11
C100
20
.1 uF
19
18
17
11
15
4
6
7
VREF
DNC
GND
10
XBEE_SOCKET_TH
Mini PCIe
SIM Ca rd Conne ct or
Mini PCIe 1.5V Re g.
U14
CN13
C1
SIM_PWR
C2
SIM_RESET
C3
SIM_CLK
C5
C6
SIM_VPP
C7
SIM_DATA
1.5V
VCC
MNT
RESET
MNT
CLOCK
MNT
GND
MNT
VPP
MNT
GND1
8
GND2
VIN
2.2-6V
GND3
GND4
GND5
I/ O_DATA
CONN_SIM_CARD_FLIP
C147
.1 uF
SBC_3.3V
2
6
5
NC
NC
EN
0.3V = L
1.0V = H
VOUT
1000 mA
NC
0.8V FB
GND
PAD
1
R54
12.1K
7
C34
3
10 uF
4
9
R56
12.1K
REG_AP7361_ADJ_DFN8
R78
1.2K
Te chnologic Sys t e ms
TS-8950
Tit le :
Re v:
A
April 27, 2015
Mini PCIe , Xbe e
De s igne r
RLM
She e t
11
of
18
Mini PCIe
SERDES MUX
SATA Pola rit y ca n not be s wa ppe d
Socke t
U44
PCIe Pola rit y ca n be s wa ppe d
SBC_3.3V
CN3-A
C151
.1 uF
No le ngt h ma t ching re quire d for e it he r
C152
.1 uF
C153
.1 uF
1
6
10
VDD
1
VDD
VDD
9
19
10 nF
PCIE_RX_P
15
C0_P
18
B0_M
C213
SATA_RX_P
10 nF
PCIE_TX_P
3
A0_M
4
PCIE_TX_M
17
17
B1_P
19
13
C1_P
16
B1_M
A1_M
12
21
7
8
C1_M
11
SATA
Pa irs
PCIe
Pa irs
20
21
SEL_BC
GND
GND
GND
PAD_GND
1.5V
UIM_PWR
CLK_REQ#
GND
UIM_DATA
REF_CLK-
UIM_CLK
REF_CLK+
UIM_RESET
UIM_VPP
GND
9
(XSD)
EN#
Shut down Pin
Low = Norma l
High = Shut down
DISABLE#
PE_RST#
GND
SATA_RX+
3.3V_AUX
25
SATA_RX-
GND
27
GND
1.5V
29
GND
SMB_CLK
31
SATA_TX-
SMB_DATA
SATA_TX+
GND
35
GND
USB_D-
37
FIL_3.3V
Low = B
= PCIe
GND
23
33
10 nF
5
GND
2
FIL_3.3V
4
6
8
SIM_PWR
10
SIM_DATA
12
SIM_CLK
14
SIM_RESET
16
SIM_VPP
1.5V
C0_M
C215
SATA_TX_P
15
14
C214
10 nF
13
MINI_CLK_P
A0_P
A1_P
SATA_TX_M
11
MINI_CLK_M
B0_P
C212
SATA_RX_M
3.3V
5
7
PCIE_RX_M
WAKE#
3
2
USB_D+
39
3.3V
GND
41
3.3V
LED_WWAN#
43
PCIE_DET#
LED_WLAN#
45
LED_WPAN#
47
PCIE_SEL#
1.5V
49
51
SERDES_MUX_CBTL02042A_QFN20
GND
3.3V
SATA_DET#
18
20
22
OFF_BD_RESET#
24
FIL_3.3V
26
28
30
I2C_CLK
32
I2C_DAT
34
36
USB_MINI_M
38
USB_MINI_P
40
42
44
FIL_3.3V
46
48
FB22
50
52
SBC_3.3V
220 ohm
2
C33
RN7-B
10K
10 uF
PCIE_MINI_CONN_SMT
7
SBC_3.3V
PCIe Clock Ge n.
U42
21
6
RN7-C
5
3
18
10K
3
BUF_XIN
8
PCIE_MINI_CONN_SMT
OE_PAIR0
PU
NC
OE_PAIR1
OE_PIN2
PU
NC
11
SS_1
20
7
14
8
SBC_CLK_M
DIFF0_N
3
4
5
6
SBC_CLK_P
Pha s e doe s not ma t t e r
SDATA
15
MINI_CLK_M
To Support Ha lf-Size Mini-PCIe
XOUT
DIFF_N
Y2
23
13
2
SCLK
DIFF1_P
22
MM60-52B_JAE_PARTIAL
PD
1
I2C_DAT
63
10
a nd t ri-s t a t ing out put s
I2C a ddre s s = He x D6
60
9
SS_0
DIFF0_P
19
PCIE_MINI_CONN_SMT
VDD
a llows cha nging a mplit ude
I2C_CLK
PCIE_MINI_CONN_SMT
2
VDD
J2
7
I2C int e rfa ce
64
VDD
NC
R59
270
62
17
CN3-D
VDD
61
12
58
C119
.1 uF
C118
.1 uF
57
C109
.1 uF
56
C104
.1 uF
55
6
54
220 ohm
CN3-C
CN3-B
VDD
53
1
SBC_3.3V
59
FB12
16
MINI_CLK_P
XIN
25 MHz
GND
C76
15 pF
GND
C75
15 pF
GND
SI52142_QFN24
4
24
25
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v:
A
Da t e
April 27, 2015
Ana log
De s igne r
She e t
12 of 18
MAX2
PLD
MAX2
Prog. He a de r
SBC_3.3V
1
CN9
SBC_3.3V
RN8-A
1
24
4
3
23
6
5
25
10
9
TS-8950
U22
2
7
Out put s on Right
8
10K
8
Input s on Le ft
22
9
VCCIO
31
VCCIO
45
VCCIO
59
VCCIO
80
VCCIO
94
VCCIO
TCK
TDI
TDO
TMS
Boa rd ID = 20
SBC_3.3V
C121
.1 uF
C122
.1 uF
C126
C142
C143
C145
.1 uF
.1 uF
.1 uF
.1 uF
U10
13
VCCINT
63
VCCINT
47
HD_2X5_TH_2.54MM
48
MAX2
49
51
IO
VCCINT/ IO
IO
VCCINT/ IO
41
44
OFF_BD_RESET#
50
38
IMX6_A16
52
43
IMX6_CS2#
54
27
34
PLD_28.8MHZ
30
40
IO
IO
IO
IO
IO
IO
IO
CLK1
IN
IO
IO
IO
IO
IO
IN
IO
IO
IO
IN
IO
IO
IN
IO
IN
IO
IO
IO
IO
IO
IO
SPARE_1
SPARE_2
35
67
89
AD_[00: 15]
55
AD_15
84
AD_14
85
AD_13
86
AD_12
87
AD_11
91
AD_10
92
AD_09
95
AD_08
96
AD_07
97
AD_06
98
AD_05
99
AD_04
100
AD_03
2
AD_02
1
AD_01
3
AD_00
4
BUS_ALE#
BUS_CS#
BUS_DIR
BUS_BHE#
5
7
6
14
60
65
79
93
3
2
IO
IO
ISA_WAIT#
4
88
IO
IO
53
39
CLK4
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
IO
IO
IO
70
69
33
29
12
83
18
15
26
28
56
21
ISA_MEMW#
1
ISA_MEMR#
ISA_IOW#
ISA_IOR#
15
ISA_245_DIR is high for Re a d cycle s
14
13
ISA_245_CS#
12
ISA_245_DIR
Y0
VCC
16
SBC_3.3V
Y1
Y2
Y3
Y4
OUT
Y5
5
BD_ID_DATA
Y6
Y7
ISA_14.3MHZ
ISA_BHE#
ISA_RESET
ISA_BCLK
ISA_BALE
BUS_WAIT#
Allow BCLK a nd BALE
t o be t ri-s t a t e d
11
RED_LED#
10
GREEN_LED#
9
BUS_DIR
OUT#
S0
S1
S2
42
7
66
36
6
EN#
GND
8
ISA_ADD_[0: 19]
64
Us e Pa ge Re g. for
76
ISA_ADD_19
78
ISA_ADD_18
73
ISA_ADD_17
75
ISA_ADD_16
77
ISA_ADD_15
74
ISA_ADD_14
71
ISA_ADD_13
72
ISA_ADD_12
68
81
ISA_ADD_11
ISA_ADD_10
82
ISA_ADD_9
8
ISA_ADD_8
62
ISA_ADD_7
61
ISA_ADD_6
58
ISA_ADD_5
57
ISA_ADD_4
16
ISA_ADD_3
17
ISA_ADD_2
19
ISA_ADD_1
20
ISA_ADD_0
74HC251_SOIC
ISA a ddre s s e s A16 t hru A19
IO
IO
CLK3
IO
IO
IO
IO
IO
SBC LEDs
IO
IO
IO
IO
IO
IO
IO
IO
IO
CLK2
GND
GND
GND
GND
IO
IN
SBC_3.3V
GND/ IO
GND/ IO
37
90
10
GND
11
GND
32
GND
46
GND
2
2
LED2
Gre e n
LED1
Re d
1 Gre e n
1
RED
MAX2_240T_TQFP100
R64
RED_LED#
270
PLD re quire s a 28.8 MHz clock
R65
GREEN_LED#
270
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v:
A
Da t e
April 27, 2015
Ana log
De s igne r
She e t
13 of 18
PC/ 104
PC/ 104
40-pin Conne ct or
64-pin Conne ct or
CN17
D0
D1
D2
U16
D3
CN16
SBC_3.3V
20
DIR
VCC
OE
1
19
ISA_245_DIR
ISA_BHE#
ISA_245_CS#
A1
GND
IOCHK#
RESET
AD_07
18
AD_06
17
AD_05
16
AD_04
15
AD_03
14
AD_02
13
AD_01
12
AD_00
11
10
B1
B2
B3
A1
A2
A3
B4
A4
B5
A5
B6
A6
B7
A7
B8
A8
A2
2
3
A3
4
A4
5
A5
6
A6
A7
7
A8
8
9
A9
D7
+ 5V
D6
IRQ9
AD_[00: 15]
74LVC245_TSSOP20
D5
-5V
D4
DRQ2
D3
-12V
D2
R79
A11
ENDX#
+ 12V
D0
B3
ISA_RESET
D6
SW_5V
B4
NC
ISA_IRQ9
B5
B6
B7
NC
RN17-D
2.2K
AEN
D7
B8
B9
B10
MEMW#
MEMR#
B11
B12
D8
NC
D9
NC
D10
NC
D11
NC
D12
NC
D13
D14
IORDY
SBC_3.3V
Provide s 5V t ole ra nce
D5
B2
D1
(KEY)
ISA_WAIT#
D4
NC
ISA_MEMW#
ISA_MEMR#
D15
D17
D18
IOW#
A12
ISA_ADD_18
A13
ISA_ADD_17
A14
ISA_ADD_16
ISA_ADD_15
A15
ISA_ADD_14
A17
ISA_ADD_13
A18
ISA_ADD_12
A19
ISA_ADD_11
A20
ISA_ADD_10
A21
A16
IOR#
A19
A18
A17
DACK3#
DRQ3
A16
A15
DACK1#
A14
DRQ1
A13
RFRSH#
A12
BCLK
A11
IRQ7
A10
IRQ6
IRQ5
IRQ4
ISA_ADD_9
A22
ISA_ADD_8
A23
ISA_ADD_7
A24
ISA_ADD_6
A25
ISA_ADD_5
A26
ISA_ADD_4
A27
ISA_ADD_3
ISA_ADD_2
A28
ISA_ADD_1
A30
ISA_ADD_0
A31
A29
IRQ3
A9
A8
A7
DACK2#
TC
A6
A5
BALE
A32
B13
B14
ISA_IOW#
A3
+ 5V
B15
LA23
IRQ10
LA22
IRQ11
LA21
IRQ12
LA20
IRQ15
LA19
LA18
IRQ14
OSC
GND
C1
C2
C3
C4
C5
C6
C7
C8
ISA_ADD_19
ISA_ADD_18
ISA_ADD_17
DACK0#
DRQ0
MEMR#
DACK5#
MEMW#
DRQ5
SD15
DACK6#
SD14
DRQ6
SD13
DACK7#
SD12
DRQ7
SD10
+ 5V
SD9
MASTER#
SD8
C9
C10
ISA_MEMR#
ISA_MEMW#
C18
C17
C16
C15
C14
C13
C12
C11
GND
GND
GND/ KEY
C19
PC104_40PIN_SHORT
B17
B18
B19
B20
ISA_BCLK
B21
ISA_IRQ7
B22
ISA_IRQ6
B23
ISA_IRQ5
U17
SBC_3.3V
DIR
20
VCC
OE
B24
B25
RN17-C
2.2K
B26
B27
B28
B29
B30
A0
GND
C0
B16
ISA_BALE
SW_5V
A2
A1
D19
ISA_IOR#
A4
GND
ISA_ADD_[0: 19]
IO16#
SD11
D16
SW_5V
1.2K
ISA_ADD_19
SBHE#
MEM16#
LA17
GND
A10
NC
B1
GND
GND
B31
ISA_14.3MHZ
RN17-B
2.2K
RN17-A
2.2K
AD_08
18
AD_09
17
AD_10
16
AD_11
15
AD_12
14
AD_13
13
AD_14
12
AD_15
11
10
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
B6
A6
B7
A7
B8
A8
1
ISA_245_DIR
19
ISA_245_CS#
2
3
4
5
6
7
8
9
GND
B32
AD_[00: 15]
74LVC245_TSSOP20
66
PC104_64-PIN_SHORT
65
Provide s 5V t ole ra nce
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v:
A
Da t e
April 27, 2015
Ana log
De s igne r
She e t
14 of 18
Is ola t e d POE Side
48V DC Input
Re g. 13V Out
L3
13V
D18
A1
13V t yp.
K
2.2uH
56V
C57
1uF
100V
C53
.1 uF
R14
221K
VIN
35V
100V
+
8A
Me a s ure d 45V wit h COTS PSE
1000 pF
1
220 ohm
C41
22 uF
C52
.1 uF
100V
D15
R27
165K
5
6
7
Wit h 40V PS, Not hing ble w
Se e ing -20V pe a k
10
a t 22 wa t t loa d
11
12
AUX
12V
6
100V
The PSE re s e t
9
5
C51
.1 uF
58V
100V
PRI
4
200V
C50
Short e d 12V t o GND
8
3
100V
TVS8
260 KHz t yp.
Te s t
16V
12 ohm
7
2
.1 uF
R86
T1
POE_+
C66
10 uF
25V
C94
220 uF
C77
FB17
D4
A2
C58
1uF
100V
Re s is t ive 22 wa t t loa d a pplie d
8
XFORM_POE300F_12V
Q4
D
wit h PSE. Whe n us ing 40V Powe r
$2.28 @ 700
FB16
R135
25.5K
POE_220 ohm
R87
C86
4
G
12 ohm
.47 uF
R88
12 ohm
S
3
2
1
D17
U33
13
1
9-18V
DEN
Supply, it worke d OK a t 30 wa t t
VC
12V nom.
6
R49
3
POE_V
2
11
12
R17
VDD1
VB_5V
2
POE_5V
VDD
C69
10 uF
C68
10 uF
25V
25V
14
PPD_NC
.47 uF
1000 pF
16V
R18
15
R126
2.49K
C43
DIODE_BAV99_SOT23
C85
124
12.1K
R28
150 mohm
2KV
CLASS
124
21
10
TYPE2_PSE
GATE
VSS
550 mV t yp
SENSE
GATE2
16
POE_5V
APD
FREQ
COM
18
R19
63.4K
+
2.49K
4
1
D16
17
4
9
R40
5.62K
C216
C217
10 nF
10 nF
2
2
3
3
1
Soft St a rt
OPTO_LTV-357_SMT
3.3 nF
TPS23754PWP_SMT
R134
25.5K
C47
8
C87
R25
475
2
LED3
U6
2
POE_5V
1
Gre e n
C218
C219
10 nF
10 nF
R21
63.4K
.47 uF
DIODE_BAV99_SOT23
1.24V 1
1
3
R57
6.49K
St e p Loa d Re s pons e
3
2
7 ohm loa d wa s s wit che d on/ off
4
12V ra il dippe d 500 mV
RECT_FW1A_DF10S_1000V
t he n s moot hly re cove re d in 20 us
FW2
+
1
POE_+
Te mp. Ris e
3
POE_78
1.5V Thre s h
13.3V
R124
OP1
TLV431_18V_SOT23
-
POE_45
1
R123
2.49K
475
7
FW1
48VDC IN
POE_TX
R23
3
POE
Full Wa ve
Re ct ifie rs
POE_RX
RTN
ARTN
R20
63.4K
Nomina l
BLANK
POE_5V
5
DEAD_TIME
CTRL
19
20
PAD
2
POE_-
At 22 wa t t loa d
4
Q4 ca s e a t 60 de gre e s
RECT_FW1A_DF10S_1000V
D1 a t 56 de gre e s
Te chnologic Sys t e ms
TS-8950
Tit le :
Da t e
April 27, 2015
POE
T1 wa s 45 de gre e s
Re v:
A
De s igne r
She e t
15 of 18
USB De vice Port a nd Sila b uC
D11
24 mA ma x loa d
1
5V_A
3
SiLa bs
U38
2
C150
.1 uF
PWR_IN
4
USB_SILAB_P
USB
5
USB_SILAB_M
C37
10 uF
7
4.7V_A
5.25V Ma x
USB_DP
1
USB_DM
2
8
P0.1
Progra m
DEBUG_CLK/ RESET#
P0.2
10
SILAB_DATA
DEBUG_DATA
A/ D
P0.3
TXD0_P0.4
A/ D
R15
18
VIN
RN6-B
RXD0_P0.5
P2.0
221K
P0.6
2
EN_SW_5V#
D
P1.1
P1.2
R122
R55
2.49K
12.1K
17
5V_A
P1.3
P2.1
P3
EN_SUPER_CHRG
32
220 ohm
Micro B
Q5-A
G
2
31
12 ohm
S
1
EN_SILAB_GRN_LED
1
TOUCH_WAKE#
30
SUPER_CAP1_V
29
SUPER_CAP2_V
U34
4
VCC
EN_Touch#
5
SILAB_3.3V
24
23
R24
475
TOUCH_CS#
2
FRM
DFRM
9
8
D+
FRM
SENSE
GND
FRM
7
6
CONN_USB_MICRO-B_RA
1
GND
DDR_1.5V
3
FB19
USB_5V_DETECT
6
NC7SZ32P5X_SC70
4900_1.8V
5
TVS1
5V
1
4
25
3
USB_DEVICE_P
Ana log
28
26
2
USB_DEVICE_M
SPI_CS1#
P1.0
FB23
R89
1
R48
12.1K
Sca le = 5.19%
USB De vice Port
7
6
P0.0
9
EN_SW_5V
10K
USB_VBUS
A/ D
SILAB_CLK
8
10K
SILAB_3.3V
USB_5V_DETECT
RN6-A
2
4900_1.2V
220 ohm
1
Ana log
5
RN9-A
10K
Pla ce ne a r Touch Cont rl
BACK_LITE_I
8
3
A/ D
Sca le = 46.4%
R53
12.1K
P1.4
A/ D
P1.5
R44
TXD
P1.6
5.62K
RXD
P1.7
LCD_3.3V
16
R45
5.62K
Sca le = 50%
22
21
I2C_DAT
4
I2C
I2C_CLK
20
TVS_USB2_NUP4114_SC88
DEBUG_RXD
UART_1
19
SILAB_3.3V
DEBUG_TXD
P2.2
SiLa b
15
EN_TOP_CHRG
P2.3
REG_3.3V
C38
C148
14
1.5V
Sca le = 17.1%
13
POE_V
P2.4
.1 uF
P2.5
P0.7_VREF
3.3V
6
3
10 uF
R26
475
RN6-C
6
SILAB_CLK
10K
27
SILAB_2.5V
Sca le = 8.9%
12
BACK_LITE_V
11
R42
P2.6
PAD
2
33
P2.7
GND
SBC_3.3V
C149
.1 uF
3
C36
10 uF
5.62K
Sila b Prog. He a de r
U31
2500 mV
CN8
1
SILAB_C8051F383_QFN32
R43
5.62K
Sca le = 50%
SILAB_3.3V
3
REF_AN431A_SOT23
2
SILAB_3.3V
A/ D full s ca le = 2.50V
RN9-B
7
10K
1
2
3
4
5
6
7
8
9
10
SILAB_CLK
SILAB_DATA
NC
NC
5V s ource
HD_2X5_TH_2.54MM
SiLa b
SBC_3.3V
3
RN10-C
6
PWR_FAIL#
EN_SILAB_GRN_LED
10K
3
D
2
Q6-B
G
KILL_LCD_PWR#
5
SILAB_DATA
LED4
SiLa b
1
S
4
SiLa b pin 20 mus t be t ri-s t a t e d
3
D
Q7-B
G
5
S
4
Gre e n
R60
270
a nyt ime TS-4900 is powe re d off
Aft e r TS-4900 powe re d up, wa it
300 ms be fore driving pin 20
Te chnologic Sys t e ms
Tit le :
TS-8950
Re v:
A
Da t e
April 27, 2015
Ana log
De s igne r
She e t
16 of 18
Two 100-pin Module Conne ct ors
EXT_RESET# is a n Input
Le ft
Right
t ha t re s e t s t he CPU
CN1
OFF_BD_RESET# is a n Out put
1
2
3
4
5
6
7
8
9
10
NC
NC
11
12
13
14
15
16
NC
17
18
19
20
21
22
23
24
us e d t o re s e t a ll pe riphe ra ls
OFF_BD_RESET#
DIO_7
DIO_8
SBC_5V
R130
2.49K
DIO_9
DIO_10
FB33
DIO_11
SW_5V
DIO_12
120 ohm
IRQ9
PUSH_SW_2#
GPS_PPS
IMX6_CS2#
USER_JMP_1#
SPARE_2
PUSH_SW_1#
PCIE_SEL#
LCD_PWM
R131
2.49K
R132
2.49K
TXEN2_485
TXEN1_485
CAN_2_RXD_3V
CAN_2_TXD
BD_ID_DATA
XBEE_CTS#
PLD_28.8MHZ
IRQ7
IRQ6
IRQ5
BUS_WAIT#
BUS_BHE#
CN2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
MDI_0_P
IMX6_A16
Giga bit
MDI_0_M
Et he rne t
MDI_1_P
ETH_CT
MDI_1_M
ETH_CT
SBC_5V
3.3V
MDI_2_P
MDI_2_M
EN_USB_5V
SPARE_1
MDI_3_P
FB14
EN_GPS_3.3V#
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
53
55
56
57
58
59
60
61
62
63
64
65
66
AD_14
67
68
AD_13
69
70
AD_12
71
72
AD_11
73
74
AD_10
75
76
AD_09
SATA_RX_M
77
78
AD_08
SATA_RX_P
79
80
81
MDI_3_M
SBC_3.3V
5
RN6-D
220 ohm
4
TOUCH_WAKE#
10K
3.3V loa d is < 400 mA
V_BAT
USB_HOSTA_M
USB
Port s
USB_HOSTA_P
4900_1.2V
USB_OTG_M
SPI_CS2#
USB_OTG_P
PWR_FAIL#
EN_SPKR
LVDS_CLK_M
CAN_EN#
LVDS_CLK_P
45
46
PCIE_TX_P
47
48
PCIE_TX_M
49
50
52
51
52
54
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
AD_07
79
80
82
AD_06
81
82
83
84
AD_05
83
84
85
86
AD_04
85
86
87
88
AD_03
87
88
89
90
AD_02
89
90
91
92
AD_01
91
92
93
94
AD_00
93
94
95
96
95
96
97
98
97
98
99
100
99
100
ACCEL_INT
EN_LCD_3.3V
PCIE_RX_M
PCIE_RX_P
DDR_1.5V
SBC_CLK_M
C206
SBC_CLK_P
AD_15
SPI_CS1#
SPI
SPI_MOSI
SPI_MISO
SPI_CLK
SATA_TX_M
C208
SATA_TX_P
10 nF
DEBUG_TXD
Cons ole
BUS_ALE#
BUS_DIR
4900_1.8V
10 nF
DEBUG_RXD
AD_[00: 15]
CAN
BUS_CS#
CAN_1_TXD
CAN_1_RXD_3V
TYCO_100PIN_BASEBOARD
SBC
Boot s from
LVDS pa irs a re
1
e MMC Fla s h
le ngt h ma t che d
0
SD Ca rd
= BUS_DIR
ETH_RIGHT_LED
RED_LED#
GREEN_LED#
LVDS_TX2_P
LVDS_TX2_M
LVDS_TX0_P
LVDS_TX0_M
I2C_CLK
I2C
I2C_DAT
SYS_MCLK
AUD_CLK
I2S
AUD_FRM
AUD_TXD
AUD_RXD
LVDS_TX1_M
LVDS_TX1_P
USB_OTG_ID ope n = De vice
USB_5V_DETECT
TXD1_485
RXD1_485_3V
COM2_TXD_3V
COM2_RXD_3V
COM1_TXD_3V
UART4
UART3
COM1_RXD_3V
UART2
COM3_TXD_3V
COM3_RXD_3V
UART5
Se ria l Port s
COM1_RTS_3V
COM1_CTS_3V
XBEE_TXD
XBEE_RXD
TYCO_100PIN_BASEBOARD
Boot St ra p
Mode 2
ETH_LEFT_LED
PCIe Diff Pa irs ca n
be Pola rit y s wa ppe d
SATA ca n NOT ha ve
pola rit y s wa ppe d
MODE2 s t a t e is la t che d prior
MODE2 ha s a 12K PU
t o OFF_BD_RESET# de a s s e rt e d
on t he SBC module
SATA a nd PCIe Diff pa irs do
NOT ha ve t o be le ngt h ma t che d
Te chnologic Sys t e ms
Tit le : TS-8950
Re v:
A
Da t e
April 27, 2015
TS-Socke t Conne ct ors
De s igne r
She e t
18 of 18