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Volume III/Issue3/SEP2014
ANALYSIS OF MULTI-CELL SWITCHEDINDUCTOR AND SWITCHED-CAPACITOR
Z-SOURCE INVERTERS
JAVABUDLA MARUTHI
P.G. scholar, Dept of EEE at Sri Sai institute of technology and science,Rayachoty, Kadapa (dist), Andhra Pradesh, India,
Maruthijavabudla@gmail.com
V.PRATAPA RAO
Assistant Professor and HOD of EEE department at Sri Sai institute of technology and science,Rayachoty, Kadapa (dist),
Andhra Pradesh, India, vallabai.pratap@gmail.com
D.CHINNA DASTAGIRI
Assistant Professor of EEE department at Sri Sai institute of technology and science,Rayachoty, Kadapa (dist), Andhra
Pradesh, India chinnadastagiri.d@gmail.com
ABSTRACT—Traditional voltage-source inverter is limited
by itsonly voltage step-down operation, while current-source
inverter islimited by its only current step-down mode. In
order to add anextra boosting flexibility while keeping the
number of active semiconductorsunchanged, voltage-type and
current-type Z-source invertersLC filterwere earlier proposed.
These new classes of inverters aregenerally more robust and
less sensitive to electromagnetic noises.However, their
boosting capabilities are somehow compromised byhigh
component stresses and poorer spectral performances
causedby low modulation ratios. Their boosting gains are,
therefore, limitedin practice. To overcome these
shortcomings,
the
generalizedswitched-inductor
and
switched-capacitor Z-source inverters areproposed,whose
extra boosting abilities and other advantages havealready
been verified in simulation and experiment.
Index Terms—Cascaded inverters, multicell inverters,
switchedcapacitor(SC), switched-inductor (SL), Z-source
inverters ,LC filter.
I.INTRODUCTION
electrical systems like distributed generators,power
conditioners, and industrial drives have raisedthe importance
of
dc–ac inverters,
through
which
energy is
appropriatelyconditioned. Although well established now,
existingpopular inverter topologies still have some constraints
toresolve with the first being their inflexible voltage or
currentconversion ranges. To be more precise, existing
voltage-source
inverter (VSI) can only perform voltage step-down
operation,while its companion current-source inverter (CSI)
can only be inthe current step-down mode (or voltage step-up
mode assuminga constant delivered power).
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Voltage and current step-up flexibility can surely be
addedby connecting appropriate dc–dc converters to the
traditionalinverters, which probably would be the most
commercially viableapproach because of its simplicity.
There must howeverstill be some intellectual efforts in
finding alternatives that have
new features, resolve existing problems, and/or reduce
componentcount, before generating a commercial strength
later. Thatbelief might have led to the development of
various dc–ac inverters found in the literature. Among
them, the most noticeableat present might be the voltage
and current-type Z-source inverters,whose layouts are
shown in Fig. 1 [1]. Quite obviously, theonly difference
noted with the Z-source inverters is the presenceof an Xshaped LC impedance network and a far-left diode D.These
additions give boosting abilities and robustness to theZsource inverters, which can now tolerate shoot-through
andopen-circuit states without causing damages (traditional
VSIdoes not allow shooting through of its phase legs, while
CSIdoes not allow open circuiting of its bridge).
Indeed, research in Z-source inverters has progressed
activelywith their modulation [2], modeling [3], control [4],
[5], componentsizing [6], and applications [5], [7]– now
being addressed.Recently, another interest has surfaced,
and thataddress the limited practical conversion ranges of
the Z-sourceinverters. Although conversion gains of the Zsource invertersare theoretically infinite, practical issues
like higher semiconductorstresses and poorer spectral
performances can constraintheir highest achievable limits.
These constraints are undeniably
linked to the tradeoff between modulation ratio and
shootthroughor open-circuit duration experienced by the Zsourceinverters. To address that concern, a number of
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improvementshave since then been proposed including the
switched-inductor(SL) [4], tapped-inductor (TL) [5], T-source
[12], and transZ-source [6] configurations. Each technique has its
ownadvantages and disadvantages that might better suit
certain applications.The final decision on which to select is,
therefore,dependent on the problems under consideration,
individual judgments,and preferences.
In this paper, interest is directed to the SL
configuration,which presently has not been generalized. That
means its gainis still limited, which somehow dilutes the
initial intention ofenhancing its boosting ability. Its switchedcapacitor (SC) companionfor current-type Z-source inverter
has also not been discussedin the literature, and is now
addressed in this paper. Acomparison with those boosting
techniques mentioned previouslyis subsequently presented,
before discussing simulationand experimental results obtained
for performance verification.
ELEMENTARY SL AND SC TOPOLOGIES
Fig.2(a) shows the elementary voltage-type SL Zsourceinverter, which when compared with Fig. 1(a) is
derived byreplacing the two inductors in the traditional
network withtwo SL cells. The SL cell was earlier proposed
for variousdc–dc converters [14], before it was applied to the
voltage-typeZ-source inverter. Its generalization is to date not
attempted,and is now addressed in the next section after
reviewing theelementary SL cell.As per the traditional Zsource inverter shown in Fig. 1(a),the voltage-type SL
inverter can operate in both shoot-throughand nonshootthrough states. Features and expressions accompanyingboth
states are presented as follows:
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Fig. 2. Topologies of (a) voltage-type SL and (b)
current-type SC Z-source inverters.
As per the traditional Z-source inverter shown in Fig.
1(a),the voltage-type SL inverter can operate in both shootthroughand nonshoot-through states. Features and
expressions accompanyingboth states are presented as
follows:
1) Shoot-Through: Introduced by turning on two
switches simultaneously from at least a phase leg of
the VSI bridge. Upon doing so, diodes D, D3, and
D reverse-bias, while diodes D1,D2, D , and
D conduct. The two inductors per SL cell are hence
in parallel with their voltages expressed as v =
v =v =v =v =V =V =V .
2) Non shoot-Through: Referred to any of the traditional
six active and two null states of a VSI. In this state,
diodes D, D3, andD′ conduct, while diodes D1, D2,
D′ , and D′ block. The two inductors per SL cell are
thus in series, leading to vL= (Vdc−VC
Averaging a switching period to zero then gives rise
to the following governing expressions for the capacitor
voltage VC , peak dc-link voltage ˆvi , and peak ac output
voltage ˆvac, in terms of the source voltage Vdc:
=
(a) (b)
Fig. 1. Topologies of (a) voltage and (b) current-type
Z-source inverters.
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=
(
;
)
(1)
WhereM≤ 1.15 and dST <1/3 represent the VSI modulation
ratio after adding t offset and normalized shoot through
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time per switching period, respectively. The boost ratio B can
then be written as B = (1 + dST)/(1 − 3dST), which is larger
than B = 1/(1 − 2dST) of the traditional Z source inverter
shown in Fig. 1(a) with the same shoot-through duration.
From the SL cell, the dual SC cell can be derived, and is now
applied to the traditional current-type Z-source inverter
shown in Fig. 1(b). The modified SC topology is shown in
Fig. 2(b), where unlike Fig. 1(b), the X-shaped network has
been “twisted” with the source now directed downward
and diagonal branches consisting of inductors [15]. Such
“twisting” allows clearer insertion of the SC cells, while
preserving the X-shaped structure. The resulting SC topology
can still assume two distinct states, whose operating features
and expressions are written as follows:
1) Open Circuit: Introduced by turning OFF all switches of
the CSI bridge, causing diodes D, D3, andD′ to conduct
naturally. On the contrary, diodes D1, D2, D′ , and
D′ block naturally. The resulting circuit consists of two
series-connected capacitors per SC cell with their
currents indicated as i = i = i′ = i = i′ = I =
I =I .
2) Nonopen Circuit: Referred to any of the traditional six
active and three null states of a CSI. In this state, diodes
D, D3, and D′ block, while diodes D1, D2, D′ , , and
D′ conduct, hence giving rise to two parallel-connected
capacitors per SC cell. Their common capacitive current
is given by I c= (Idc− IL )
Averaging the capacitive current to zero per switching
cyclethen results in the following equations for relating the
networkinductive current IL , peak dc-link current ˆιi, and
peak ac outputcurrent ˆιacwith the input current Idc:
=
=
;
(
)
(2)
where ′ ≤ 1.15 and dOC <1/3 represent the CSI modulation
ratio and normalized open-circuit duration per switching
period, respectively. The computed current boost factor of
′
= (1 + dOC)/(1 − 3dOC) is again larger than that of ′ =1/(1
−2dOC) of the traditional current-type Z-source inverter
drawn in Fig. 1(b).
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(a)(b)
Fig. 3.Topologies of generalized (a) voltage-type SL and
(b) current-type SC Z-source inverters.
GENERALIZED SL AND SC TOPOLOGIES
From the denominator of (1), the maximum shoot-through
durationis limited to dST<1/3. Since the shoot-through
state canonly replace traditional null states of a VSI to
avoid introducingvolt-second error, the range of
modulation ratio is also limited toM ≤1.15(1−dST). The
upper limit ofM can be as low as 66%of a normal VSI
maximum when dSTis close to 1/3. This representspoor
utilization of the dc-link voltage and unnecessarilyhigh
component stresses,
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which contradictorily dilute the initial intention of
investigating the elementary SL topology. The samelimitation
is faced by the elementary current-type SC inverterbecause of
the same denominator in (2). To raise their modulationratios
while preserving their boosting abilities, the SL andSC
concepts are generalized here for voltage and current-typeZsource inverters, respectively
A. Generalized Voltage-Type SL Topology
The SL topology is generalized in Fig. 3(a), where the generic
cell identified is shown at the lower right corner. It consists of
one inductor Ln and three diodes D3n−1 ,D3n−2 , and D3n
for the nth cell. This cell can be duplicated 2N times (where N
is an integer), divided equally between the upper and lower
dcrails, and connected as in Fig. 3(a). Note that inductors L2N
+1 and L2N +2 are not included in the generic cells, but can
rather be viewed as the original two inductors found in Fig.
1(a) forthe traditional voltage-type Z-source inverter. It thus
appears that the style of forming the generic cell allows the
generalized SL topology to be viewed as adding extra cells to
the original two inductors rather than to replace them. These
cells must introduce additional inductors in parallel during
shoot-through charging and more inductors in series during
non-shoot-through discharging. Features and expressions for
the two processes are summarized as follows.Shoot-Through:
Initiated by turning on two switches fromthe same phase leg
of the VSI Bridge. That causes diodesD and D3n to turn OFF,
while diodes D3n−1 and D3n−2conduct. All inductors are
then charged in parallel by thetwo Z-source capacitors, giving
rise to a common inductivevoltage of vL= VC .Non-shootThrough: Represented by one of the traditionalactive or null
VSI states. In this state, diodes D andD3n conduct, while
diodes D3n−1 and D3n−2 block. All inductors then discharge
in series to the external ac load,whose common inductive
voltage is written as vL=(Vdc −VC )/(N + 1), where N + 1 is
the number of inductors inthe upper or lower cascaded block.
Averaging vLover a switching period to zero then gives
thefollowing generic expressions for governing the
generalized SLZ-source inverter:
=
(
=
;
)
(
(
)
)
(
)
(1)
(3)
The boost factor is given by B = (1 + NdST)/(1 − (N +2)dST),
which can be made higher than any of the earlier gainsby
adding more generic cells. The desired gain is also arrived ata
reduced
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shoot-through duration, whose limit dST <1/(N +2) is
derived by setting the denominator of (3) to be greater than
zero. That allows a higher modulation ratio to be used
sinceM ≤ 1.15(1 − dST). Better utilization of the dc-link,
lowercomponent stresses, and better spectral performance
linked to ahigh M can, therefore, be achieved.
With these characteristics, the generalized SL
topology islikely to find applications in renewable or other
clean energyindustry, where high boosting gain for grid
interfacing is usuallyneeded. A probable example is gridtied photovoltaic (PV)system, whose implementation will
usually involve the sensingof ˆvi directly or indirectly
through measuring VC (sinceˆvi = 2VC − Vdc during the
non-shoot-through state). The measuredˆvi can then be
regulated constant by adjusting M within the upper limit of
1.15(1 − dST), while reserving dST for trackingthe
maximum power point of the PV source. This
controlarrangement is standard for PV systems, meaning
that unforeseencomplication is unlikely to surface with the
generalizedSL inverter. With its ˆvi regulated constant,
selecting a suitablevoltage rating for its semiconductors is
thus quite straightforwardas long as they have the
instantaneous capacity to carrythe peak shoot-through
current. Other passive component sizingwise can be
approached based on the same sizing requirementsoutlined
in [6] for the traditional Z-source inverter.
B. Generalized Current-Type SC Topology
Similar analysis can be performed on the generalized
SCtopology shown in Fig. 3(b), where 2N cells are
duplicated andcascaded. The inner layout of each generic
SC cell is shown at the bottom right of Fig. 3(b), where a
capacitor Cn and threediodes D3n−1 ,D3n−2 , and D3n
can clearly be seen. This styleof modeling does not include
capacitors C2N and C2N −1 inthe generic cells. They can
rather be viewed as the originaltwo capacitors found in the
traditional current-type Z-sourceinverter drawn in Fig. 1(b).
The generic cells are, therefore,added to complement the
existing two capacitors rather thanto replace them. For
current-type inverter, these capacitors cangenerally be
smaller since the more important task is to keepthe
inductive currents constant.
Cascading in the described manner then leads to the
followingtwo operating scenarios for the generalized SC Zsourceinverter.1)Open Circuit: Introduced by turning OFF
all switches ofthe CSI bridge with diodes D and D3n
conducting, anddiodes D3n−1 and D3n−2 blocking. The
capacitors are,therefore, charged in series with their
common capacitivecurrent written as I C= IL .
2)Non-open Circuit: Represented by any of the nine
traditionalactive and null states of a CSI. In this state,
diodesD andD3n block, whileD3n−1
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andD3n−2 conduct to dischargethe capacitors in
parallel so as to produce a higherdc-link current. Each
capacitive current can appropriatelybe written as I c= (Idc−
IL)/ (N + 1), where N + 1 is the number of capacitors per
upper or lower cascaded block.
Performing the same averaging of capacitive current
to zerothen results in the following few equations for
governing theinverter:
=
=
(
)
(
(
;
)
)
(
)
Fig. 4.Topologyof voltage-type TL Z source
inverter.
For the generalized SL Z-source inverter, shifting
of sourceto any of the indicated positions results in the
same dc boostfactor and eventual input-to-output voltage
gain. Their capacitorvoltages are however different, and
are, respectively, representedby
=
(4)
A. Embedded and DC-Link Embedded Topologies
Before addressing other boosting methodologies, it is
informativeto compare the SL and SC topologies with some
variantsthat can be derived from their basic layouts shown in
Fig. 3.Given that the same conclusions are drawn from both
SL and SCtopologies; only the former is explicitly discussed
here withoutcompromising understanding. Referring to Fig.
3(a), it is understoodfrom [16] that the source at S1 can be
divided and shiftedto positions S2a and S2b, or S3a and S3b
for symmetrical placements.Alternatively, it can be shifted
fully (without dividing) toany of the shown positions for
asymmetrical placement. Earlierimproved [17], quasi [18],
and embedded [19], [20] variationsof the traditional Z-source
inverters are in fact based on the samesource-shifting
principles.
(
)
(
)
(5)
(Symmetrically placed at S2a and S2b)
=
The current boost factor of B_ = 1+NdO C1−(N +2) DOC can
again be tuned higher, if intended. The resulting SC topology
with a passive front-end diode rectifier added might
eventually find application in current-source motor drives,
whose high current gain can help with fast acceleration. Like
its SL dual, control and sizing of this SC drive are not
expected to be very different from those demanded by the
direct connection of an active front-end rectifier to a standard
CSI.
COMPARISON WITH OTHER HIGH-GAIN ZSOURCE INVERTERS
One major concern with the generalized SL and SC
topologiesis their high component counts, which probably is a
trade by most boosting techniques with high gains. Someof
these techniques recently introduced to Z-sourceare now
briefly reviewed to demonstrate what advantages a
disadvantages the SL and SC topologies have over them.
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(
)
(
)
(6)
(Placed at either S3a, S3b or both).
Both (5) and (6) give smaller values than (3), which are
inagreement with earlier studies for the traditional voltagetypeZ-source inverter. Note that asymmetrical placement of
source atonly S2a or S2b is also possible, but with two
different capacitorvoltages produced. The first is given by
VC in (3), and the secondis given by (6). Another
consideration to note is the flow ofsmooth source current
when placed at S2a, S2b, or both forthe traditional Zsource inverter. This advantage is however notshared by
the generalized SL topology, whose source current
ispulsing with a high instantaneous maximum when the
inductorscharge in parallel. The instantaneous source
current drawn isin fact the highest at positions S3a and
S3b, through whichcharging currents from 2(N + 1)
paralleled inductors flow. Itmight therefore not be as
favorable to locate the source at thesepositions, unlike the
traditional Z-source inverter.
B. TL Topology
The TL Z-source inverter is shown in Fig. 4 [11], where
twocoupled inductors having turns ratio γTLand four
diodes areused. The TL topology is only applicable to the
voltage-typeZ-source inverter, and can produce the same
gain and capacitorvoltage as the generalized SL topology.
Its governing expressionsare also represented by (3) after
substituting N with γTL.The number of inductor turns
needed by both topologies to producethe same gain is,
therefore, roughly the same. The TLtopology however uses
lesser diodes, but with higher blockingvoltages than the SL
topology. This can clearly be illustratedby writing down
their respective blocking voltages, which arefound to be
independent of the source positions
2)
Generalized SL InverterTLInverter expressions in
(8) are clearly γTLtimes larger than those in (7). In other
words, the TL topology reduces its diode count to four
merely by making them blocked larger stresses otherwise
distributed among N (=γTL) diodes in the SL topology.
Other places of concentrated stresses are at the L11 and
L21 windings of the TL inverter. This happens when in the
shoot-through state, during which energies from the L12
and L22 windings are transferred to the L11 and L21
windings because of the blocking of diodes DTL3 and
DTL4. That causes the instantaneous currents through L11
and L21 to surge greatly, which will not happen with those
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1)
inductors of the generalized SL topology.
C. TRANS-Z-SOURCE TOPOLOGY
The voltage-type trans-Z-source topology is showninFig.
5(a), where only a coupled transformer/inductor with
turnratioγTZ, a capacitor, and an input diode are used. It
clearlyuses much lesser components than the SL and TL
topologies,and from [13], its governing equations can be
written as
To make (9) share the same denominator as (3) derived
earlierfor presenting the SL and TL topologies, γTZmust be
equal toN+ 1 or γTL + 1, which means a larger turn ratio for
the trans-Z-source inverter. Even after the equalization, gain
produced bythe trans-Z-source inverter is lower by a factor of
{1 + (γTZ−1)dST}, which can further be simplified to
Fig. 5.Topologies of (a) voltage and (b) current-type trans-Zsource inverters.
Equation (10) explains that the reduction in gain for the transZ-source inverter is usually less than half since the shootthroughtime is rarely close to its upper limit of 1/(γTZ+1).
This reductionis hence easily overridden by its much lower
componentcount, even though its turn ratio is higher. The
trans-Z-sourcetopology is, therefore, an attractive alternative
if higher stressescan be tolerated by its input diode and lowvoltage winding.For the former, it experiences a high
blocking voltage duringshoot-through, given by
Which is much higher than those of the generalized SL
topology[see (7)]. The low-voltage winding of the trans-Zsource topology is experiences a surge in instantaneous
current whenentering the shoot-through state. During that
time interval, inputdiodeDTZblocks naturally, causing energy
from the highvoltagewinding to be transferred to the low-
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voltage winding,whose current surges instantaneously.
Therefore, as perthe TL topology, the trans-Z-source
inverter reduces its componentcount by “squeezing” higher
stresses to its remaincomponents.Unlike the TL topology
though, current-type trans-Z-sourceinverter exists, and is
represented in Fig. 5(b). Its operatingprinciples are based
on transformer coupling, which is differentfrom the
multiple-capacitor
approach
demonstrated
by
thegeneralized SC topology. Despite this fundamental
difference,features discussed earlier for the voltage-type
inverters are stillvalid here. That means the current-type
trans-Z-source inverterstill produces a gain that is {1 +
(γTZ− 1)dOC} times smallerthan its SC companion. Its
stresses are also concentrated to onlya few remaining
components.
D. Alternate Cascaded Topology
The aforementioned discussions have clarified that the
generalizedSL and SC inverters produce the highest gains
and havebetter spread of stresses among their components.
Spreading ofstresses however does not happen with
capacitors C1 and C2drawn in Fig. 3(a) for the SL
topology, and inductors L1 and L2in Fig. 3(b) for the SC
topology. According to (3) and (4), them capacitors and
inductors must withstand high voltagesand currents,
respectively, as γSLincreases. They should,therefore, be
implemented using higher rated components orseries–
parallel
combinations
of
lower
rated
components.Unfortunately, for series connection of
capacitors in the SLtopology, voltage sharing varies with
internal parameters withthe smallest capacitance enduring
the largest voltage drop. Itis, therefore, not as attractive as
the alternate cascaded Z-sourceinverter shown in Fig. 6,
where according to expressions derivedin [16], better
balances voltages among the capacitors, inductors,and
diodes.
Fig. 6. Topology of alternate cascaded Z-source inverter.
Gain of the alternate cascaded topology is
howeverlower, and it is in fact the same as that of the
voltage-type trans-Z-source inverter. That means the same
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as (9) after replacingγTZwith the number of Z-source
networks in cascade NCas.To produce the same denominator
as in (3) for the SL topology,NCasshould hence be equal to N
+ 1.
That gives NCas + 1 =N + 2 inductors for the
alternate cascaded topology, and 2 ×(N + 1) inductors for the
SL topology. The former uses Nlesser inductors, and is
therefore more attractive if its gain reductionof usually lesser
than half is acceptable. Performing thesame comparison for
the current-type generalized SC inverteris unfortunately not
possible here since the alternate cascadingtechnique does not
apply to the current-type inverter.
E. Overall Comparison
The earlier derived equations for all four inverters are
summarizedin Table I for easier reference. They can further
be plottedto give a clearer overview of the inverter
performances. Thefirst parameter plotted is the dc-link
voltage, which also givesthe switch stress experienced by the
inverter bridge. Accordingto [13], this parameter should more
appropriately be normalizedwith the minimum dc-link
voltage Vdc,refdemandedtraditional VSI for producing the
same ac output voltage atM= 1.15. To a reasonable extent,
this represents the extracost that each inverter must pay, as
compared to the traditionalVSI.
TABLE I
Comparison of voltage-type boosting techniques for z-source
inverters
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capacitorand diode voltage stresses (sums of all capacitor
and diode voltages)for the four inverters shown in Fig. 8.
Because of its higherdiode count, the SL inverter has the
highest total diode stress,while the trans-Z-source and
alternate cascaded inverters havethe lowest. The total
capacitor voltage stress of the SL inverter(and TL inverter)
is however lower than the trans-Z-source andalternate
cascaded inverters. For that, it is important to note thatfor
the trans-Z-source inverter, although only one capacitor
isshown in Fig. 5(a), its capacitance is two times bigger
than eachcapacitance used for the SL and TL inverters [21].
That causesits total capacitor stress to be higher in Fig.
8(a). Combining theunderstanding gained so far, it is
appropriate to comment that theSL and alternate cascaded
inverters are attractive topologies forspreading stresses if
higher rated components are not available.Their combined
stresses are however not necessarily lower.
SIMULATION RESULTS
Simulations in MATLAB/Simulink were next performed
forthe four voltage-type Z-source inverters compared in
Section IV.Input voltage to each inverter was set to 100V
for eventuallypowering a three-phase ac RL load of 20 Ω
and 5 mH. The samecontrol parameters of dST = 0.15 and
M = 0.8 × 1.15 wereused for all four cases with their
results shown from Fig. 9–12. Observations noted from
these figures are summarized asfollows:
1) Peak dc-link voltages of the SL and TL inverters are
higherthan those of the trans-Z-source and alternative
cascadedtopologies even after setting NCas = N + 1 = γTL
+ 1 =γTZ = 3 to equalize their denominators in (3) and (9).
Theamount higher is less than twice, as predicted from
(10).
2) The single diode found in the trans-Z-source inverter
hastosustain the highest reverse voltage. Blocking
voltagesof the diodes in the TL inverter are also
comparably higherthan the SL and alternate cascaded
inverters [see (7), (8),and (11)].
alternate cascaded inverters [see (7), (8),and (11)].
The resulting plot is shown in Fig. 7(a), where the SL andTL
inverters are clearly having lower switch stresses than
thetrans-Z-source and alternate cascaded inverters.Voltages
across each capacitor and diode (only maximumdiode voltage
considered if there is more than one diode) for thefour
inverters are also plotted in Fig. 7(b) and (c), after
beingnormalized with Vdc consistency. The results show
betterspread of stresses among the capacitors and diodes for
the alternatecascaded inverter followed by the generalized SL
I nverter.The findings are different when viewing at the total
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Fig. 7. Individual (a) switch stresses, (b) capacitor voltages,
and (c) diode voltages experienced by SL, TL, trans-Z-source,
and alternate cascaded inverters(NCas = N + 1 = γTL + 1 =
γTZ = 3).
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Fig. 8. Total (a) capacitor and (b) diode voltage stresses
experienced by SL, TL, trans-Z-source, and alternate
cascaded inverters (NCas = N + 1 = γTL +1 = γTZ = 3).
3) Low-voltage windings of the TL and trans-Z-source
invertersare observed to carry high instantaneous
currentscaused by the interruptions of their companion
highvoltagewindings.
4) Capacitor and diode voltages of the alternate
cascadedtopology are comparably lower, allowing more
lowerrated components to be used if higher rated ones are
notobtainable.
These observations are in agreement with earlier
predictions,and have demonstrated the higher gain of the
generalized SLZ-source inverter,while not overstressing
any of its components.Similar observations would be
applicable to the generalized SCinverter even though its
comparison with other techniques isnot possible because of
either nonexistent or different operatingprinciples, as
highlighted in Section IV.
Simulations were next repeated for the four
inverters toproduce a graph for efficiency comparison.
Relevant parametersread from datasheets and websites
(Magnetics Inc.,BHC Aerovox Ltd., Infineon Technologies
AG, and InternationalRectifiers) and used for the loss
computation weretabulated in Table II with some
clarifications provided asfollows:
1) topological parameters of the inverters were still kept
asNCas = N + 1 = γTL + 1 = γTZ = 3;
2) Inductors and transformers of the four inverters
werewound with the same total number of turns to give
roughlythe same combined (magnetizing) inductance;
3) lower rated capacitors were used for the alternate
cascadedinverter. Depending on how much cheaper
thelower rated capacitors can be, their capacitances can
beincreased appropriately if needed (higher capacitance
haslower equivalent series resistance);
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Fig. 9. Simulation results for generalized SL Z-source
inverter [see Fig. 3(a)].
Fig. 10. Simulation results for TL Z-source inverter (see Fig.
4).
Fig. 12. Simulation results for cascaded Z-source inverter
[see Fig. 6].
4) losses of insulated gate bipolar transistors in the
inverterbridge were obtained through simulation based on
themethod introduced in [22].
The obtained plot is shown in Fig. 13, where it can be
seenthat efficiencies of trans-Z-source, alternate cascaded,
and TLinverters can be higher at lower gain. The scenario
reverses athigher gain with the generalized SL inverter having
the highestand the trans-Z-source inverter having the lowest
efficiency. The
Fig. 13.Efficiencies of voltage-type Z-source inverters.
TABLE II
PARAMETERS USED FOR EFFICIENCY
COMPUTATION
Fig. 11. Simulation results for trans-Z-source inverter [see
Fig. 5(a)].
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[4] G. Sen and M. E. Elbuluk, “Voltage and currentprogrammed modes incontrol of the Z-source converter,”
IEEE Trans. Ind. Appl., vol. 46, no. 2,pp. 680–686,
Mar./Apr. 2010.
[5] O. Ellabban, J. V. Mierlo, and P. Lataire, “Control of a
bidirectionalZ-source inverter for hybrid electric vehicles
in motoring, regenerativebraking and grid interface
operations,” in Proc. IEEE Electr. Power EnergyConf.,
Aug. 2010, pp. 1–6.
[6] S. Rajakaruna and L. Jayawickrama,
“Steady-state
analysis
and
designingimpedance network of Z-source
inverters,” IEEE Trans. Ind. Electron.,vol.
57, no. 7, pp. 2483–2491, Jul. 2010.
(a)
(b)
Fig. 14. Experimental generalized (a) SL and (b) SC inverter
setups.
VII. CONCLUSION
To understand the elementary SL topology, the generalizedSL
and SC Z-source inverters are derived. Their operating
principlesare explained with their gains proven to be much
higherthan those of the traditional Z-source inverters using
LC filter. Their modulationratios can be set higher to better
utilize their dc links,and to keep their component stresses
lower. Simulations haveconfirmed these advantages, and
experiments have verified theinverter practicalities.
REFERENCES
[1] F. Z. Peng, “Z-source inverter,” IEEE Trans. Ind. Appl.,
vol. 39, no. 2,pp. 504–510, Mar./Apr. 2003.
[2] P. C. Loh, D. M.Vilathgamuwa,Y. S. Lai, G. T. Chua,
andY.W. Li, “Pulsewidthmodulation of Z-source inverters,”
IEEE Trans. Power Electron.,vol. 20, no. 6, pp. 1346–1355,
Nov. 2005.
[3] J. Liu, J. Hu, and L. Xu, “Dynamic modeling and analysis
of Z-sourceconverter—Derivation of ac small signal model
and design-oriented analysis,”IEEE Trans. Power Electron.,
vol. 22, no. 5, pp. 1786–1796, Sep.2007.
IJPRES
JAVABUDLAMARUTHI currently pursuing his M.Tech
in Power Electronics from
JNTUA University,
Anantapur. He had done his B.Tech degree from
SrinivasaRamanujan
Institute
of
Technology
Affiliated
to
JNTUA
University, Anantapur in 2012 and his field
of interest includes Power Electronics.
Mail id: Maruthijavabudla@gmail.com
V.PRATAPA RAO has completed his B.Tech in Electrical
& Electronics Engineering in 2003 from R.G.M college of
engineering and technology affiliated to JNTUH
University, M.TECH in Power Systems from AITS
Rajampet affiliated to JNTUA University, and presently he
is interested to reach topics includes power system
especially in ELECTRICAL DISTRIBUTION SYSTEM,
working as Assistant Professor and HOD of EEE
department at SRI SAI INSTITUTE OF
TECHNOLOGY
AND
SCIENCE,
Affiliated to JNTUA university, Rayachoty,
Kadapa (dist), Andhra Pradesh, India.
Mail id:vallabai.pratap@gmail.com
D.CHINNA DASTAGIRI has completed
his B.Tech Electrical & Electronics Engineering in 2006
from Sri Sai institute of technology and science, affiliated
to JNTUA, M.TECH in Power SYSTEM from NIE
MYSORE, 2009 working as Assistant Professor at Sri Sai
institute of technology and science, RAYACHOTY,
Andhra Pradesh, India. His area of interest includes power
system.
Mail id:chinnadastagiri.d@gmail.com
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