The diode is a two terminal device it has a limited applications;
Three terminal devices ( transistors ) are more useful; they are used in multitude of applications:
 signal amplification,
 digital logic
 memory, …..
Basic principle of operation is:
The voltage between two terminals control the current flowing in the third terminal:
V
12
I
3
1.
Transistors can realize controlled source
2.
In extreme case I
3
change from 0 → large value: to realize a switch
1
V
12
3
I
3
Transistor
2

Two major types of transistors:
1.
Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)
2.
Bipolar Junction Transistor (BJT)
MOSFET is most widely used electronic device in ICs
Advantages of MOSFET compared to BJT
1.
Very small
2.
Relatively Simple fabrication process
3.
Need low power for operation
4.
Implementation of analog and digital functions without need for resistors

Field Effect (MOS) Transistor n-channel enhancement type MOSFET
Typically L = 1 to 10
 m, W = 2 to 500
 m, and the thickness of the oxide layer is in the range of 2 to 50 nm.

 p-type substrate (Body): support for IC
 two heavily doped n-type regions:
 n
+
Source
 n
+
Drain

Thin layer of SiO
2
; ( t ox
≈ 2 → 50 nm) insulator

Metal is deposited on top of the oxide to form the gate electrode

Metal contacts to Source , Drain and substrate ( Body )
Four terminal are made to the device:
( G ) ( S ) ( D ) ( B )
In modern MOSFET devices Polysilicon is used instead of metal.

Operation with no gate Voltage
With no voltage applied to the gate:

Two back to back pn junctions between D and S

This prevent current conduction from D to S

The path between D and S has very high resistance ~ 10
12
Ω
S D
V
DS

Creating a channel for current flow
Source and Drain Grounded and v
GS
> 0:
1.
holes are repelled from region under the gate
→ depletion region
2.
electrons are attracted from n
+
regions into the channel region → accumulation of e
-
3.
the concentration of these e
-
increase with v
GS
4.
an n region is created connecting D and S

Applying v
DS
causes current to flow through this induced n region ( e
-
carry the current)

This n region forms a channel →
 n-channel MOSFET or NMOS
An n channel is induced at the top of the substrate beneath the gate.
Induced channel also called inversion layer v
GS v
GS
V t
≤ V
> V t t
No channel
Induced channel
≡ threshold voltage


For n-channel V t
is positive

V t
is controlled during device fabrication

Typically V t
≈ 0.5 V to 1.0 V

Gate and Channel forms a parallel plate capacitor:

V
GS
> 0 →

+ Q on gate
 – Q in the channel ( accumulated e
-
)

Electric field develops in the oxide

It controls amount of negative charge ( accumulated e
-
)

It determines the channel conductivity and current flow
Reason for the name: Field Effect Transistor
V
GS
Oxide

v
DS
 v
GS
> V t
A channel is induced
 Apply small v
DS
(0.1 → 0.2 V)
 v
DS
causes a current i
D to flow through the induced n-channel
 i
D
is carried by e
-
travelling from S → D
 ⇒ i
D
from D → S.
The magnitude of i
D depends on the density of e
-
in the channel
The density of e
-
depends on the magnitude of v
GS i
D
= i
S i
G
= 0

1.
At v
GS
= V t
2.
As v
GS
> V t
channel just induced
⇒ 𝑖
𝐷
more e
-
~0
accumulate in channel i.
⇒
like increase in channel depth ii.
⇒
channel conductance becomes higher

v
GS
V t
)
v
GS
V t
) ≡ excess gate voltage
Effective voltage
Overdrive voltage 𝒊
𝑫
∝ (𝒗
𝑮𝑺
− 𝑽 𝒕
)
and 𝒊
𝑫
∝ 𝒗
𝑫𝑺 i
D
(mA)
Curves show: MOSFET is operating as a linear resistance r
DS
Value of r
DS
controlled by v
GS
 v
GS
≤ V t
⇒ 𝒓
𝑫𝑺
≅ ∞
 as v
GS
exceeds V t
value of r
DS
is decreased
Increasing v
GS
above V t
enhances the channel
⇒
Enhancement mode operation and Enhancement-type MOSFET v
GS

V t

2 v
GS

V t

1 .
5 v
GS

V t

1 v
GS

V t

0 .
5 v

GS
V t v
DS
(mV)

v
DS
Let v
GS
> V t
be held constant:
 v
DS
appears across the length channel

At the Drain the voltage is v
DS
 the voltage drops gradually along the channel

At Source the voltage is zero

Voltage difference between Gate and points along the channel decreases from:
 v
GS
– 0 = v
GS
at the Source end
 to v
GS
– v
DS at the Drain end
 and varies gradually between the two ends

Depth of channel at any point depend on this difference
⇒
Channel is no longer uniform

Channel is tapered: Deepest at Source end
Shallowest at Drain end
V t
=1 V
V
GS
= 4 V
S
0 0.5
G
1
V
GS
1.5
2
V
DS
= 2 V
D
V
DS

v
DS
As v
DS
is increased
⇒

Channel becomes more tapered
 Its resistance increases

The i
D
– v
DS
curve bends gradually as shown
When v
DS
reaches the value such that: v
GS
- v
DS
= V t
or v
GD
= V t
or v
DS
= v
GS
- V t
The channel depth at the drain end is nearly zero:
The channel is pinched off
Any increase of v
DS
beyond this value has little effect on the channel shape
⇒ i
D remain constant at the value reached for v
DS
= v
GS
- V t i
D saturates the MOSFET enters saturation region
V t
=1 V
V
GS
= 4 V
S
0
G
0.75 1.5
V
GS
2.25
3
V
DS
= 3 V
D
V
DS
The voltage v
DS
where saturation begins is denoted v
DSsat
:

v
DSsat
v
GS
V t
Two distinct regions of operation: 1- v
DS
≤ v
DSsat
2- v
DS
≥ v
DSsat

NMOS
V t
> 0 v
GS
≤ V t
No channel v
GS
> V t
Induced channel
1v
DS
≤ v
GS
- V t triode region
2v
DS
≥ v
GS
- V t saturation region v
GS
positive; v
DS
positive
PMOS
V t
< 0 v
GS
≥ V t
No channel v
GS
< V t
Induced channel
1v
DS
≥ v
GS
- V t triode region
2v
DS
≤ v
GS
- V t saturation region v
GS
negative; v
DS
negative

Cross section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n -type region, known as an n well. Another arrangement is also possible in which an n -type body is used and the n device is formed in a p well.