Analysis of Control Strategies for a 3 Phase 4 Wire
Topology for Transformerless Solar Inverters
W.-Toke Franke, Claudia Kürtz, Friedrich W. Fuchs
Institute of Power Electronics and Electrical Drives
Christian-Albrechts-University of Kiel
Kaiserstr. 2 24143 Kiel, Germany
Phone: +49 431 8806106 Fax: +49 431 8806103
Email: tof@tf.uni-kiel.de, fwf@tf.uni-kiel.de
URL: http://www.tf.uni-kiel.de
Abstract—Three different current control strategies including
P+Resonant controller, PI-controller in dq0-reference frame and
hysteresis controller for a three-phase-four-wire solar inverter
are investigated and compared concerning their influences on
the leakage current at the solar array, the grid harmonics, the
step response and the resulting power losses in the power devices.
I. I NTRODUCTION
During the last years many topologies of solar inverters have
been proposed [1]–[5]. In general, they can be classified into
topologies with and without a transformer. The advantages
of the transformerless topologies are higher efficiency and
less volume which are the reasons to select these topologies
for the marked. However, the lack of the transformer also
leads to some drawbacks: The main problems are the leakage
currents between the solar panel and earth. These leakage
currents are a risk for humans touching the panel.Another
point is that for many solar systems the output voltage of
the solar array is smaller than the required DC link voltage.
The voltage can easily be boosted by a transformer [6]. In
case of a transformerless topology the voltage has typically
to be boosted by a DC-DC converter. Because of the leakage
current at the PV arrays, typically three single phase converters
are connected in parallel to achieve the three phase grid
connection. In case that a three phase topology is applied, it is
essential for low leakage current to connect the midpoint of the
DC link to neutral (earth). Typically, the neutral point clamped
(NPC) and the voltage source inverter with split capacitors and
earthed midpoint are used [4].
In this paper the three phase four wire topology is proposed
and analysed. The fourth wire that connects the midpoint
of the DC-link to neutral leads to three independent phases
which have to be controlled individually. For that purpose,
three different control strategies are proposed and investigated
concerning their influence on grid harmonics, leakage current,
efficiency of the inverter and step response.
The paper is structured as following: In section II the
system is described. In the next section the investigated control
strategies are proposed. In sections IV and V simulation and
experimental results are presented. In the last section there is
a conclusion.
978-1-4244-6391-6/10/$26.00 ©2010 IEEE
Figure 1.
Solar inverter with earthed dc link midpoint
Table I
E XEMPLARY ELECTRICAL DATA OF THE PV ARRAY
open circuit voltage
max. MPP voltage
MPP range
max. Power
1000 V
800 V
500 - 800 V
5 kW
II. S YSTEM D ESCRIPTION
The variable output voltage of the PV array is fed to the
grid by the inverter topology given in figure 1. The system is
based on a PV array with the data given in table I. However
the results are also valid for other PV arrays. It consists of
a voltage source inverter (VSI) and a boost converter (BC)
in the DC link to cover the whole voltage range of the solar
array. The MPP tracking is realized by both the BC for low
and by the VSI for high input voltages. The connection to the
grid is realized via an LCL filter. Special about this topology
is the fourth wire which connects the midpoint of the split DC
capacitors with the neutral phase of the grid. The advantage of
the fourth wire is a great reduction of the leakage current at the
PV array that arises due to the variation of the dc link potential
to ground generated by the switching pattern. Assuming that
the grid is y-connected the midpoint of the DC link has four
different potentials to ground during one switching period.
During one of the two zero-states all three phases of the grid
are short circuited by having all upper devices conducting
and the lower ones blocking or vice versa. In this state the
upper or lower rail of the DC link is connected to ground
658
so that the midpoint of the DC link is at ± VDC
2 . During the
active states one device of each phase is conducting whereas
at least one of them is in the upper half and one is in the lower
half. In case that two upper devices and one lower device are
conducting two phases are switched in parallel and connected
to the upper DC link rail. Thus the voltage drop across the
upper DC link rail of the load is only half of the voltage
drop of the phase that is connected to the lower DC link rail.
That leads to a midpoint voltage of the dc link to ground
VDC
of − VDC
6 and to 6 in case that two devices in the lower
half are conducting. The reduction of the leakage current by
connecting ground and the midpoint of DC link is given by
CPV
the factor of 2C
. However the fourth wire also leads to two
DC
√
drawbacks. The first is that the DC link voltage has to be 2/ 3
higher than for the system without the fourth wire to deliver
the same grid voltage. The second issue is that the widely used
current control strategy in rotating dq-reference frame is not
feasible since the three phases are independent. In the next
section three suitable current control strategies are proposed
and compared concerning their influence on the efficiency, the
harmonic distortion and leakage current at the PV array to
each other. The LCL filter is designed according to [7].
1
After the PI control block the signal is inverse transferred for
the PWM generation by
1 !
r
√
1
0
2 2
i1
cos θ − sin θ 0
id
√
2
3
1
1
√
−2
i2 =
sin θ
cos θ
0
iq
. (3)
2√
2 2
3 − 1 − 3 √1
i3
0
0
1
i0
2
2
2 2
Figure 2 shows the control structure. The DC link voltage is
controlled by a PI controller. The output of the DC link voltage
controller is the d-component for the current controller. The
q- and 0-component are set to zero for this investigations. The
inverter states are generated by a sine-triangular PWM.
G1
2
C2
G2
C3
G3
DC
DC2
3
f1-3
DC
d
q
0
0
q
d
Figure 2.
frame
III. C URRENT C ONTROL S TRATEGIES
The current control strategies can be divided into linear
and non-linear approaches. Since the investigated topologies
consist of a three phase four wire system, the most promising
linear control schemes are the control in dq0-reference frame
and the resonant control, where every phase is controlled
individually. As a non-linear control technique the hysteresis
controller is investigated. For both linear control strategies the
same method for generating the PWM pulses can be applied.
In contrast the hysteresis control delivers directly the pulse
pattern.
A. PI Current Control in dq0-Reference Frame
The standard PI controller in the form of
1
GPI = KP + KI ·
(1)
s
has an infinite open loop gain at 0 Hz. For that reason the
steady state error can only be eliminated for DC signals. On
account of this the AC signals have to be transferred into DC
signals in a rotating reference frame by
1 −1 −1 ! r i1
id
√2
√2
2 cos θ sin θ 0
3
− sin θ cos θ 0
i2
iq =
0
− 23
(2)
2
√1
√1
√1
3
0
0
1
i3
i0
2
2
2
C1
DC1
Control structure of the PI current controller in dq0 reference
Figure 3.
P-resonant controller
Figure 4. Frequency response characteristic of the open loop p-resonant
controller
B. Resonant Control
The resonant controller is a generalized PI controller that is
able to control not only DC but also AC variables. Figure 3
shows the structure of the resonant controller according to [3],
[8]–[10]. In addition to a forward integrator there is another
integrator in the feedback loop. The transfer function is given
by
s
.
(4)
GPR = KP + KI · 2
s + ω20
Figure 4 shows the bode diagram of the resonant controller
for a resonance frequency of 50 Hz. At 50 Hz there is an
infinite open loop gain and thus it is able to eliminate the
steady state error at this frequency. If ω would be zero the
resonant controller has the same structure as the well known
PI controller.
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Figure 5.
Functionality of the hysteresis control
1
Figure 7. Leakage current reduction by connecting the midpoint to earth
(top), leakage current with the fourth wire connencted (bottom)
2
A. Leakage Currents
3
1
Figure 6.
2
3
Control structure of the hysteresis controller
The control structure is similar to that of the PI control in
dq0-reference frame in figure 2. Only the current PI controller
is substituted by the P-resonant controller and therefore the
output signal of the voltage controller is transferred into the
abc-reference frame. The outputs of the current controller can
now directly be transferred to the PWM unit.
C. Hysteresis Control
In this investigation a standard hysteresis controller with
variable frequency is used. Therefore for each phase a tolerance band of a given amplitude 2h is allocated around the
phase current. If the phase current exceeds the tolerance band
the converter switches its state into the opposite direction. This
functionality can be seen in figure 5. Since the amplitude of the
tolerance band is given and because the sinusoidal grid voltage
leads to a variable counter voltage and thus to a variable
gradient of the current, the switching frequency depends on the
actual value of the grid voltage. To achieve the same average
switching frequency fs,av in the nominal operating point as
for the other control strategies the magnitude of the tolerance
band h is adjusted by [11]:
VDC
Mn2
2h =
1−
(5)
4 · LC · fs,av
2
There Mn is the modulation index in the nominal operating
point.
IV. S IMULATION R ESULTS AND C OMPARISON
All three control strategies have been investigated by simulation with MATLAB Simulink and Plecs. The power circuit
is implemented in Plecs for a detailed analysis of the leakage
current and power losses. For the simulation the same parameters are used as for the experimental setup, given in table
II.
Before comparing the different control methods to each
other a simulation shall clarify, how the leakage currents
are reduced by the split DC capacitors C3 = C4 = 1000µF.
Therefore, a simulation test with and without earthed midpoint
is done for a parasitic solar array capacity of 150 nF for 1 kW
according to [5]. The results are given in figure 7 for the
P+resonant controller, where the fourth wire is connected at
50 ms to ground. However the results look similar for the
other control strategies. Without the fourth wire the leakage
currents rise up to a value of 5 A whereas it is reduced to about
1.5 mA (Fig. 7 bottom) when the fourth wire is connected to
the midpoint of the split capacitor. The current ripple is 20
kHz.
B. Influence on Grid Harmonics
To clarify the influence of the proposed control strategies
on grid harmonics the resulting grid currents have been analyzed. For this purpose a sinusoidal reference voltage replaces
the grid in simulation. In the case that an ideal sinusoidal
waveform is used no harmonics greater than 0.1% show up.
Figure 8 shows the harmonic spectrum when a non ideal
sinusoidal waveform is utilized. Here on each of the third, fifth
and seventh harmonic a disturbance of 1.5% is superimposed.
The red stems describe the maximum allowed harmonics
concerning DIN VDE 0126-1-1. The P-resonant control performs similar to the PI control in dq0-reference frame. Both
control methods slightly amplify the given harmonics. No
other harmonic numbers appear. With the hysteresis control the
given harmonics are attenuated but other harmonic numbers
are added even though they are only insignificant.
C. Step Response for Optimal Control Parameters
Figure 9 displays the step responses to a step of the DC
link power. Here, the d-component of the output current is
depicted, whereas the value is normalized to 1. Therefore
the output currents are transferred in dq0-reference frame
for measurement reasons. Comparing the time period until
the system is in steady state, both the PI controller in dq0reference frame as well as the P+resonant controller take 4 ms
660
a)
b)
c)
Figure 8. Harmonics current spectrum with a disturbed grid voltage (1.5 % of the 3rd, 5th and 7th added) for a) PI controller in dq0 reference frame; b)
P-resonant controller; c) hysteresis controller
1.5
1
0.5
0
−0.5
0.01
0.015
0.02
t in s
0.025
0.03
1.5
1
Figure 10.
0.5
Efficiency of the inverter with different control strategies
0
−0.5
0.01
0.015
0.02
t in s
0.025
0.03
Figure 9. Step responses top: PI control in dq0 reference frame, middle:
P+resonant, bottom: hysteresis
due to the LCL filter. Applying the hysteresis controller the
overshoot subsides after approximately 1.5 ms. After that there
is some ringing for another 4 ms. The faster step response
results in a higher overshoot of the current of 55%. Whereas
the p-resonant controller only has 25% and the PI control in
dq0-reference frame has even less with 22%.
D. Power losses and Efficiency
To demonstrate the efficiency of the analyzed control structures it is simulated at different input power. Therefore the DC
link voltage is kept constant at 800 V and the input current is
adjusted between 0.625 A and 6.25 A. The examined power
losses are the conducting and switching power losses of the
IGBTs and diodes. They were simulated by means of a thermal
simulation in Plecs. Therefore the switching and conducting
losses were measured on a real device at different temper-
atures, blocking voltages and currents [12]. After that, these
results have been implemented in the Plecs model. The results
are presented in figure 10 and show promising values between
94, 5% and 97.6% depending on the current and control
strategy. The highest efficiency is achieved by the hysteresis
controller since the highest switching frequency occurs when
the magnitude of sinusoidal output current is at its minimum.
For the maximum current only low switching frequencies
occur. The two linear control methods show very similar
efficiencies because both lead to the same PWM-pattern. Due
to the constant switching frequency their efficiency is lower
than for the hysteresis control. Here, some improvements may
be achieved by applying a discontinuous PWM method by
injecting the third harmonic. This will lead to a 50% reduction
of the switching losses since the highest current carrying IGBT
is turned on permanently for 1/6 switching period [13].
V. E XPERIMENT R ESULTS
For the experimental results a three phase four wire VSI
inverter has been built up on PCB (figure 11). The focus
was on a circuit with lowest stray inductances to enable high
switching frequencies and short turn-on and turn-off times.
The output filter is an LCL filter designed concerning to [7].
The input voltage is delivered by a solar simulator that is on
the one hand able to produce a fixed DC voltage and on the
other hand can deliver a current and voltage according to a
given V/I-characteristic of a solar array. The control of the
inverter is realized on a TriCore µ-controller from Infineon
Technologies. The significant parameters of the experimental
setup are given in table II.
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Figure 11.
Experimental solar converter setup: PCB of the converter,
measurement unit and LCL filter bottom
Figure 12. Solar inverter, control in dq reference frame: DC-link voltage
100 V/div (Ch 1), AC contents of the voltage across CPV (Ch 2) grid current
5A/div (Ch 3) and leakage currents 200 mA/div (Ch 4)
Table II
PARAMETERS OF THE EXPERIMENTAL SETUP
Input voltage
Input power
DC-link Capacitance
Semiconductors
Switching frequency
Converter side inductor
Grid side inductor
Filter capacitor
500 - 1000 V
5000 W
660 µF
IKW08T120
20 kHz
three powder cores 2.6 mH
laminated steel 0.5 mH
4.4 µF
A. Leakage Currents
Figures 12, 13 and 14 show the leakage current through
a 450 nF capacitor connected to ground for the control in
dq0-reference frame, the P+resonant control and the hysteresis
control, respectively. The output current in each phase is 5
Arms . The leakage current consists of a ringing of 200 mA for
operating with the linear control strategies and about 100 mA
for the hysteresis controller. The rms values are 78.8 mA, 81.3
mA and 43.1 mA, respectively and therefore well below the
allowed 300 mA concerning VDE 0126-14-2. Compared to
the simulation results the leakage current is significant higher.
The reason is that in the simulation ideal capacitors for the
DC link are applied. For the experimental test the DC link
consists of electrolyte capacitors with not negligible parasitic
inductances and resistances, while for CPV a film capacitor
with much lower parasitic effects is used. This leads to higher
equalizing current through this path. It is expected that for real
solar arrays the leakage current is lower.
Figure 13. Solar inverter, P+resonant controller: DC-link voltage 100 V/div
(Ch 1), AC contents of the voltage across CPV (Ch 2) grid current 5A/div (Ch
3) and leakage currents 200 mA/div (Ch 4)
has switching frequency that is between 2.5 kHz and 30 kHz
and therefore not visible in the first 40 harmonics. The THD
is calculated to 1.2 % for the first 40 harmonics and to 7.7 %
for the total spectrum.
C. Efficiency
The measured power losses for all proposed control strategies are shown in figure 16. The efficiency is calculated from
the measured input and output power of the inverter that
is done by the DEWETRON 2010. Its power accuracy is
B. Harmonic spectrum
The measured harmonic spectra for the three control strategies are given in figure 15. It is obvious that the spectra for the
current control in dq-reference frame and with the P+resonant
controller have a similar appearance, since the same switching
frequency, grid filter and pwm modulation are applied. The
THD values are calculated to 3.074 % and 2.966 % for the
current control in dq0 reference frame and for P+resonant
controller, respectively. For the hysteresis controller for most
frequencies the spectrum is smaller as for the other two control
strategies, even though the current has much higher ringing as
shown in figure 14. This is caused by the fact that the ringing
Figure 14. Solar inverter, Hysteresis controller: DC-link voltage 100 V/div
(Ch 1), AC contents of the voltage across CPV (Ch 2) grid current 5A/div (Ch
3) and leakage currents 200 mA/div (Ch 4)
662
controller leads to the lowest losses but depicts a wide harmonic spectrum due to the variable switching frequency. The
behavior of the PI controller in dq0 reference frame and the
P+Resonant controller show very similar results. Regarding the
processing power of the µ-controller the P+Resonant controller
has some advantages compared to the PI controller due to
lack of the dq0-transformation. The switching losses for the
linear control strategies can be reduced by applying loss
optimized modulation strategies, which however will lead to
higher harmonics in the grid current.
ACKNOWLEDGMENT
Figure 15.
Harmonic current spectra of the investigated control strategies
This work is sponsored by the Rainer Lemoine Stiftung
(RLS).
R EFERENCES
Figure 16.
Measured efficiencies with DEWE2010
determined to about 0.5 %. For both linear strategies the same
results are achieved, since they lead to the same switching
pattern. Due to the IGBTs with their current independent
forward voltage drop and fix power losses caused by balancing
resistors for the DC link capacitors, the efficiency is reduced
for very low input power but increases up to 2.5 kW. After
that it starts to decrease slightly. For the hysteresis controller
the grid filter was changed to an L-filter with 4.5 mH, due
to the ringing of the output current. Using damping resistors
would lead to lower efficiency compared to the larger Lfilter. The power losses for the hysteresis control depend very
much on the input power. The spectrum has shown that the
average switching frequency increases with the reduction of
the modulation index, leading to increasing switching losses.
This also approves (5). For the input power above 2.5 kW
the average switching frequency is already reduced to 5 kHz.
This explains the better efficiency of the hysteresis controller
compared to the other controllers.
VI. C ONCLUSION
Three different current control strategies (P+Resonant, PI
in dq0-reference frame and hysteresis controller) for a three
phase four wire solar inverter have been investigated. A special
attention was given to the leakage current at the solar array and
the resulting power losses as well as on the harmonic distortion
of the grid current. The leakage current is reduced effectively
by the earthed midpoint of the DC-link capacitors for all three
control strategies. It could be concluded that the hysteresis
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