IEEE/PES WM Panel on Modeling, Simulation and Applications of FACTS Controllers in Angle and Voltage Stability Studies, Singapore, Jan. 2000
Power Flow and Transient Stability Models of FACTS Controllers
for Voltage and Angle Stability Studies
Claudio A. Ca~nizares
University of Waterloo
Department of Electrical & Computer Engineering
Waterloo, ON, Canada N2L 3G1
c.canizares@ece.uwaterloo.ca
Abstract|This paper presents transient stability the system.
and power ow models of Thyristor Controlled Reactor
(TCR) and Voltage Sourced Inverter (VSI) based Flex- A. SVC
ible AC Transmission System (FACTS) Controllers.
The basic structure of an SVC operating under typical
Models of the Static VAr Compensator (SVC), the
Thyristor Controlled Series Compensator (TCSC), the bus voltage control is depicted in the block diagram of Fig.
Static VAr Compensator (STATCOM), the Static Syn- 1. Assuming balanced, fundamental frequency operation,
chronous Source Series Compensator (SSSC), and the an adequate transient stability model can be developed
Unied Power Flow Controller (UPFC) appropriate for assuming sinusoidal voltages [4]. This model is depicted in
voltage and angle stability studies are discussed in de- Fig. 2 and can be represented by the following set of p.u.
tail. Validation procedures obtained for a test system equations:
with a detailed as well as a simplied UPFC model are
also presented and briey discussed.
x
_
c
= f(xc ; ; V; Vref )
(1)
Keywords: FACTS, SVC, TCSC, STATCOM, SSSC,
_
UPFC, simulation, models, controls, transient stability,
2
2 , sin 2 , (2 , XL =XC ) 3
power ow.
B
,
e
XL
7
6
7
6
7
I. Introduction
0 = 66 I , Vi Be
7
4
5
The development and use of FACTS controllers for
2
Q , Vi Be
power transmission systems has led to the application of
|
{z
}
these controllers to improve the stability of power networks
g(; V; Vi ; I; Q; Be)
[1, 2]. Many studies have been carried out and reported
in the literature on the use of these controllers in a variety where most variables are clearly dened on Fig. 2, and xc
of voltage and angle stability applications, proposing di- and f() stand for the control system variables and equaverse control schemes and location techniques for enhanc- tions, respectively. These equations represent limits not
ing voltage and angle oscillation control [2].
the ring angle , but also on the current I, the
Several distinct models have been proposed to represent only on voltage
V and the capacitor voltage Vi , as well as
FACTS in static and dynamic analysis [3]. This report control
control
variables
other types of controllers such as a reacdescribes in detail some of the most appropriate models tive power Q control
scheme.
available for these types of studies with the following conThe
dierential
equations
represented by f() in (1) vary
trollers: SVC, TCSC, STATCOM, SSSC and UPFC rep- with the type of control system
used. Fig. 3 depicts a typresented in the system. These models allow the engineer ical voltage control block diagram,
includes a droop
to accurately and reliably carry out power ow and tran- to avoid continuous operation of thewhich
and to alsient stability studies of such system with its controllers. low for proper coordination with othercontroller
voltage
controllers
The latter is demonstrated in this paper by means of a in the network. It is important to highlight the fact that an
comparative study in a typical transient stability problem admittance model is numerically more stable than the coron a test system using a detailed UPFC model and the responding impedance model, i.e., using Be on the model
corresponding reduced model presented here.
numerical problems when close to the controller's
Section II describes in detail the models for TCR-based averts
resonant
[5]. The bias o for this controller is decontrollers, concentrating specically on the SVC and termined points
by
solving
the equations resulting from forcing
TCSC, and Section III discusses in detail the models for Be = 0 in (1), i.e., this
corresponds to the resonant
VSI-based controllers, namely, the STATCOM, the SSSC point of the SVC (I = value
0)
and
is obtained by solving the
and the UPFC. In Section IV, the test system used for nonlinear equation
validating some of these models as well as the comparative
results obtained for a detailed and the simplied model of
2o , sin 2o , (2 , XL =XC ) = 0
the UPFC are shown and discussed. Finally, Section V
The steady state V-I characteristics for this controller
briey summarizes the material presented in this paper as
well as discussing the limitations of the reduced models. are depicted in Fig. 4, and correspond to the well-known
control characteristics of a typical SVC [2]. A SVC steady
state model can be obtained by replacing the dierential
II. Modeling TCR-based Controllers
equations in (1) with the corresponding equations reprethe steady state characteristics; thus, the \power
Basic models for SVCs and TCSCs built around a TCR senting
ow"
equations
of the SVC in this case are
structure are described in this section. These models
"
are based on representing the controllers as variable imV , Vref + XSL I #
pedances that change with the ring angle of the TCR,
0 =
(2)
which is used to control voltage, current and/or power in
g(; V; Vi; I; Q; Be)
V
V
I
Filters
XL
X SL
α max
a:1
Switching
Logic
Zero
Crossing
α min
Vref
(αo )
Vi
XC
XC
C
L
Magnitude
α
Vref
I
Fig. 4. Typical steady state V-I characteristics of a SVC.
Controller
Fig. 1. Block diagram of a SVC with voltage control.
α = αmin
o
Vref >Vref
α < αmin
αmin< α < αmax
o
Vref =Vref
o
Vref <Vref
α > αmax
α = αmax
o
o
Vref >Vref
0 < Vref < Vref
Fig. 5. Handling of limits in the SVC steady state model.
which can be directly included in any power ow program,
as discussed in [5]. However, for the model to be complete,
all SVC controller limits should be adequately represented.
The proper handling of ring angle limits is depictedo in
Fig. 5 [5], where Vref is kept xed, say at a value Vref ,
until reaches a limit, at which point Vref is allowed to
change while is kept at its limit value; voltageo control is
regained when Vref returns to its xed value Vref .
B. TCSC
Fig. 6 shows the block diagram for a TCSC controller
operating under current control. The model for balanced,
fundamental frequency operation is shown in Fig. 7, and
can be represented by the following set of equations, which
includes the control system equations and assumes sinusoidal currents in the controller [5, 6]:
x_ c = f(xc ; ; I; Iref )
(3)
_
2
3
P + Vk Vm Be sin(k , m )
6
7
6
7
2
6 ,Vk Be + Vk Vm Be cos(k , m ) , Qk 7
6
7
6
7
0 = 66 ,Vm2 Be + Vk Vm Be cos(k , m ) , Qm 77
6
7
6 B , B ()
7
e
6 e
7
V
I
Filters
Q
a :1
Vi
Magnitude
Vref
Controller
α
Be(α)
Fig. 2. Transient stability model of a SVC.
αmax − αo
V
KM
1+ S TM
K (1+ S T1 )
+
V
KD+ S T2
ref
αmin− αo
Fig. 3. Basic SVC controller for voltage control.
4
∆α
+
+
αo
α
p
5
P + Qk , I Vk {z
}
g(; Vk ; Vm ; k ; m ; I; P; Qk; Qm ; Be)
where most variables are dened on Fig. 7; xc and f()
stand for the internal control system variables and equations; and
,
Be () = kx4 , 2kx2 + 1 cos kx ( , )=
,
XC kx4 cos kx ( , )
, cos kx ( , ) , 2 kx4 cos kx ( , )
|
2
2
Vk δ k
V δ
Vm δ m
C
I
Filters
θ
I
a:1
L
Vi
Switching
Logic
Zero
Crossing
Zero
Crossing
Magnitude
α
Switching
Logic
PLL
α
Magnitude
I ref
α
Controller
Fig. 6. Block diagram of a TCSC operating in current control mode.
Vref
m
(PWM)
Controller
C
V
dc
PWM
Vk δ k
P +jQk
Be(α)
-P +jQm
Magnitude
Vm δ m
Vdc
I
Magnitude
Fig. 8. Block diagram of a STATCOM with PWM voltage control.
α
I ref
III. VSI-based Controllers
Controller
Fig. 7. Transient stability model of a TCSC.
kx2 cos kx ( , ) , kx4 sin 2 cos kx ( , )
2
3
2
+kx sin 2 cos kx ( , ) , 4 kx cos sin kx ( , )
2
,4 kx cos sin cos kx ( , )
r
XC
XL
+2
kx
=
It is important to mention that as the controller gets closer
to its resonant point, the current deviates from its sinusoidal condition, and hence the model presented should
not be used to represent the controller under these conditions.
A simple PI controller with limits can be used to control the current directly through the ring angle ; in this
case, the dierential equations f() in (3) can be replaced
by the equations of the corresponding control system. Observe, however, that more sophisticated controls such as
impedance or power control can be readily implemented
on this model.
A steady state model for this TCSC controller can be obtained by replacing the dierential equations on (3) with
the corresponding steady state control equations. For example, for an impedance control model with no droop,
which yields the simplest set of steady state equations from
the numerical point of view [5], the \power ow" equations
for the TCSC are
"
0 =
Be , Beref
g(; Vk ; Vm ; k ; m ; I; P; Qk; Qm ; Be )
ref
#
(4)
As previously indicated, it is important to adequately implement the controller limits on the steady state model to
accurately represent its operation [5].
In this section, the basic models of the most common
VSI-based FACTS controllers, namely, the STATCOM,
SSSC and UPFC, are discussed. All the models presented
here are based on the power balance equation
Pac = Pdc + Ploss
which basically represents the balance between the controller's ac power Pac and dc power Pdc under balanced
operation at fundamental frequency. For the models to be
accurate, it is important to represent all losses of the controllers (Ploss ), especially those related to the inverters, as
discussed below.
Although PWM control is currently not practical in
typical high-voltage applications of VSI-based controllers,
given the limitations imposed by the high switching losses
of GTOs, there have been some new recent developments
on power electronic switches that will probably allow for
the practical use of PWM control techniques on these kinds
of applications in the near future [7]. The models discussed in this paper assume PWM control techniques are
assumed. These models are used to develop more general
models that can readily be adapted to represent phase angle control as well.
A. STATCOM
The basic structure of a STATCOM with PWM-based
voltage controls is depicted in Fig. 8. Eliminating the dc
voltage control loop on this gure would yield the basic
block diagram of a controller with typical phase angle controls.
Assuming balanced, fundamental frequency voltages,
the controller can be accurately represented in transient
stability studies using the basic model shown in Fig. 9
[8, 9, 10]. The p.u. dierential-algebraic equations (DAE)
corresponding to this model are
"
x_ c #
_
= f(xc ; ; m; V; Vdc; Vref ; Vdcref )
(5)
m_
2
V_dc = CV VI cos( , ) , R 1 C Vdc , CR VI
dc
C
dc
mmax(Imax ) - mo
V δ
I
Filters
θ
Vref
K ( 1 + S T1 )
KD+ S T 2
+
-
P+jQ
Magnitude
a:1
+
m
+
mmin (Imin ) - mo
KM
ac
mo
1 + S TM
ac
R+jX
Vref
α
Controller
k Vdc
α
V
k (PWM)
PWM
Vdc
C
RC
Vdc
Vdcref
αmax (Imax )− αo
+
KP +
-
KI
S
+
α
+
ref
Magnitude
Fig. 9. Transient stability model of a STATCOM with PWM voltage
control.
αmin (Imin )− αo
KM
dc
αo
1 + S TM
dc
Vdc
3
P , V I cos( , )
6
7
6 Q , V I sin( , )
7
6
7
6
7
6
2
0 = 66 P , V G + k Vdc V G cos( , ) 777
6 +k Vdc V B sin( , )
7
6
7
4
Q + V 2 B , k Vdc V B cos( , ) 5
+k Vdc V G sin({z, )
}
|
g(; k; V; Vdc; ; I; ; P; Q)
where most of the variables are explained on Fig. 9. The
admittance G + jB = (R + jX),1 , is used to represent
the transformer impedance, any ac series lters, and the
\switching inertia" of the inverterpdue to its high frequency
switching. The constant k = 3=8 m, is directly proportional to the pulse width modulation index m and xc
represents the internal control system variables.
A simple PWM voltage controller is shown in Fig. 10
[11, 12], which basically denes the dierential equations
represented by f() in (5). Observe that the ac bus voltage
magnitude is controlled through the modulation index m,
since this has a direct eect on the ac side VSI voltage
magnitude. Whereas the phase angle, , which basically
determines the active power P owing into the controller is
used to directly control the dc voltage magnitude since the
power owing into the controller charges and discharges
the capacitor. The controller limits are dened in terms
of the controller current limits, which are directly related
to the switching device current limits, as these are the
basic limiting factor in VSI-based controllers. In simulations, these limits can be directly dened in terms of the
maximumand minimumconverter currents Imax and Imin ,
respectively, i.e., the integrator blocks are \stopped" whenever the converter current I reaches a limit, which would
allow to closely duplicate the steady state V-I characteristics of the controller shown in Fig. 11. Another option is to
compute these limits by solving the steady state equations
of the converter; these equations are also used to compute
2
Fig. 10. Basic STATCOM PWM voltage control.
the biases mo and o [13].
The steady state model can be readily obtained from
(5) by replacing the dierential equations with the steady
state equations of the dc voltage and the voltage control
characteristics of the STATCOM (see Fig. 11 [2]). Notice
that the controller droop is directly represented on the
V-I characteristic curve, with the controller limits being
dened by its ac current limits. Hence, the steady state
equations for the PWM controller are
2
3
V , Vref + XSL I
6
7
6 Vdc , Vdc
7
ref
6
7
6
7
0 = 6
(6)
7
2 =R , R I 2
6 P , Vdc
7
C
4
5
g(; k; V; Vdc; ; I; ; P; Q)
A phase control technique can be readily modeled by
simply replacing the dc voltage control equation in (6)
with an equation for k, i.e., for a 12-pulse VSI, replace
0 = [Vdc , Vdcref ] with 0 = [k , 0:9] in the above set of
equations. In this case the dc voltage changes as changes,
thus charging and discharging the capacitor to control the
inverter voltage magnitude.
The limits on the current I, as well as any other limits
on the steady state model variables, such as the dc voltage
Vdc , the modulation ratio represented by k or the voltage
phase angle , can be directly introduced in this model. It
is important to properly represent the switching of control
modes when these limits are reached, as this is a significant factor for properly modeling FACTS controllers in
steady state studies [5]. Thus, the mode switching logic
depicted in Fig. 5 for the SVC can be readily modied
to represent the steady state control mode switching for
the STATCOM, by simply replacing the ring angle limits
with current limits.
Vk δ k
V
θ
I
Vm δ m
δ
V
a:1
β
Vi
Zero
Crossing
X SL
Switching
Logic
PLL
Magnitude
Vref
(mo ,α o )
I ref
β
C
m
(PWM)
Controller
V
dc
PWM
Magnitude
I
Imax
min
I
Fig. 11. Typical steady state V-I characteristics of a STATCOM.
B. SSSC
The basic controller structure for the SSSC operating
on current control mode is depicted in Fig. 12. The corresponding transient stability model is shown in Fig. 13 [9],
and can be represented by the following p.u. equations:
"
x_ c #
= f(xc ; ; m; I; Vdc ; Iref ; Vdcref )
(7)
_
m_
I2
V_dc = CV VI cos( , ) , R 1 C Vdc , R
CV
2
0 =
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
|
dc
C
Pk , Vk I cos(k , )
Qk , Vk I sin(k , )
Pm + Vm I cos(m , )
Qm + Vm I sin(m , )
P , Pk + Pm
Q , Qk + Qm
P , V 2 G + k Vdc V G cos( , )
+k Vdc V B sin( , )
Q + V 2 B , k Vdc V B cos( , )
+k Vdc V G sin({z, )
g(; k; Vdc ; Vk ; Vm ; V; k ; m ; ;
I; ; Pk ; Pm; P; Qk; Qm ; Q)
p
Vdc
Fig. 12. Block diagram of a SSSC with PWM current control.
Magnitude
Pm+jQm
V δ
I θ
Vm δm
a:1
aI θ
P+jQ
R+jX
I ref
k Vdc β
Controller
3
β
k (PWM)
PWM
Vdc
C
RC
Vdc
ref
Magnitude
Fig. 13. Transient stability model of a SSSC.
the phase angle and the capacitor voltage Vdc , i.e., the
current is controlled by direct control of the series voltage
V 6 . A more sophisticated dq controller to control the active and reactive powers on the line is discussed in the next
section for the series branch of a UPFC, which is basically
a SSSC.
The steady state model equations, for a PWM controller
with no droops, are then
}
where most variables are dened on Fig. 13, k = 3=8 m,
and xc and f() stand for the dynamic variables and equations of the control system, respectively. The basic VSI
model follows from the model developed for the STATCOM.
Dierent kinds of controls can be implemented for various controller variables. The simplest is a PI current controller that directly operates on the phase angle . The
PWM controller represented on the SSSC gures in this
report, indirectly controls the current I by operating on
Pk +jQk
Vk δk
dc
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
5
ref
2
0 =
6
6
6
6
6
6
6
4
I , Iref
Vdc , Vdcref
P , Vdc2 =RC , R I 2
g(; k; Vdc ; Vk ; Vm ; V; k ; m ; ;
I; ; Pk ; Pm ; P; Qk; Qm ; Q)
3
7
7
7
7
7
7
7
5
(8)
For a phase controller, the dc voltage equation is replaced
by an equation dening the variable k. Once again, it is
important to properly model the controller limits in order
to have an adequate steady state model of the SSSC.
Vk δ k
Vm δ m
Il θl
Ik θk
V
+
δ
V δl
Pl +jQl l
Vk δ k
Vm δ m
Pk +jQk
Line
ase: 1
I sh θ sh
ash: 1
V
Il θl
Ik θk
-
δ
+
-
R l +jX l
ase: 1
I sh θ sh
ase I l θ l
P se+jQ se
Psh+jQ sh
V δl
Pl +jQl l
ash: 1
Vise β
Vish α
+
C
R sh+jX sh
R se+jX se
Vdc
+ ksh Vsh α
-
α msh
β mse
+
-
Switching
Logic
Switching
Logic
+ kse Vse β
Pdc
Vdc
C
α ksh
RC
-
kse
β
UPFC CONTROLLER
UPFC CONTROLLER
Pl
ref
Ql
ref
Vdcref
Vkref Vk δ k Vl δ l Vdc
Fig. 14. Block diagram of a UPFC.
C. UPFC
As shown in Fig. 14, the UPFC can be viewed as a
STATCOM and a SSSC with a shared dc bus. The corresponding transient stability model reects this fact, as
shown in Fig. 15. Thus, the model equations then can
be dened as a combination of the STATCOM and SSSC
equations (5) and (7), respectively, as discussed in detail
in [12, 13, 14].
The shunt controller is basically the same as the one
described for the STATCOM above. A control system diagram for the UPFC's series branch is depicted in Fig. 16.
This controller, originally proposed in [15], is a PQ controller based on a dq-axis decomposition to decouple the
active and reactive powers of the inverter [11, 12, 14]; this
PQ controller performs better than other PQ controls proposed in the literature [12]. However, a current control
strategy for the SSSC could be also used in this case.
The steady state model can be obtained from the transient stability model equations and the corresponding controls, as previously done for all other models. Once more,
it is important to properly model the controller limits to
obtain reliable results in steady state studies.
Pl
ref
Ql
ref
Vdcref
Vkref Vk δ k Vl δ l Vdc
Fig. 15. Transient stability model of a UPFC.
plied at Bus 6 at 4 s. This triggers the circuit breaker of
the Bus 4-Bus 5 line at 4.15 s (9 cycles later), removing
the fault as well as the load at Bus 7. The generator at
Bus 3 recovers successfully, keeping its terminal voltage at
about 1 p.u., as shown in Fig. 18. The UPFC also recovers,
maintaining its power and terminal voltages at the desired
levels. Observe how close the results for both the UPFC
detailed model and the simplied model are. The most
signicant dierences are in the internal UPFC variable
(e.g., capacitor voltages), as expected, but the eect of the
UPFC on the system is fairly accurately captured by the
model.
V. Conclusions
The transient stability and power ow models presented
here are based on models that have been proposed on the
current literature, and can be considered to be simple, adequate models for voltage and angle stability studies of
networks with these kinds of FACTS controllers.
These models are all based on the assumption that voltages and currents are sinusoidal, balanced, and operate
near fundamental frequency, which are the typical assumpIV. Validation Studies
tions in transient stability and power ow studies. Hence,
The test system of Fig. 17 was used in [12, 14] to validate they have several limitations, especially when studying
the simplied model discussed here. The whole system is large system changes occurring close to these FACTS conmodeled in detail in the EMTP, i.e., 3-phase generators, trollers:
transmission lines, etc. The detailed UPFC model of Fig.
1. These models cannot be reliably used to represent un14, with all its switches, was modeled as well as the corbalanced system conditions, as they are all based on
responding simplied model of Fig. 15, are represented in
balanced voltage and current conditions.
detail. The generator is assumed to have an AVR controlling its terminal voltage, and the UPFC is designed to
control the power through the line as well as the voltages at
2. Large disturbances that yield voltages and/or currents
Bus 4 and Bus 8, using a simplied PWM power controller
with high harmonic content, which is usually the case
proposed in [12].
when large faults occur near power electronics-based
controllers, cannot be accurately studied with these
A balanced 3-phase fault through an impedance is ap-
Generator Phase Angle
x1
Pl
ref
2
0011
_
/
Ild
+
KP+ KI /S
ref
_
ωB
010
x1
1
Converter Model
0011
1
S+K
+
+
−70
3
I ld
ωB
0
Vld
0
3
+
ref
KP+ KI /S
+
_
_
x2
01
+
0011
1
S+K
+
I lq
0011
Ilq
K
RT
XT
Vld
Vkd
Vkq
Vised
=
=
=
=
=
=
=
Viseq
=
Vise
=
mse
=
=
RT !B
XT
Rl + Rse
Xl + Xse
p2 V
l
p2 V cos( , )
k
l k
p2 V sin( , )
k
l k
Vkd , Vld , XT x1
!B
Vkq , XT x2
!B
q
1
p2 Vi2sed + Vi2seq
q
8 Vise
3 Vdc
Viseq
l , tan,1
Vised
6
3.5
4 Load Power Demand 5
5.5
6
3.5
4
5
Active
Power in the UPFC line
5.5
6
3.5
4 Sending End Voltage 5
5.5
6
3.5
4 Receiving End Voltage 5
5.5
6
3.5
4
5
5.5
6
105
0
3
x2
MW/phase
/
5.5
180
130
80
0
3
1.5
1
p.u.
2
0
3
1.5
p.u.
Ilq
ref
0.97
0
3
4.5
Series Inserted Voltage
0.2
p.u.
Ql
MW/phase
ωB
4Generator Terminal Voltage
5
1
Vl d
ωB
3.5
1.5
p.u.
I ld
+
degrees
70
0.08
0
3
Fig. 16. Basic series branch dq control of UPFC with respect to the
bus voltage Vl l. All variables are in p.u., and !B stands for the
fundamental frequency of the system in rad/s.
3.5
4
DC Voltage
5
5.5
6
3.5
4
Angle Alpha
5
5.5
6
3.5
4
Angle Beta
5
5.5
6
3.5
4 Shunt Modulation Index 5
5.5
6
3.5
4 Series Modulation Index 5
5.5
6
3.5
4
5.5
6
30
22
kV
6
0
3
degrees
50
230 kV
Bus 3
Bus 4
0
3
Bus 5
Bus 6
Breaker
Bus 7
−25
Transf.
degrees
15 mi
245.5 MVA
238 MW
15.5 MVAr
Generator
3 Phase Fault
Bus 1
Bus 2
−110
3
Bus 8
Bus 9
100 mi
15 mi
90 mi
Z Thevenin
1.2
Bus 10
Transf.
144.4 mi
Infinite Bus
−70
300 MW
70 MVAr
p.u.
13.8 kV
18
0
Bus 11
−1.2
3
1.2
Fig. 17. Test system designed for validation studies of UPFC controller models [12, 14].
p.u.
UPFC
0
−1.2
3
4.5
5
Fig. 18. Test system results for a 3-phase fault at bus 6 [12]. The continuous line was obtained with the simplied UPFC model, whereas
the dashed line was obtained with a detailed UPFC model.
models, as they are all based on the assumptions of
having sinusoidal signals.
3. The above also applies for cases where voltage and
current signals undergo large frequency deviations.
4. Internal faults as well as some of the internal variables
of the controller cannot be reliably represented with
these models.
For these cases, detailed EMTP types of studies are required to obtain reliable results. Observe that these limitations also apply to most models typically used to represent other devices in transient stability and power ow
studies.
VI. Acknowledgements
The author would like to thank the National Science and
Engineering Research Council (NSERC) of Canada for its
direct support of the research discussed in this paper, as
well as Ms. Edvina Uzunovic for providing some of the
information, graphs and results presented here.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
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Claudio A. Ca~nizares received in April 1984 the Electrical Engi-
neer diploma from the Escuela Politecnica Nacional (EPN), QuitoEcuador, where he held dierent teaching and administrative positions from 1983 to 1993. His MS (1988) and PhD (1991) degrees in Electrical Engineering are from the University of Wisconsin{
Madison. Dr. Ca~nizares is currently an Associate Professor at the
University of Waterloo, E&CE Department, and his research activities are mostly concentrated in studying stability, modeling and computational issues in ac/dc/FACTS systems.