Basic Concepts in RF Design CMOS RFIC Design Institute of Microelectronic Systems 1 Overview System Theory Effects of Nonlinearities Gain Compression Desensitization and Blocking Crossmodulation Intermodulation Adjacent Channel Power Rejection Random Signals Noise and Noise Figure Input Referred Noise Noise Figure of Lossy Circuits Sensitivity Dynamic Range References CMOS RFIC Design Institute of Microelectronic Systems 2 System Theory (1) Linear Systems If inputs x1 and x2 generate outputs y1, y2 x1 → y1 x2 → y 2 For a linear system output can be expressed as a linear combination of inputs ax1 + bx2 → ay1 + by2 for all values of the constants a and b Any system that does not satisfy this condition is nonlinear Obs. A system is nonlinear if it has nonzero initial conditions Time Invariant Systems For a time invariant system time shift in input results in the same time shift in output x(t ) → y (t ) then x(t − τ ) → y (t − τ ) for all values of τ A system is time variant if it does not satisfy this condition CMOS RFIC Design Institute of Microelectronic Systems 3 System Theory (2) Example vin1 (t ) = A1 cos ω1t vin 2 (t ) = A2 cos ω 2t and the switch is on if vin1 > 0 Is the system (a) nonlinear or time variant? • Case (b) Nonlinear - the control is sensitive to the polarity of vin1 Time variant - because vout also depends on vin2 • Case (c) Linear Time variant CMOS RFIC Design Institute of Microelectronic Systems 4 System Theory (3) Remark: a linear system can generate frequency components that do not exist in the input signal In example (c) vout can be considered as the product of vin2 and a square wave toggling between 0 and 1, the output spectrum is given by: n +∞ sin (nπ / 2) n sin (nπ / 2) Vout ( f ) = Vin 2 ( f ) ∗ ∑ Vin 2 f − δ f − = ∑ nπ T1 n = −∞ nπ T1 n = −∞ +∞ Where * denotes convolution, δ(#) is the Dirac delta function, T1 = 2π/ω1 The output consists of vertically scaled replicas of Vin2(f) shifted by n/T1 • A system is memoryless if its output does not depend on the past values of its input • A memoryless linear system: • A memoryless nonlinear system: CMOS RFIC Design y (t ) = αx(t ) y (t ) = α 0 + α1 x(t ) + α 2 x 2 (t ) + α 3 x 3 (t ) + ... Institute of Microelectronic Systems 5 System Theory (4) A system with „odd“ symmetry: its response to -x(t) is the negative of that to x(t) This occurs if αj = 0 for even j A circuit with odd symmetry is called differential or „balanced“ - has no even order harmonics Example: bipolar differential pair vout = RI EE tanh CMOS RFIC Design Institute of Microelectronic Systems vin 2VT 6 Effects of Nonlinearity (1) Consider a nonlinear, memoryless, time - variant systems y(t) = f(x(t)) which can be modeled by Taylor’s series (consider only the first three terms). Then: y (t ) ≈ α1 x(t ) + α 2 x (t ) + α 3 x (t ) 2 3 1 ∂k y k = k! ∂ x αk x=0 Harmonics If a sinusoid is applied to our system, the output exhibits frequency components that are integer multiples of the input If x(t ) = A cos ωt y (t ) = α1 A cos ωt + α 2 A2 cos 2 ωt + α 3 A3 cos 3 ωt α 3 A3 α 2 A2 = α1 A cos ωt + (1 + cos 2ωt ) + (3 cos ωt + cos 3ωt ) 2 4 3α 3 A3 α 2 A2 α 2 A2 α 3 A3 cos ωt + cos 2ωt + cos 3ωt (1) = + α1 A + 2 4 2 4 The term with the input frequency - the fundamental, the higher order terms - the harmonics CMOS RFIC Design Institute of Microelectronic Systems 7 Effects of Nonlinearity (2) 1 Even-order harmonics result from αj with even j and vanish if the system has odd symmetry - in reality, however mismatches corrupt the symmetry yielding finite even-order harmonics 1 The amplitude of the nth harmonic consists of a term proportional to An and other terms proportional to higher powers of A. Neglecting the latter for small A, we can assume the nth harmonic grows approximately in proportion to An CMOS RFIC Design Institute of Microelectronic Systems 8 Gain Compression (1) Neglecting the harmonics in eq. (1), the output is: 3 y (t ) = α1 A + α 3 A3 cos ωt 4 The gain is: 3 av = α 1 A + α 3 A3 4 and usually α3 < 0! • For A small, the small signal gain is: av ≈ α1 • When A increases the gain begin to decrease, and the second term cannot be anymore neglected 1 Nonlinearity = variation of the small-signal gain with the input level 1 The output is a compressive (saturating) function of the input: the gain approaches zero for sufficiently high input levels 1 The gain is a decreasing function of A CMOS RFIC Design Institute of Microelectronic Systems 9 Gain Compression (2) This effect is quantified by the “1-dB compression point” (1-dBCP): the input signal level that causes the smallsignal gain to drop by 1dB. 20log α 1 − 1dB = 20log α 1 + A 1- dB = 0.145 α1 α3 3 α 3 A 21-dB 4 1 Measure of maximum applicable input signal 1 In typical RF amplifiers, 1-dBCP occurs around –20 to –25dBm (63.2 to 35.6mVpp in a 50Ω system) CMOS RFIC Design Institute of Microelectronic Systems 10 Gain Compression (3) CMOS RFIC Design Institute of Microelectronic Systems 11 Desensitization and Blocking Problem: when process a weak desired signal in the presence of a strong interferer the small signal gain is reduced by the interferer - the receiver is desensitized by the interferer! x(t ) = A1 cos ω1t + A2 cos ω 2t y (t ) = α1 x(t ) + α 2 x 2 (t ) + α 3 x 3 (t ) 3 3 3 2 y (t ) = α1 A1 + α 3 A1 + α 3 A1 A2 cos ω1t + ... 4 2 3 2 y (t ) = α1 + α 3 A2 A1 cos ω1t + ... 2 for A1 << A2: 1 The gain is a decreasing function of A2; for sufficiently large A2, the gain drops to zero, and we say the signal is „blocked“ 1 In RF design „blocking signals“ usually refers to interferers that desensitize a circuit even if the gain does not fall to zero 1 RF receivers require to withstand blocking signals 60 to 70dB greater than the wanted signal CMOS RFIC Design Institute of Microelectronic Systems 12 Cross Modulation Phenomenon that occurs when a weak signal and a strong interferer pass through a nonlinear system: the transfer of the amplitude modulation (or noise) of the interferer to the amplitude of the weak signal x(t ) = A1 cos ω1t + A2 (1 + m cos ω mt ) cos ω 2t m – the modulation index m2 m2 3 2 y (t ) = α1 + α 3 A2 1 + + cos 2ω mt + 2m cos ω m t A1 cos ω1t + ... 2 2 2 1 The desired signal at the output contains amplitude modulation at ωm and 2ωm 1 Common case of crossmodulation: amplifiers that must simultaneously process many independent signal channels, e.g. in cable television transmitters 1 Nonlinerities in the amplifier corrupt each signal with the amplitude variations in other channels CMOS RFIC Design Institute of Microelectronic Systems 13 Intermodulation (1) 1 When two signals with different frequencies are applied to a nonlinear system, the output in general exhibits some components that are not harmonics of the input frequencies - intermodulation 1 Intermodulation arises from mixing of the two signals when their sum is raised to a power greater than unity x(t ) = A1 cos ω1t + A2 cos ω 2t y (t ) = α1 x(t ) + α 2 x 2 (t ) + α 3 x 3 (t ) y (t ) = α 1(A1 cos 11t + A2 cos 1 2 t) + α 2(A1 cos 11t + A2 cos 1 2 t) 2 + α 3(A1 cos 11t + A2 cos 1 2 t) 3 After expanding and collecting the terms, at fundamental frequencies we have: At ω1: At ω2: 3 3 2 2 + + 2 2 A 2 A 1 3 2 3 1 A1 cos 11t 2 4 3 3 2 2 2 2 A 2 A + + 1 3 1 3 2 A2 cos 1 2 t 2 4 CMOS RFIC Design Institute of Microelectronic Systems 14 Intermodulation (2) Second-order terms: At 2ω1, 2ω2: At ω1 ± ω2 : 1 2 2 2 A1 cos 2 11t 2 1 2 2 A 2 2 cos 2 1 2 t 2 2 2 A1 A2 (cos (11 + 1 2 ) t + cos (11-1 2 ) t ) Third-order terms: 1 3 2 3 A2 cos 31 2 t 4 At 3ω1, 3ω2 : 1 3 2 3 A1 cos 311t 4 At 2ω1 ±ω2 : 3 2 2 A A 3 1 2 (cos (2 11 + 1 2 ) t + cos (2 11-1 2 ) t ) 4 At ω1 ±2ω2 : 3 2 2 A A 3 1 2 (cos (11 + 2 1 2 ) t + cos (11- 2 1 2 ) t ) 4 CMOS RFIC Design Institute of Microelectronic Systems 15 Intermodulation (3) Very important: the third-order intermodulation (IM3) terms at 2ω1 -ω2 and 2ω2 -ω1 If the difference between ω1 and ω2 is small, the IM3 components (2ω1 - ω2) and (2ω2 - ω1) are in the vicinity of ω1 and ω2 ((2ω1 - ω2) ~ ω1) ⇒ signal corruption due to the two strong interferers! In a typical two tone test: A1 = A2 = A The ratio of the amplitude of the output IM3 products to α1A defines the IM distortion • Example: if α1A = 1Vpp and 3α3A3/4 = 10mVpp then the IM3 components are at –40dBc IM is a critical effect in RF systems! ⇒ IP3 point (third intercept point) CMOS RFIC Design Institute of Microelectronic Systems 16 Intermodulation (4) 1 The fundamental increases in proportion to A (~ α1A) whereas the IM3 products increase in proportion to A3 (~ 3α3A3/4) 1 Input IP3 is the the signal level at which the amplitude of the IM3 would become equal to the that of the fundamental in a two-tone test 1 IIP3 (input IP3) & OIP3 (output IP3) 1 Two-tone test: A is small enough to neglect the high-order nonlinear terms and the gain is relatively constant and equal to α1 CMOS RFIC Design Institute of Microelectronic Systems 17 Intermodulation (5) 9 y (t ) = 21 + α 3 A 2 A cos 11t + 4 3 + 2 3 A 3 cos ( 2 11 -1 2 )t + 4 If 21 >> 9 23 A 2 4 21 AIP 3 9 2 α + 2 A 1 A cos 1 2 t 3 4 3 2 3 A 3 cos ( 2 1 2 -11 )t + ... 4 3 = 2 3 A 3 IP 3 4 AIP 3 = IP 3 = 4 21 3 23 • Relationship between AIP3 and A1-dB: A1− dB 0 .145 = ≈ − 9 .6 dB AIP 3 4/3 1 IP3 characterizes only third-order nonlinearities; if the input signal is increased, the condition α1A>> 9α3A3/4 no longer holds, the gain drops, and higher order IM products become significant 1 Many circuits have IP3 beyond the allowable input range, sometimes even higher than the supply voltage CMOS RFIC Design Institute of Microelectronic Systems 18 Intermodulation (6) Method of measuring the IP3 Ain – input level at each frequency A ω1, ω2 – amplitude of the output components @ω1 and ω2 AIM3 – amplitude of the IM3 products From the previous equation: Aω 1,ω 2 Then 3 2 3 A 3 in = 21 Ain and AIM 3 ≈ 4 Aω 1,ω 2 AIP2 3 4 21 1 = = 2 2 AIM 3 3 α 3 Ain Ain Expressed in dB: 20 log AIP 3 20 log Aω 1,ω 2 − 20 log AIM 3 = 20 log AIP2 3 − 20 log Ain2 1 = (20 log Aω 1,ω 2 − 20 log AIM 3 ) + 20 log Ain 2 CMOS RFIC Design Institute of Microelectronic Systems 19 Intermodulation (7) Graphical calculation L1 – slope equal to 1, L2 – slope equal to 3 An input increment ∆P/2 yields an equal increment in L1 and an increment equal to 3∆P/2 in L2 reducing the difference between the two lines to zero CMOS RFIC Design Institute of Microelectronic Systems 20 Cascaded Nonlinear Systems (1) y1 (t ) = α1 x(t ) + α 2 x (t ) + α 3 x (t ) 2 3 [ ] + β [α x(t ) + α x (t ) + α x (t )] + β [α x(t ) + α x (t ) + α x (t )] y2 (t ) = β1 α1 x(t ) + α 2 x 2 (t ) + α 3 x 3 (t ) 2 y2 (t ) = β1 y1 (t ) + β 2 y1 (t ) + β y (t ) 2 3 3 1 2 1 2 1 2 2 3 3 3 2 3 3 3 Considering the first and third-order terms, we have: ( ) y2 (t ) = α1 β1 x(t ) + α 3 β1 + 2α1α 2 β 2 + α13 β 3 x 3 (t ) + ... AIP 3 = 4 21 β 1 3 2 3 β 1 + 2α 1α 2 β 2 + α 13 β 3 CMOS RFIC Design Institute of Microelectronic Systems 21 Cascaded Nonlinear Systems (2) A worst case estimate: 3 β α α β α 2 + 2 + 1 3 3 1 1 2 2 1 β3 = 2 A IP 3 4 21 β 1 1 1 3 α 2β2 α 12 = 2 + + 2 2 A IP 3 A IP 3 ,1 2 β 1 A IP 3 , 2 As α1 increases, the overall IP3 decreases: with higher gain in the first stage, the second stage senses larger input levels, producing much greater IM3 products Since each stage has a narrow passband, out-of-band signals are heavily attenuated, and: 1 1 α 12 ≈ 2 + 2 For more stages: 2 A IP 3 A IP 3 ,1 A IP 3 , 2 α 12 α 12 β 12 1 1 ≈ 2 + 2 + 2 + ... 2 A IP 3 A IP 3 ,1 A IP 3 , 2 A IP 3 , 3 Note that AIP3, AIP3,1, AIP3,2 … are voltage quantities rather than power quantities and rather real values, not dB For gain greater than 1, the IP3 of latter stage becomes increasingly critical CMOS RFIC Design Institute of Microelectronic Systems 22 Adjacent Channel Power Rejection – ACPR (1) Problem • Intermodulation lead to higher in band noise power • Signal power leakage to the adjacent channel degrade adjacent channel (used by other users) SNR CMOS RFIC Design Institute of Microelectronic Systems 23 Adjacent Channel Power Rejection – ACPR (2) Example: CDMA ACPR Measure spectral power of the channel (1.23 MHz bandwidth) Measure upper and lower band edge ( ±885 KHz) of the next adjacent channel power (30KHz bandwidth) ACPR [dBc ] = total power in desired channel total power in adjacent channel Alternative method: ACPR [dBc ] = CMOS RFIC Design Institute of Microelectronic Systems P1 ⋅ 10 log (1230 / 30 ) P2 24 Random Processes (1) Random process • we do not know / need to know everything about it • it can be characterized with only a few parameters and functions • we can solve most problems without any other information about the process Example: The noise voltage across a resistor as a function of time today is different from that measured tomorrow To know everything about the noise voltage, infinite number of measurements, each one for infinite length of time are required Random processes • require a collection of measurements - family of time functions • can be modeled with simple statistical functions that indicates how much and how fast the amplitude varies with time CMOS RFIC Design Institute of Microelectronic Systems 25 Random Processes (2) Time average - consider one resistor and measure the noise n(t) over a long time T, and calculate the average as: T /2 1 n(t ) = lim n(t )dt T →∞ T ∫ −T / 2 Ensemble (statistical) average - consider an ensemble of identical resistors and average simultaneous samples of the noise waveforms in an ensemble: ∞ n(t ) = ∫ n(t )Pn (n )dn −∞ where Pn(n) is the probability density function of the process CMOS RFIC Design Institute of Microelectronic Systems 26 Random Processes (3) Q1: Is the time average measured today equal to that measured tomorrow? A: Not necessarily. If system is “stationary”, its statistical properties are invariant to a time shift. Fortunately most of the random phenomena in RF systems can be considered stationary. Q2: Is the time average of a stationary process equal to ensemble average? A: Not always. But in most cases they are equal. Remark: second order averages are of particular interest because they represent the power of the signals T /2 1 2 2 (t )dt n (t ) = lim n T →∞ T ∫ −T / 2 CMOS RFIC Design ∞ n 2 (t ) = ∫ n 2 (t )Pn (n )dn −∞ Institute of Microelectronic Systems 27 Probability Density Functions (PDFs) The PDF - Px(x) - of a random signal x(t) 1 shows how often the amplitude of a random process falls in a given range of values 1 provides no information as to how fast the random signal varies in the time domain Px (x )dx = probability of x < X < x + dx X – is the measured value of x(t) at some point in time Example: the Gaussian (normal) distribution 1 − (x − m ) Px (x ) = exp 2σ 2 σ 2π x 1 − u2 exp erf ( x ) = du ∫ 2 2π 0 2 1 − (x − m ) Px (x1 < x < x2 ) = ∫ dx exp 2 2σ 2π x1 σ x2 2 1 Central limit theorem: if many independent random processes with arbitrary PDFs are added, the PDF of the sum approaches a Gaussian distribution 1 Many natural phenomena exhibit Gaussian statistics (noise of a resistor, etc.) CMOS RFIC Design Institute of Microelectronic Systems 28 Power Spectral Density (PSD) (1) The PSD - Sx (f) - of a random signal x(t) shows how much power the signal carries in a unit bandwidth around frequency f 1 Sx(f) estimation: apply the signal to a bandpass filter with 1-Hz bandwidth centered at f and measure the average output power over a sufficiently long time 1 If this measurement is performed for each value of f, the overall spectrum of the signal is obtained S x ( f ) = lim T →∞ CMOS RFIC Design XT ( f ) T T 2 where X T ( f ) = ∫ x(t ) exp(− j 2πft )dt 0 Institute of Microelectronic Systems 29 Power Spectral Density (PSD) (2) Computational algorithm for PSD 1. Truncate x(t) to a relatively long interval [0, T] 2. Calculate the Fourier transform of the result and hence |XT(f)|2 3. Repeat steps 1 and 2 for many sample functions of x(t) 4. Take the average of all |XT(f)|2 functions and normalize the result to T − f1 Sx (f) is an even function of f for real x(t) f2 ∫ S ( f )df + ∫ S ( f )df = ∫ 2S ( f )df x − f2 CMOS RFIC Design f2 Institute of Microelectronic Systems x f1 x f1 30 Power Spectral Density (PSD) (3) If a signal of Sx(f) is applied to a linear, time-invariant system with transfer function H(s), then: S y ( f ) = Sx ( f ) H ( f ) 2 where H ( f ) = H (s = j 2πf ) • The spectrum of the signal is shaped by the transfer function of the system • If x(t) is Gaussian, so is y(t) In general, PDF and PSD have no relationship: • thermal noise: Gaussian PDF, white PSD • flicker noise: Gaussian PDF, 1/f PSD CMOS RFIC Design Institute of Microelectronic Systems 31 Noise (1) Thermal noise 1 Brownian random motion of thermally agitated charge carriers 1 Generated in every physical resistors 1 Modeled by a voltage source in series (Thevenin representation) or current source in parallel (Norton representation) with the PSD given by: 2 V 4kT∆f = 4kTG∆f I n2 = n2 = R R V = 4kTR∆f 2 n where k = 1.38 ⋅10 −23 J / K Boltzmann constant and K is the absolute temperature • „white“ noise – contain the same level of power at all frequencies • Is the mean square noise voltage generated by a resistor R in a bandwidth ∆f ⇒ is measured in V2/Hz or in [ Vn2 = Vrms / Hz ] • Is not power! We tacitly assume that this voltage is applied across a 1-Ω resistor to generate a power of 4kTR in a 1-Hz bandwidth • Example: 1kΩ ⇒ Vn,rms = 4nV/Hz1/2, CMOS RFIC Design 50Ω ⇒ Vn,rms = 4nV/Hz1/2 Institute of Microelectronic Systems 32 Noise (2) G Thermal noise in MOSFET D Cgs • Channel resistance noise 2 I nD = 4kTγg d 0 ∆f ≈ 4kT (2 g m / 3) gg InG gmvgs InD S where γ is a bias-dependent factor: γ ~ 2/3 in long channel devices; γ ~ 2 - 3 in short channel devices gd0 - the zero-bias drain conductance ( = gm for long channel devices) • Gate noise 2 I nG = 4 kT δ g g ∆ f ω 2 C gs2 gg = 5gd 0 δ ~ 4/3 in long devices Thermal agitation of channel charge cause fluctuation of channel potential ⇒ this couples capacitively with gate terminal, generating gate noise Gate noise is negligible at low frequency, but it can dominate at RF • Both drain and gate noise share a common origin ⇒ they are correlated CMOS RFIC Design Institute of Microelectronic Systems 33 Noise (3) Shot noise (Schottky noise) • Gaussian white process associated with the transfer of charge across an energy barrier (e.g., a p-n junction) I = 2 qI DC ∆ f 2 n where q = 1.6 ⋅10 −19 C is the charge of the electron • For a bipolar transistor the collector and emitter shot noise is modeled as a current source connected between C and E and another between B and E • In MOS devices the shot noise of the very small gate leakage current can be neglected • „white“ noise, no temperature dependence • Example: for a IDC = 1mA ⇒ In,rms = 18pA/Hz1/2 CMOS RFIC Design Institute of Microelectronic Systems 34 Noise (4) Flicker noise (1/f noise, „pink“ noise) • Random trapping of charge at oxide interface modeled as a voltage source in series with gate • Modeled by a noise current source with a spectral density given by: 2 K gm I n2 = ∆f 2 f WLC ox where K is a technology-dependent parameter • At high frequency may be neglected; however in mixers and oscillators the 1/f-shaped spectrum can be translated to RF range Small signal noise model of a MOSFET G D 2 I nG = 4 kT δ g g ∆ f Cgs InG gg gmvgs S CMOS RFIC Design 2 InD I 2 nD K gm = 4 kT γ g d 0 ∆ f + ∆f 2 f WLC ox Institute of Microelectronic Systems 35 Input - Referred Noise (1) 1 The noise of a two-port system can be modeled by two input noise generators: a series voltage source Vn2 and a parallel current source In2 1 Require both Vn2 and In2 for adequate representation 1 In general, the correlation between Vn and In must be taken into account 1 Vn2 is determined by shorting the input port of the two circuits and equating the output noise 1 In2 is determined by opening the input port of the two circuits and equating the output noise 1 Even though a circuit may have no physical input noise current, the representation using input-referred sources must include In2 CMOS RFIC Design Institute of Microelectronic Systems 36 Input - Referred Noise (2) Example The circuit should produce the same output noise in both cases! Short the input port and equate the output noise: 2 g m2 Vn2 = I nD Open the input port and equate the output noise: 2 g m2 I n2 Z in = I nD For I 2 nD = 4kT (2 g m / 3) we obtain V = 8kT / (3 g m ) 2 n 2 ( I = 8kT / 3 g m Z in 2 n Since Vn and In represent the same mechanism, they are correlated Z in → ∞ I n2 → 0 and Vn is sufficient to represent the noise In RF design Z in is low (50Ω) ⇒ we need both Vn and In If CMOS RFIC Design Institute of Microelectronic Systems 37 2 ) Noise Figure (NF) (1) Noise Figure = total output noise power output noise due to input source Noise Factor = SNRin SNRout (2) (1) Noise Figure = 10log10 (Noise Factor ) 1 The two definitions are equivalent! 1 Noise figure (or noise factor) measures the SNR degradation as a signal pass through a system 1 If a system has no noise, then SNRin = SNRout ⇒ NF = 1 = 0dB 1 In reality, the finite noise of a system degrades the SNR, yielding NF > 1 1 If the input signal contains no noise, then SNRin = ∞ and NF = ∞ (even though the system has a finite internal noise): this does not occur in real world! 1 Take care whether discuss about noise figure or noise factor CMOS RFIC Design Institute of Microelectronic Systems 38 Noise Figure (2) For NF calculations – usually use the first definition! VRS2 + (Vn + I n RS ) 2 NF = VRS2 2 ( Vn + I n RS ) NF = 1 + 4kTRS 2 ( Vn + I n RS ) = 1+ VRS2 or NF = Vn2,out 2 v ,tot A 2 RS V = Vn2,out Av2,tot 4kTRS 1 V2n,out – is the total noise at the output; A v,tot – the total gain from Vin to Vout 1 No correlation between VRS and Vn (or In), but correlation between Vn and In 1 NF is typically specified for a 1-Hz BW 1 Vn and In are also measured in 1-Hz BW 1 NF is function of source impedance RS CMOS RFIC Design Institute of Microelectronic Systems 39 Noise Figure (3) Example Determine the NF of RP with respect to a source resistance RS 2 n ,out V NF = = 4kT (RS // RP ) Vn ,out 2 VRS2 ,out 2 RS ,out V =AV 2 v 2 RS = A 4kTRS 2 v Av = RP RS + RP RS = 1+ RP NF is minimized by maximizing RP The condition for minimum noise figure does not coincide with that for maximum power transfer RS = RP CMOS RFIC Design Institute of Microelectronic Systems 40 Noise Figure of Cascaded Stages (1) The overall NF can be obtained in terms of NF and gain of each stage Av1, Av2 – the unloaded voltage gain The total noise power at the input of the first stage can be written as: ( Vn2,in1 = α12 (VRS + I n1 RS + Vn1 ) = α12 VRS2 + (I n1 RS + Vn1 ) 2 2 ) The total noise power at the input of the second is: ( Vn2,in 2 = α 22 Av21Vn2,in1 + (I n 2 Rout1 + Vn 2 ) 2 ) The total noise power at the output is: 2 n ,out V =α A V 2 3 2 v2 2 n ,in 2 CMOS RFIC Design where α1 = Rin1 RS + Rin1 α2 = Institute of Microelectronic Systems Rin 2 Rout1 + Rin 2 α3 = RL Rout 2 + RL 41 Noise Figure of Cascaded Stages (2) α 32 Av22 Vn2,in 2 α 22 Av21Vn2,in1 + α 22 (I n 2 Rout1 + Vn 2 )2 = 2 2 2 2 2 = NFtot = 2 Av ,tot 4kTRS α1 Av1α 2 Av 2α 3 4kTRS α12 Av21α 22 4kTRS Vn2,out = Vn2,in1 α12 4kTRS 2 ( I n 2 Rout1 + Vn 2 ) + α12 Av21 4kTRS 1 (I n 2 Rout1 + Vn 2 ) VRS2 + (I n1 RS + Vn1 ) = + 2 2 4kTRS 4kTRS α1 Av1 Where the voltage gain from Vin to Vout is: 2 2 Av ,tot = α1 Av1α 2 Av 2α 3 In the special case where RS = Rin1 = Rout1 = Rin2 NFtot = NF1, RS + NF2, RS − 1 Av21 NF1,RS, NF2,RS - noise figure of the1st and 2nd stage with respect to a source impedance RS CMOS RFIC Design Institute of Microelectronic Systems 42 Noise Figure of Cascaded Stages (3) AP = Available power gain AP 1 Available power at the output: the power that the circuit would deliver to a conjugate-matched load available power at the output available source power α12 Av21Vin2 Pout ,av1 = 4 Rout1 1 Available source power: power that source would deliver to a conjugate-matched circuit Vin2 Psource,av1 = 4 RS So that: RS AP1 = α A Rout1 2 1 2 v1 The total NF is: (I n 2 Rout1 + Vn 2 ) 1 (I R + V ) R + 2 2 n 2 out1 n 2 = NF1, RS + 2 out2 1 α1 Av1 4kTRS α1 Av1 RS 4kTRout1 2 NFtot = NF1, RS NFtot = NF1, RS + NF2, Rout1 − 1 CMOS RFIC Design AP1 where 2 NF2, Rout1 Institute of Microelectronic Systems 2 ( I n 2 Rout1 + Vn 2 ) = 1+ 4kTRout1 43 Noise Figure of Cascaded Stages (4) Similarly, for m stages (Friis equation): NFtot = 1 + ( NF1 − 1) + NFm − 1 NF2 − 1 + ... + AP1 AP1 ⋅ ... ⋅ AP (m −1) 1 NF of each stage is calculated with respect to the output impedance of the previous stage (the source impedance driving that stage) 1 The noise contributed by each stage decreases as the gain preceding the stage increases 1 The first few stages in a cascade are the most critical 1 If a stage exhibits attenuation (loss), then NF of the following circuit is amplified when referred to the input of that stage CMOS RFIC Design Institute of Microelectronic Systems 44 Noise Figure of Lossy Passive Circuits (1) Lossy Circuit 1 Passive devices attenuate desired signal, and contribute noise 1 Power Loss (L) – similar to the concept of available power gain Pin,av Vin2 / 4 RS Vin2 Rout = 2 = 2 L= Pout,av VTH / 4 Rout VTH RS 2 n ,out V = 4kTRout NF = Vn2,out Av2,tot RL2 (RL + Rout )2 Av ,tot VTH RL = Vin RL + Rout Vin2 1 1 = 4kTRout 2 =L VTH 4kTRS 4kTRS CMOS RFIC Design Institute of Microelectronic Systems 45 Noise Figure of Lossy Passive Circuits (2) Cascade of lossy filter and low noise amplifier (LNA) NFFilt = L NFtot = NFFilt + NFLNA − 1 NFLNA − 1 = L + ( NFLNA − 1)L = L ⋅ NFLNA = NFFilt + −1 AP , Filt L NFtot [dB ] = L[dB ] + NFLNA [dB ] CMOS RFIC Design Institute of Microelectronic Systems 46 Sensitivity (1) Sensitivity is the minimum power level of the input signal that the receiver can detect while providing a required SNR at the output (for a required Bit Error Rate) NF = P /P SNRin = s,in n,in SNRout SNRout Ps,in - the input signal power per unit bandwidth (/Hz) Pn,in - the input noise power per unit bandwidth (/Hz) The power of input signal, distributed across the channel bandwidth BW is: Ps,in = Pn,in ⋅ NF ⋅ SNR out ⋅ BW equivalent, in dB: Ps,in [dBm] = Pn,in [dBm / Hz] + NF[dB] + SNR out [dB] + 10 log (BW) min Psmin , in [dBm] = Pn , in [dBm / Hz] + NF[dB] + SNR out [dB] + 10 log (BW) CMOS RFIC Design Institute of Microelectronic Systems 47 Sensitivity (2) Pn,in - the available noise power that the source resistance RS delivers to a matched input is: Pn,in = 4 kTR S = kT = − 174 dBm / Hz = 4 × 10 − 21 W 4 Rin min Psmin [dBm] = − 174 dBm / Hz + 10 log (BW) + NF[dB] + SNR , in out [dB] min min Sensitivit y = Psmin [dBm] = Input Noise Floor + SNR = INF + SNR , in out out Sensitivity: 1 is function of bandwidth 1 degrades with higher data rates (BW increases) 1 Input Noise Floor - INF Input Noise Floor = Output Noise Floor - Gain CMOS RFIC Design Institute of Microelectronic Systems 48 Dynamic Range (1) 1 Dynamic Range (DR) DR = Pin,max [dBm] Pin,min [dBm] Pin,max - maximum input level that the circuit can tolerate Pin,min - minimum input level at which circuit provides a reasonable signal quality Differently quantified in different applications 1 Spurious Free Dynamic Range (SFDR) Pin,min - sensitivity Pin,max - maximum input level in a two-tone test for which the IM3 products are smaller than the noise floor 1 (20 log Aω 1,ω 2 − 20 log AIM 3 ) + 20 log Ain 2 Pout − PIM 3 ,out 20 log AIP 3 = PIIP 3 = Pin + CMOS RFIC Design 2 Institute of Microelectronic Systems 49 Dynamic Range (2) Pout = Pin + G and PIM3,out = PIM3,in + G so that: PIIP 3 = Pin + Pin − PIM 3,in 2 Pin = 2 PIIP 3 + PIM 3 ,in 3 • Pin,max is obtained when P IM3,in = INF Pin , max 2 PIIP 3 + INF = 3 • Pin,min is sensitivity min Pin , min = INF + SNR out 2 PIIP 3 + INF 2 min min SFDR = − INF + SNR out = (PIIP 3 − INF ) − SNR out 3 3 ( ) Example: NF =-15dBm, PIIP3 =-15dBm, B =200kHz, SNRmin =12dB ⇒ SFDR =53dB CMOS RFIC Design Institute of Microelectronic Systems 50 References B. Razavi - RF Microelectronics http://info.nsu.ac.kr/cwb-data/data/ycra2/Basic_Concepts_in_RF_Design.pdf (ICE669 Wireless Transceiver Design Lecture / H.J. Yoo Information and Communication University, Seoul, Korea) CMOS RFIC Design Institute of Microelectronic Systems 51