PEAK-gridARM Eval Board
Linux-based Development Platform for
the gridARM™ Microcontroller
Hardware Manual
Document version 1.1.1 (2014-03-03)
PEAK-gridARM Eval Board – Hardware Manual
Products taken into account
Product Name
Model
PEAK-gridARM Evaluation Board
Part number
IPEH-004051
CANopen® and CiA® are registered community trade marks of CAN in Automation
e.V. gridARM™ is a trademark of Grid Connect, Inc. SD™ and microSD™ are trademarks or registered trademarks of SD-3C in the United States, other countries, or
both. ARM® and ARM7TDMI® are registered trademarks of ARM Limited (or its
subsidiaries) in the EU and/or in other countries.
All other product names mentioned in this document may be the trademarks or
registered trademarks of their respective companies. They are not explicitly marked
by “™” and “®”.
© 2014 PEAK-System Technik GmbH
PEAK-System Technik GmbH
Otto-Roehm-Strasse 69
64293 Darmstadt
Germany
Phone: +49 (0)6151 8173-20
Fax:
+49 (0)6151 8173-29
www.peak-system.com
info@peak-system.com
Document version 1.1.1 (2014-03-03)
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PEAK-gridARM Eval Board – Hardware Manual
Contents
1
Introduction
1.1
1.2
1.3
2
5
Properties at a Glance
Prerequisites for Operation
Scope of Supply
Startup Procedure
9
2.1 Starting the Board
2.2 Setting Date and Time
2.3 Demo Scripts
2.3.1
LEDs at the Digital Outputs (led_demo,
led_switch)
2.3.2
Push Buttons at the Digital Inputs
(btn_demo)
2.3.3
CAN Communication (can_demo)
3
Elements on the Board
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
6
7
7
9
13
14
14
15
15
16
Supply Socket
USB
Gigabit Ethernet
CAN
RS-232 Terminal
RS-232 Debug
JTAG
microSD™ Slot
Text Display Connector
I²C/SPI
Digital inputs and outputs
Analog Inputs
Status LED Microcontroller
Real-Time Clock
Reset Push Button
3
16
17
17
18
20
21
22
23
24
26
27
28
29
30
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PEAK-gridARM Eval Board – Hardware Manual
4
4.1
4.2
4.3
4.4
4.5
4.6
5
Configuration
31
Selecting the Boot Flash
Activating the Write Protection for the
System EEPROM
Using I/O Interrupt or microSD™ Card
Detection
Using Microcontroller LED or USB Detection
Assigning Traffic LEDs
Replacing the Button Cell for the Real-Time
Clock
Technical Specifications
31
32
33
34
35
37
38
Appendix A
Dimension Drawing
40
Appendix B
Jumpers Overview
41
Appendix C
Circuit Diagrams
45
C.1
C.2
C.3
C.4
C.5
C.6
Microcontroller
Memory
Ethernet
I/O
Serial
Power Supply
46
47
48
49
50
51
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PEAK-gridARM Eval Board – Hardware Manual
1
Introduction
Grid Connect 1 has developed the ARM7™ microcontroller gridARM™
as SoC solution aiming for embedded applications in the field of
industrial communication. The PEAK-gridARM evaluation board is a
Linux-based development platform for the gridARM microcontroller.
It has connectors for Gigabit Ethernet, High-speed CAN, USB 2.0,
RS-232, SPI, and I²C. Digital and analog inputs of the evaluation
board are manipulated by push buttons and potentiometers. The
microcontroller state as well as the states for supply and data traffic
are indicated by LEDs. A Board Support Package (BSP) for Linux
gives access to the hardware resources of the PEAK-gridARM
evaluation board.
The gridARM™ microcontroller by the U.S. company Grid Connect
is distributed in Europe exclusively by PEAK-System.
This manual describes the evaluation board's hardware and first
steps with it. Please refer to the following documents for further
information:
PEAK-gridARM Evaluation Board - Linux BSP - User’s Guide:
developer documentation of the Board Support Package for
Linux
gridARM - Hardware Data Sheet 2:
documentation about the microcontroller
1
2
http://gridconnect.com
http://gridconnect.com/media/documentation/grid_connect/gridARM_Hardware_DS.pdf
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PEAK-gridARM Eval Board – Hardware Manual
1.1
Properties at a Glance
ARM7 gridARM microcontroller (80 MHz)
Linux operating system (version 2.6.36)
4 MByte NOR flash with 16-bit data bus access
8 MByte NOR flash with 32-bit data bus access
64 MByte SDRAM with 32-bit data bus access
I²C EEPROM for device configuration
4 MByte SPI flash
Memory card slot for additional memory capacity
Real-time clock (RTC) with battery
Two alternative JTAG sockets
Push button for hardware reset
Voltage supply via USB or an external power supply unit
(8 - 30 V)
Dimensions: 110 x 110 mm
Additional HD44780-compatible text display can be connected,
availability on request
Communication
Gigabit Ethernet (10/100/1000 Mbit/s)
High-speed CAN channel (ISO 11898-2) with bit rates up to
1 Mbit/s
Connection via D-Sub, 9-pin (in accordance with CiA® 102)
NXP CAN transceiver PCA82C251
USB 2.0 Full-speed (USB Device Port)
Two RS-232 ports for debugging and terminal access
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PEAK-gridARM Eval Board – Hardware Manual
SPI bus (1 MHz) for two external extensions
I²C bus (400 kHz) for external extensions
Inputs and outputs
8 digital inputs, occupied with 6 push buttons, an RTC alarm,
and memory card detection
8 digital outputs, occupied with 7 LEDs and a buzzer
5 analog inputs, occupied with 4 potentiometers
Optional use of I/O ports with external wiring via jumpers
LEDs for μC status, supply, CAN, and RS-232
1.2
Prerequisites for Operation
PC with USB port for the power supply, alternatively, DC source
8 to 30 V with barrel connector
Optionally for development:
RS-232 port at the PC and null-modem cable (D-Sub 9 f-f) for
terminal access
Linux operating system recommended for the PC
1.3
Scope of Supply
PEAK-gridARM Evaluation Board
USB connection cable (type B)
Flat ribbon cable for RS-232 debugging port to D-Sub 9 m
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PEAK-gridARM Eval Board – Hardware Manual
Software and documentation
• μClinux-dist development environment and toolchain
• Board Support Package (BSP) for Linux with sources and
binaries
• Hardware manual with circuit diagrams, BSP user guide
(both PDF)
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PEAK-gridARM Eval Board – Hardware Manual
2
Startup Procedure
The chapter describes the startup of the PEAK-gridARM Evaluation
Board by applying a supply voltage. The startup process can be
observed on a PC via a serial connection.
Afterwards, the setup of the date and time is described.
Note: This startup procedure is referring to the Linux image
being present in the memory at delivery of the evaluation
board.
In addition to the scope of supply you need:
PC with USB port for the voltage supply
RS-232 port at the PC
null-modem cable (D-Sub 9 f-f)
terminal emulation program
2.1
Starting the Board
Attention! Electrostatic discharge (ESD) can damage or destroy
components on the PEAK-gridARM Evaluation Board. Take
precautions to avoid ESD when handling the board.
Do the following to start the evaluation board and to observe the
startup process:
1.
Place the board on a flat, clean, and dry surface.
2.
Plug the supplied flat ribbon cable onto the double pin
header “J501 Debug” on the board. The strand marked red
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PEAK-gridARM Eval Board – Hardware Manual
must be on the side of pins 1 and 2 of the double pin
header.
RS-232 Debug (J501, left), USB (J401, right)
3.
Use a null-modem cable (not included in the scope of
supply) in order to connect the RS-232 port of the PC with
the flat ribbon cable.
4.
On your PC, start a terminal emulation program that
establishes a connection to the evaluation board via the RS232 interface (e.g. COM1 in Windows or ttyS0 in Linux). For
this use the following connection parameters:
38,400 bit/s
8 data bits, no parity, 1 stop bit (8N1)
No hardware or software handshake
5.
Use the supplied USB cable to make a connection between
the powered-on PC and the “J401 USB” connector on the
board.
This establishes the voltage supply of the board.
Note: If you use another USB cable instead of the supplied one,
it may happen that a cheap version doesn't have an appropriate
wire cross section for proper voltage supply. Possibly, the
evaluation board does not start then.
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PEAK-gridARM Eval Board – Hardware Manual
Startup Sequence
At delivery, the PEAK-gridARM Evaluation Board is supplied with
the U-Boot bootloader and with a Linux image with Kernel 2.6.36,
both being started in succession.
U-Boot bootloader with 3-second countdown
until the automatic Linux boot sequence
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PEAK-gridARM Eval Board – Hardware Manual
Start of the Linux boot sequence
Bottom: Linux prompt after the finished boot sequence
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PEAK-gridARM Eval Board – Hardware Manual
After a successful boot sequence, the μC status LED on the evaluation board blinks with the rhythm of a heartbeat signal (blink blink - pause).
Tip: The pre-installed Linux image is provided with several
demo scripts. One starts automatically after the boot sequence
and activates the seven LEDs at the digital outputs one after
another. More information about the scripts in section 2.3 on
page 14.
At the Linux prompt (current path with number sign #), you can now
enter and execute commands.
2.2
Setting Date and Time
We recommend to check the system date and time and to correct it
if needed after the first start.
Check the date and time by entering the following command at the
Linux prompt:
date
Note the time zone in the output. The default is UTC (Coordinated
Universal Time). Accordingly, you must then specify the new time
for this time zone.
If required, enter a new time with the following two commands.
This sets the system time in a first step and then applies the set
time to the real-time clock.
date YYYY-MM-DD hh:mm 3
hwclock --systohc
3
YYYY: year, MM: month, DD: day, hh: hour, mm: minute
Alternatively, you can enter only the time with hh:mm.
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PEAK-gridARM Eval Board – Hardware Manual
Even after disconnecting the supply voltage, the real-time clock
stays in function, because it is supplied by the button cell.
2.3
Demo Scripts
At delivery, the Linux image is provided with several demo scripts
that illustrate the access possibilities to the periphery.
The scripts are located in the /home/peak/demo/ directory.
2.3.1
LEDs at the Digital Outputs (led_demo,
led_switch)
During boot, the led_demo script is started automatically. It activates the seven LEDs at the digital outputs one after another.
Do the following to stop the script:
1.
Enter the following command:
ps
All currently running processes are listed.
2.
Note the PID (process number) of the
/bin/sh demo/led_demo entry.
3.
Enter the following command:
kill -9 PID
Replace PID with the previously noted number.
Using the led_switch script, you can influence each LED. It is
called with parameters:
led_switch led [on|off]
led: cpu, yellow:1, yellow:2, yellow:3, yellow:4, green:5, green:6, red:7
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PEAK-gridARM Eval Board – Hardware Manual
Example (activating the yellow LED 3):
/home/peak/demo # ./led_switch yellow:3 on
2.3.2
Push Buttons at the Digital Inputs
(btn_demo)
During boot, the btn_demo script is started automatically. On pressing button 1 or 2, it reacts with the transmission of a CAN message
onto a connected CAN bus.
In the demo script, no function is assigned to the other four buttons.
You can stop the execution of the script according to the instructions in the previous subsection 2.3.1.
2.3.3
CAN Communication (can_demo)
During boot, the can_demo script is started automatically. It shows
incoming CAN messages from a connected CAN bus in the debug
terminal.
You can stop the execution of the script according to the instructions in the previous subsection 2.3.1.
To transmit single CAN messages manually, use the following
command:
cansend can0 ID#Data
Example (CAN ID 12F, data bytes 45 67 89 AB):
/ # cansend can0 12F#456789AB
The Data Length Code (DLC, here: 4) is automatically determined
from the number of given data bytes.
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PEAK-gridARM Eval Board – Hardware Manual
3
Elements on the Board
Attention! Electrostatic discharge (ESD) can damage or destroy
components on the PEAK-gridARM Evaluation Board. Take
precautions to avoid ESD when handling the board.
3.1
Supply Socket
The PEAK-gridARM Evaluation Board can either be supplied via the
USB port (setting at delivery) or the supply socket. The supply path
is determined by the jumper JP600.
Supply socket J600 (left), USB port J401 (top),
jumper JP600 (center) for selection
Jumper position JP600
Supply Eval Board via…
2-1*
USB port
3-2
Supply socket
* Setting at delivery
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PEAK-gridARM Eval Board – Hardware Manual
Important note: Never connect all three pins of the JP600
jumper together. The microcontroller and the USB interface of
a connected PC can otherwise be destroyed by overvoltage.
For the supply socket, a DC source with barrel connector is needed
(not part of the scope of supply), e.g. an AC adaptor.
Supply voltage:
12 V DC (8 - 30 V possible)
3.2
Diameter of barrel connector:
a = 5.5 mm, b = 2.1 mm;
minimum length: 11 mm
USB
The USB interface supports the USB 2.0 standard (UDP) with bit
rates up to 12 Mbit/s (Full Speed).
With a USB connection to a PC, the power supply of the evaluation
board can be taken on (setting at delivery). Alternatively, it is
possible to use the separate supply socket (see section 3.1 on page
16).
3.3
Gigabit Ethernet
The Ethernet interface can be operated with 10 Mbit/s, 100 Mbit/s,
and 1 Gbit/s. On the connector housing, there are two LEDs that
indicate an established connection and transfer activity.
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PEAK-gridARM Eval Board – Hardware Manual
Ethernet connector
Besides basic communication purposes, the Ethernet interface can
also be used for a firmware update.
3.4
CAN
The CAN interface supports the two CAN formats 2.0A (Standard)
and 2.0B (Extended). The NXP PCA82C251 transceiver leads out a
High-speed CAN bus (ISO 11898-2), that allows bit rates up to
1 Mbit/s.
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PEAK-gridARM Eval Board – Hardware Manual
D-Sub CAN port J500 and switch block for the CAN termination
The bus is connected to the 9-pin D-Sub port. The pin assignment
for CAN corresponds to the specification CiA® 102.
Assignment of the D-Sub port for CAN,
GND and CAN_GND are connected at delivery.
If the evaluation board is connected to the end of a CAN bus and
this end isn't yet terminated, the CAN termination (120 Ω) available
on the board can be activated. This is done by setting both switches
of the switch block J500 to ON.
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PEAK-gridARM Eval Board – Hardware Manual
3.5
RS-232 Terminal
Via RS-232 (V.24 levels), the D-Sub port J502 provides a terminal
access for administrative purposes. With a D-Sub extension cable
(9-pin m-f, 1:1), a connection to a PC can be established. Alternatively, the RS-232 signals can be accessed via the pin header field
J503 (not equipped).
RS-232 port J502 (D-Sub 9-pin),
J503 (pin header field not equipped) alternatively
Assignment of the D-Sub connector for RS-232 Terminal
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PEAK-gridARM Eval Board – Hardware Manual
3.6
Function
Pin at J503
RxD
3
RtS
4
TxD
5
CtS
6
GND
9
RS-232 Debug
Via RS-232 (V.24 levels), the double pin header J501 provides debugging access. At delivery, the evaluation board is configured to
route output of the bootloader and of the Linux environment and to
receive input via this interface (see also 2.1 Starting the Board on
page 9). For further information about debugging, see the Hardware
Data Sheet of the gridARM microcontroller.
For a connection, the provided flat cable can be used. The connection to the PC is then done with a null modem cable (D-Sub 9 f-f).
Two LEDs can be used for the traffic indication for RxD and TxD. For
the corresponding configuration, see 4.5 Assigning Traffic LEDs on
page 35.
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PEAK-gridARM Eval Board – Hardware Manual
RS-232 port for debugging purposes.
3.7
Function
Pin at J501
RxD
3
TxD
5
GND
9
JTAG
For the development at the microcontroller, a JTAG interface with
two connection possibilities is available. J100 is a 10-pin double pin
header, J101 a 10-pin header socket with 1.27-mm grid.
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PEAK-gridARM Eval Board – Hardware Manual
JTAG ports J100 (double pin header) and J101 (header socket)
3.8
Function
Pin at J100
Pin at J101
GND
1, 2
3, 5, 9
μC Reset
3
none
3.3 V
4
1
TCK
5
4
TMS
6
2
TDO
7
6
TDI
8
8
RTCK
9
none
TRST
10
10
microSD™ Slot
Among others, the microSD card can be used for system updates. It
is connected to the gridARM microcontroller via the SPI bus.
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PEAK-gridARM Eval Board – Hardware Manual
microSD slot J400
Note: A plugged-in microSD card blocks the communication
with further devices that are connected to the SPI bus (e.g.
internally connected: 4 MB Flash-ROM). Remove the microSD
card in order to allow the communication with further devices
again.
3.9
Text Display Connector
At P400 and P401, a HD44780-compatible LC text display can be
connected. The pin assignment of such a display fits to the one on
the evaluation board.
The LCD contrast can be adjusted with the corresponding
potentiometer.
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PEAK-gridARM Eval Board – Hardware Manual
Pin headers P400 and P401 for a text display
and potentiometer for contrast adjustment
Connector pins of a text display
Pin at text
display
Pin at
P400/P401
Name Level
Function
1
2
P401-1
Vss
GND
Ground
P401-2
Vdd
5 V or 3.3 V
Supply
3
P401-3
Vo
0 - 1.5 V
Contrast voltage
4
P401-4
RS
High/Low
Register Select
5
P401-5
R/W
High/Low
High: read, Low: write
6
P401-6
E
High
Enable
7
P401-7
D0
High/Low
Data 0 (LSB)
8
P401-8
D1
High/Low
Data 1
9
P401-9
D2
High/Low
Data 2
10
P401-10
D3
High/Low
Data 3
11
P401-11
D4
High/Low
Data 4
12
P401-12
D5
High/Low
Data 5
13
P401-13
D6
High/Low
Data 6
14
P401-14
D7
High/Low
Data 7 (MSB)
15
P400-1
LED+
5 V or 3.3 V
LED background light +
16
P400-2
LED-
GND
LED background light -
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PEAK-gridARM Eval Board – Hardware Manual
3.10
I²C/SPI
Via the pin header H400, the signals of the communication busses
I²C and SPI can be accessed directly. The pin header is not equipped
at delivery. The pins have the following functions:
3.3 V
GND
I²C SCL
I²C SDA
μC Reset
SPI CS3
SPI CS2
SPI SCK
SPI MOSI
SPI MISO
Assignment of the connector H400 for I²C and SPI
Attention! The pins are directly connected to the
microcontroller and not protected. Incorrect use can cause
damage to the microcontroller.
On the evaluation board, the I²C bus internally connects the
following peripherals with 400 kbit/s:
System EEPROM (256 byte)
Buzzer
microSD card detection
Real-time clock (RTC)
RTC alarm input
7 freely available LEDs (see 3.11 on page 27)
6 freely available push buttons (see 3.11 on page 27)
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PEAK-gridARM Eval Board – Hardware Manual
On the evaluation board, the SPI bus internally connects the
following peripherals:
microSD card
4 MByte flash ROM
3.11
Digital inputs and outputs
The I²C bus connects six push buttons, the detection of a microSD
card, and the RTC alarm as digital inputs, and furthermore, seven
LEDs and a buzzer as digital outputs. They can be disconnected
separately from the inputs and outputs by opening the
interconnected jumpers.
The inputs can be directly accessed via the pin header field H402,
the outputs via H401.
Push buttons for digital inputs, LEDs for digital outputs,
jumpers for disconnection,
pin header fields H401 and H402 for direct access
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PEAK-gridARM Eval Board – Hardware Manual
3.12
Analog Inputs
Five analog inputs are directly led out from the gridARM microcontroller. The reference voltage is 3.3 V. Four of the analog inputs are
equipped with potentiometers.
A direct access to the analog inputs is provided by the pin header
field H403. To do this, the potentiometers must be separated from
the inputs by opening the interconnected jumpers.
Analog input 5 can optionally be used for measuring the VddBU
voltage (button cell). To do this, the solder field R454 (see figure
below) must be shortened by a solder jumper.
Solder field R454
for connection
μC AD4 to VddBU
Potentiometers for four analog inputs,
jumpers for disconnection, solder field R454,
pin header field H403 for direct access
Pin at H403
Function
1
Analog input 1 (μC AD0)
2
Analog input 2 (μC AD1)
3
Analog input 3 (μC AD2)
4
Analog input 4 (μC AD3)
5
Analog input 5 (μC AD4)
6
Not used
7
Not used
8
Not used
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PEAK-gridARM Eval Board – Hardware Manual
Pin at H403
Function
9
GND analog
(at delivery connected to GND)
10
3.3 V analog
Attention! The pins are directly connected to the microcontroller and not protected. Incorrect use can cause damage to
the microcontroller.
Note: The gridARM microcontroller is also available in a BGA
package with eight analog inputs.
3.13
Status LED Microcontroller
At delivery, the “μC status” LED is connected to port PA15 of the
gridARM microcontroller and it is freely programmable. For
example, it can be used as heartbeat indicator.
Microcontroller status LED
If the LED doesn't react when controlled by Port PA15, this may be
due to the jumper configuration (see 4.4 Using Microcontroller LED
or USB Detection on page 34).
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PEAK-gridARM Eval Board – Hardware Manual
3.14
Real-Time Clock
The real-time clock is connected to the gridARM microcontroller via
the I²C bus. It is buffered by the button cell if no supply voltage is
applied (JP429 set to 3-2).
The alarm signal of the real-time clock can be read via the I/O
module at the I²C bus (IO_B7).
3.15
Reset Push Button
Pressing the reset push button initiates a reboot of the PEAKgridARM Evaluation Board.
Reset push button
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PEAK-gridARM Eval Board – Hardware Manual
4
Configuration
On the PEAK-gridARM Evaluation Board, several hardware
functions can be configured:
Selecting the Boot Flash (below)
Activating the Write Protection for the System EEPROM (on
page 32)
Using I/O Interrupt or microSD™ Card Detection (on page 33)
Using Microcontroller LED or USB Detection (on page 34)
Assigning Traffic LEDs (on page 35)
Replacing the Button Cell for the Real-Time Clock (on page 37)
4.1
Selecting the Boot Flash
On start of the microcontroller a bootloader is loaded from either
the 16-bit or the 32-bit NOR flash. This is determined by the jumpers
JP200 and JP201.
The U-Boot bootloader can only be loaded from the 16-bit NOR
flash.
If jumper JP104 is open (port BMS receives High signal), the
bootloader contained in the gridARM microcontroller is started
instead of an external one.
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PEAK-gridARM Eval Board – Hardware Manual
Jumpers JP200, JP201, and JP104
Jumper setting JP200 and JP201
closed*
3-2*
open
2-1
Jumper setting JP104
open
closed*
NOR flash selection
16-bit at CS0 and 32-bit at CS2
32-bit at CS0
Bootloader
Internal of the gridARM μC
From external flash (CS0)
* Setting at delivery
4.2
Activating the Write Protection for
the System EEPROM
The system EEPROM (256 Byte, I²C connection) can be writeprotected with jumper JP430. In case of a microcontroller-internal
boot, it contains the boot order in the first 128 bytes. If using the U-
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PEAK-gridARM Eval Board – Hardware Manual
Boot bootloader (setting at delivery), the system EEPROM is not
needed and therefore completely available to the user.
Jumper JP430
Jumper setting
Write protection
open*
deactivated
closed
activated
* Setting at delivery
4.3
Using I/O Interrupt or microSD™ Card
Detection
Usually, the detection of a inserted microSD card is done via the I/O
module at the I²C bus (IO_B6). If required, the PA02 port at the
gridARM microcontroller can be used alternatively for this purpose.
To do so, jumper JP431 must be set over. In that case, the interrupt
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PEAK-gridARM Eval Board – Hardware Manual
line is disconnected from the I/O module and an interrupt signal is
not available anymore.
Jumper JP431
Jumper setting
Port PA02 connected to
1-2* Interrupt I²C I/O
2-3
microSD card detection
* Setting at delivery
4.4
Using Microcontroller LED or USB
Detection
Port PA15 of the gridARM microcontroller is assigned to the
“μC Status” LED (D407) at delivery. Alternatively, port PA15 can be
used as input for detection of a plugged USB cable at the evaluation
board (not useful if supply is done via the USB port). To do so,
jumper JP432 must be set over.
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PEAK-gridARM Eval Board – Hardware Manual
Jumper JP432
Jumper setting
Port PA15 connected to
1-2* “μC Status” LED
2-3
USB detection
* Setting at delivery
4.5
Assigning Traffic LEDs
Two of the four traffic LEDs can be assigned either to the CAN
communication or to the communication via RS-232 Debug. This is
done with the jumpers JP505 and JP506.
The remaining two traffic LEDs are permanently assigned to the
communication via RS-232 Terminal.
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PEAK-gridARM Eval Board – Hardware Manual
Transmit LED
CAN or Debug
Receive LED
CAN or Debug
Jumpers JP505 and JP506 and traffic LEDs
Jumper setting
Traffic indication for…
2-1*
2-1*
CAN Tx
CAN Rx
3-2
3-2
RS-232 Debug TxD
RS-232 Debug RxD
* Setting at delivery
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PEAK-gridARM Eval Board – Hardware Manual
4.6
Replacing the Button Cell for the
Real-Time Clock
The real-time clock (RTC) used by the evaluation board or the timer
as part of the gridARM microcontroller are supplied by a button cell
of the IEC type CR 2032 (3 V), as long as the evaluation board is
turned off.
Button cell for the real-time clock
A new button cell lasts several years. If the real-time clock indicates
an unexpected time, take out the button cell and measure its voltage. This should be around the nominal 3.0 Volts. If the measured
voltage is lower than 2.5 Volts, you should replace the button cell
with a fresh one.
Afterwards, the real-time clock must be set again.
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PEAK-gridARM Eval Board – Hardware Manual
5
Technical Specifications
Power supply
Supply voltage
12 V DC nominal, 8 - 30 V possible
Current consumption (at 12
V)
U-Boot idling:
Linux kernel idling:
Buffer battery for the realtime clock or VddBU
Button cell CR 2032, 3 V
100 mA
150 - 180 mA
gridARM microcontroller
Processor
ARM7TDMI® 32-Bit
Voltages
Core: 1.3 V; I/O: 3.0 V
Clock frequency
80 MHz
On-chip memory
256 KByte masked ROM (Grid BIOS, boot code)
160 KByte SRAM
Interrupt handling
Advanced Interrupt Controller (AIC)
Manufacturing
130-nm technology
Packages
QFP 208-pin or BGA 225-pin, RoHS
Further technical
specifications
See data sheets for the gridARM microcontroller 4
Gigabit Ethernet
Bit rates
10 Mbit/s, 100 Mbit/s, 1 Gbit/s
Phy
Micrel KSZ9021RLI (RGMII, MDIO/MDC)
CAN
4
Specification
ISO 11898-2, High-speed CAN
2.0A (Standard format) and 2.0B (Extended format)
Bit rates
up to 1 Mbit/s
Transceiver
NXP PCA82C251
Termination
120 Ω, switchable on board
http://gridconnect.com/media/documentation/grid_connect/GRIDARM_DS_01.pdf
http://gridconnect.com/media/documentation/grid_connect/gridARM_Hardware_DS.pdf
38
PEAK-gridARM Eval Board – Hardware Manual
SPI Serial Flash ROM
Size
4 MByte
SPI modes
0 and 3
Chip Erase Time
35 ms (typical)
Sector/Block Erase Time
18 ms (typical)
Byte Program Time
7 μs (typical)
Parallel Flash ROM
Size
4 MByte, 16-bit
8 MByte, 32-bit
Interface
Common Flash Interface (CFI)
Access time
70 ns
SDRAM
Size
64 MByte, 32-bit
Organization
4 Mbit x 16 I/O x 4 bank
Timing
166 MHz 3-3-3 PC166
Cycle
6 ns
I/O
Digital inputs (via I²C)
8: 6 push buttons, microSD card detection, RTC alarm
Digital outputs (via I²C)
8: 7 LEDs, 1 buzzer
Analog inputs
5: 5 potentiometers, 1 alternative for voltage
measurement of the button cell
All I/Os
Also direct access possible
Measures
Size
110 x 110 mm (L x W)
See also dimension drawing Appendix A on page 40
Weight
125 g
Environment
Operating temperature
-40 - +85 °C (-40 - +185 °F)
Temperature for storage
and transport
-40 - +100 °C (-40 - +212 °F)
Relative humidity
15 - 90 %, not condensing
39
PEAK-gridARM Eval Board – Hardware Manual
Appendix A
Dimension Drawing
The figure does not show the original size.
40
PEAK-gridARM Eval Board – Hardware Manual
Appendix B
Jumpers Overview
Jumpers on the top side
41
PEAK-gridARM Eval Board – Hardware Manual
Jumpers on the bottom side
42
PEAK-gridARM Eval Board – Hardware Manual
Jumper
JP100
JP101
Setting
Function
1-2*
VddBU 1.2 V from the supply
2-3
VddBU 1.2 V from the LDO/button cell (see JP429)
open*
closed
JP104
JP200 +
JP201
open
Internal bootloader of the gridARM μC
closed*
Boot from external flash (CS0)
open + 132-bit NOR flash at CS0
2
closed +
2-3*
JP202
JP203
JP400 JP404
JP405 JP411
JP412
JP413 JP418
JP419
JP420
JP427
Wake-up by switching between the two states
16-bit NOR flash at CS0 and 32 bit NOR flash at CS2
open*
Boot block of 16-bit NOR flash writable
closed
Boot block of 16-bit NOR flash write-protected
open*
Boot block of 32-bit NOR flash writable
closed
Boot block of 32-bit NOR flash write-protected
open
Analog inputs: external voltages on H403 pins 1 - 5 (0 - 3.3 V)
closed*
Analog inputs: pots RV401 - RV404
(Do not apply external voltages!)
open
Digital outputs A1 - A7: forwarding to H401 pins 1 - 7
closed*
Digital outputs A1 - A7: LEDs D400 - D406
(Do not apply external voltages!)
open
Digital output A8: forwarding to H401 pin 8
closed*
Digital output A8: beeper SP400
(Do not apply external voltages!)
open
Digital inputs B1 - B6: external voltages on H403 pins 1 - 6 (0
- 3.3 V)
closed*
Digital inputs B1 - B6: push buttons PB400 - PB405
(Do not apply external voltages!)
open
Digital input B7: external voltage on H402 pin 7 (0 - 3.3 V);
tip: set JP431 to 2-3
closed*
Digital input B7: microSD card detection via I²C I/O module
open
Digital input B8: RTC cannot trigger alarm
closed*
Digital input B8: RTC alarm via I²C I/O module
1-2
Supply LC display 3.3 V
2-3*
Supply LC display 5 V
43
PEAK-gridARM Eval Board – Hardware Manual
Jumper
JP429
JP430
JP431
JP432
JP500
JP505 +
JP506
JP600
Setting
Function
1-2
Real-time counter in the microcontroller is supplied by the
button cell (only useful with JP100 on 2-3)
2-3*
RTC at the I²C bus is supplied by the button cell
open*
System EEPROM writable
closed
System EEPROM write-protected
1-2*
PA02: interrupt from I²C I/O module
2-3
PA02: microSD card detection
1-2*
PA15: output for μC status LED
2-3
PA15: input for USB detection
1-2
CAN transceiver supply 3.3 V (e.g. TI SN56HVD230)
2-3*
CAN transceiver supply 5 V (e.g. NXP 82C251)
1-2 + 1-2
LEDs: CAN bus
2-3 + 2-3* LEDs: RS-232 Debug
1-2*
Board supply from USB
2-3
Board supply via supply socket (8 - 30 V DC)
* Setting at delivery
44
PEAK-gridARM Eval Board – Hardware Manual
Appendix C
Circuit Diagrams
On the following pages, the circuit diagrams of the PEAK-gridARM
Evaluation Board are enlisted, split up in the following sections:
Microcontroller
Memory
Ethernet
I/O
Serial
Power Supply
45
2
3
VddBU
COTP101
TP101
TP
TP
edge triggered
WakeUp
PIXT10 3
COC101
C101
PIC10101PIC10102
18pF
COC102
C102
PIC10201PIC10202
12pF
PIXT10 2
158
PIR11802PIU1000158
PIR120 2
COXT101
XT101
32.768KHz
XOUT32
PIXT10 1
203
PIU1000203
PIR11801
SHDN
159
PIU1000159
12pF
COC104
C104
PIC10401PIC10402
PIR12201
100nF
PLLRCA
PIR12202
207
PIU1000207
COR122 300R
R122
COC105
C105PIC10501PIC10502
XOUT
XIN32
XOUT32
PLLRCA
GRIDARM-208
GND
PIR12502
COR125
R125
1M
3V3
PIC10602 PIC10601
2
PIPB10002
1
CT
PIU10101
GND
3
PIU10103
1
PIPB10001
3
PIU10 5
5
PIR13601
GND VDD
COR136
R136
10k
COR103COR104COR105COR106
PIR12602
TDI
TMS
TCK
TDO
RTCK
PIR1 602
PIR1 702
GND
GND
1
PIR13702
PIR13701
PIJ10 1 PIJ10 3 PIJ10 5 PIJ10 7 PIJ10 9
PIJ10 2 PIJ10 4 PIJ10 6 PIJ10 8 PIJ10
COJ100
J100
100R
10
PIJ100010
PIR10702
100R
9
PIJ10009
PIR10802
100R
8
PIR11002
PIJ10008
100R
7
PIR11102
PIJ10007
100R
6
PIJ10006
PIR11302
100R
5
PIJ10005
PIR11402
4
PIJ10004
PIR13802
PIR13801
3V3
3
PIJ10003
COR138
R138
2
GND PIJ10002
0R
1
PIJ10001
GND
COR107
R107
PIR10701
COR108
R108
PIR10801
COR110
R110
PIR11001
COR111
R111
PIR11101
COR113
R113
PIR11301
COR114
R114
PIR11401
JTAG
COR116
COR117
R116 R117
PIR1 60110k PIR1 701 10k
1
TRST
RTCK
TDI
TDO
TMS
TCK
PIR12601
MR
PIPB10004
PIPB10003
COPB100
PB100
RST
COR134
R134
PIR13301
0R
PIR12302
PIR12402
PIR1230110k
PIR12401 100R
COR123
R123
2
COR135
R135 Bypass (default)
PIR13501
3V3dly
3,3V delayed
Delay = 133 usec
COR132
R132
S
D
3V3 PIQ1000S D
S PIQ1000D
G
PIR13202
PIR13201
3V3dly
0R
G
COQ100
Q100
SI2333
COR131
R131
PIR13101 1M
1V2uC
GND
JP100
1-2 default
GND
PIR13902
PIR13901
0R
3V3dly
1V2bat
D
PowerSupply.SchDoc
uC-Reset
1GB-Ethernet
1GB-Ethernet.SchDoc
B
uC-Reset
uC-Reset
COTP102
TP102
PITP10201 TP
1V2uC
3V3a
COU100A
U100A
12
PIU100012 VDDIO
30
PIU100030 VDDIO
44
PIU100044
VDDIO
55
PIU100055 VDDIO
68
PIU100068 VDDIO
77
PIU100077 VDDIO
94
PIU100094 VDDIO
107
PIU1000107 VDDIO
120
PIU1000120 VDDIO
137
PIU1000137 VDDIO
151
PIU1000151 VDDIO
177
PIU1000177 VDDIO
198
PIU1000198 VDDIO
22
36
PIU100036
76
PIU100076
96
PIU100096
110
PIU1000110
144
PIU1000144
183
PIU1000183
194
PIU1000194
PIU100022
204
1V2uC
PIJP10 01 VddBU 1V2uC
COR139
R139
PIJP10 03
PowerSupply
Memory.SchDoc
Reset uC
TP
PIT1031
PIC12002 PIC12001
COC120
C120
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
PIU1000204 VDDOSC
10
PIU100010
24
PIU100024
37
PIU100037
38
PIU100038
50
PIU100050
56
PIU100056
65
PIU100065
66
PIU100066
79
PIU100079
88
PIU100088
100
PIU1000100
106
PIU1000106
114
PIU1000114
124
PIU1000124
135
PIU1000135
140
PIU1000140
146
PIU1000146
175
PIU1000175
179
PIU1000179
193
PIU1000193
195
PIU1000195
PIR12701
PIR12702
GNDa
0R
3V3dly
COL101
L101
PIL10101
PIL10102
3V3a
COC111
BLM21P331SN1D PIC1 101 C111
PIC1 102 100nF
GND
201
GNDOSC PIU1000201
100nF PIU1000157
157
160
VDDOSC32
GNDOSC32 PIU1000160
C121
COC121
GND PIC12102 PIC12101
100nF PIU1000161
161
166
PIU1000166
VDDBU
GNDBU
COC122
C122
GND PIC12202 PIC12201
100nF PIU1000205
205
206
VDDPLLA GNDPLLA PIU1000206
C124
208
COC124
GND PIC12402 PIC12401
GNDPLLA PIU1000208
100nF
199
200
PIU1000199 VDDPLLB GNDPLLB PIU1000200
C135
COC135
GND PIC13502 PIC13501
100nF PIU1000173
173
174
AVDD
AGND PIU1000174
current consumption CPU,
worst case:
3,3V: 36mA
1,2V: 100mA
COR127
R127
GND
1V2uC
C114 PIC1 C115
PICCOC112
1C112
201
PICCOC113
1C113
301
PIC11401COC114
5COC115
01
PIC1 C116
6COC116
01
PIC1C117
7COC117
01
PICCOC118
1C118
801
PIC1 202 100nFPIC1 302 100nFPIC11402 100nFPIC1 502 100nFPIC1 602 100nFPIC1 702 100nFPIC1 802 100nF
GND
3V3dly
GND
PICCOC125
1C125
2501
COM100
M100
COU100D
U100D
19
Reserved
21
PIU100021 Reserved
23
PIU100023
Reserved
25
PIU100025 Reserved
60
PIU100060 Reserved
62
PIU100062 Reserved
64
PIU100064 Reserved
69
PIU100069 Reserved
71
PIU100071 Reserved
73
PIU100073 Reserved
75
PIU100075 Reserved
95
PIU100095 Reserved
97
PIU100097 Reserved
111
PIU1000111 Reserved
113
PIU1000113 Reserved
123
PIU1000123 Reserved
139
PIU1000139 Reserved
141
PIU1000141 Reserved
142
PIU1000142 Reserved
143
PIU1000143 Reserved
145
PIU1000145 Reserved
147
PIU1000147 Reserved
150
PIU1000150 Reserved
6 Layer Stack
PIU100019
Marking for Copper Layers
C
GND
C127 PIC12C128
PICCOC126
1C126
2601
PIC12701COC127
8COC128
01
PIC12C129
9COC129
01
PIC13C130
0COC130
1
PICCOC131
1C131
3101
C133
COC133 PIC13401C134
COC134
PICCOC132
1C132
3201
PIC13301
COM102
M102
PIM1010Bx
PIM1020Bx
AP M3
AP M3
COM103
M103
COM104
M104
PIM1030Bx
PIM1040Bx
AP M3
AP M3
Title:
GNDa
PEAK-gridARM-EVB
GRIDARM-208
PEAK-System Technik GmbH
Otto-Röhm-Str. 69
D-64293 Darmstadt
Engineer: StS
3
D
C PEAK-System Technik GmbH
PIC12502 100nFPIC12602 100nFPIC12702 100nFPIC12802 100nFPIC12902 100nFPIC130 2 100nFPIC13102 100nFPIC13202 100nFPIC13302 100nFPIC13402 100nF
Date:
File:
2
COM101
M101
GND
1V2bat from I/O sheet, I2C-RTC's coin cell
GRIDARM-208
R139+C122 optionally form a lowpass for delaying the VddBU-Reset Cell.
This will -not- work with VddBU coming from a coin cell (JP100 pos 2-3).
1
A
Memory
Reserved uC pins
3V3 DELAY
PIJP10002
Term_TxDi
Term_RxDi
Term_RtSi
Term_CtSi
GND
COTP103
TP103
COJP10
uC-Reset
COR124
R124
uC Power
1V2uC
Term_TxDi
Term_RxDi
Term_RtSi
Term_CtSi
CON2X5_S
PIR13302
COR133
R133
uC-Reset
0R
PPIIQR110310G2
Dbg_TxDi
Dbg_RxDi
470p PIC10701
PIR13502
COC123
C123 PIC12301
100nF PIC12302
Dbg_TxDi
Dbg_RxDi
COC107
C107 PIC10702
GND
C
CAN_Tx
CAN_Rx
PIR13401 2k2
4
PIU10104
PIU10 2
GND
Serial.SchDoc
CAN_Tx
CAN_Rx
Note 1:
In harsh environments it is strongly
recommended to tie this pin to GNDBU
if unused or to add an external lowvalue
resistor (such as 1 kOhm).
3V3
COU101
U101
100nF TPS3838K33DBVT PIR13402
PIR13602
Reset
3V3
COC106
C106
GND
COR126
R126
0R
Serial
IO.SchDoc
GND
BMS:
low for external BOOT via CS0
(SPI-flash or 16bit wide NOR flash)
(has int. 100k pullup)
Reset
B
alternative socket
PIR10301 PIR10401 PIR10501 PIR10601
162
PIU1000162
JTAGSEL:
high for Boundary Scan
(has int. 100k pulldown)
1nF
PIR12501
COJ101
J101
PIR10302 PIR10402 PIR10502 PIR10602
JTAG
1
TRST PIU10001
2
TDI PIU10002
6
TMS PIU10006
8
TCK PIU10008
4
TDO PIU10004
COR115
R115 1k
164 PIR11501 PIR11502
PIU1000164
JTAGSEL
VddBU Note
COR119
R119 1k
165
TST PIU1000165PIR11901 PIR11902 VddBU Note
COR121
R121 1k
104
BMS PIU1000104PIR12101 PIR12102 PIJP10401 PIJP10402 GND
COJP104
JP104
14
PIU100014
RST
COR120
R120
PIR120 1 1M
3V3
SHF-105-01-L-D-TH
WKUP0
COR118
R118 33R
XIN32
GND
COC103
C103
PIC10301PIC10302
PIR1 201 1M
XOUT
JTAG
SHDN
TRST
GND
COR137
R137
0R
COU100B
U100B
163
PIU1000163
12 MHz
PIR10101 1M
PITP10101
Board sleep mode not supported
MUST be 12MHz for internal BOOT ROM and USB COR109
R109 33R
COC100
C100
XIN
202
PIC10001PIC10002
PIR10901
PIR10902PIU1000202 XIN
PIXT10 1 XT100
18pF
PIR1 202
COXT100
COR112
R112
PIXT10002
PIXT10004
GND
COR101
R101
8
1
3
5
7
9
PITP10001
COJP101
JP101
uC clock
A
PIR10 01 1M
PIJP10101
COTP100
TP100
7
IO
3V3
PIR10102
10k
10k
10k
10k
wake up
PIJP10102
6
2
4
6
8
10
COR100
R100
GND
5
VddBU
1M to reduce bat current in SHDN mode
PIR10 02
4
R103
R104
R105
R106
1
4
5
6
7
Sheet:
uController
Customer:
Version:
Variant:
*
*
30.05.2012
uController.SchDoc
Page 1
8
1.2
of
6
1
2
COU100C
U100C
D0 PIU1000156
156
D0
D1 PIU1000155
155
D1
D2 PIU1000154
154
D2
D3 PIU1000153
153
D3
D4 PIU1000152
152
D4
D5 PIU1000138
138
D5
D6 PIU1000136
136
D6
D7 PIU1000134
134
D7
D8 PIU1000133
133
D8
D9 PIU1000132
132
D9
D10 PIU1000131
131
D10
D11 PIU1000130
130
D11
D12 PIU1000129
129
D12
D13 PIU1000128
128
D13
D14 PIU1000127
127
D14
D15 PIU1000126
126
D15
D16 PIU1000187
187
PCK2_PA16
D17 PIU1000186
186
PCK3_PA17
D18 PIU1000185
185
SCK1_PA18
D19 PIU1000184
184
RTS1_PA19
D20 PIU1000182
182
CTS1_PA20
D21 PIU1000180
180
TXD1_PA21
D22 PIU1000178
178
RXD1_PA22
D23 PIU1000176
176
TCLK0_PA23
D24 PIU100017
17
TCLK1_PA24
D25 PIU100015
15
TCLK2_PA25
D26 PIU100013
13
TIOA0_PA26
D27 PIU100011
11
TIOB0_PA27
D28 PIU10009
9
TIOA1_PA28
D29 PIU10007
7
TIOB1_PA29
D30 PIU10005
5
TIOA2_PA30
D31 PIU10003
3
TIOB2_PA31
A
3
4
5
6
7
8
32bit wide SDRAM
125 DQM0_A0
DQM0_A0 PIU1000125
122 DQM2_A1
NWR2_DQM2_A1 PIU1000122
118 A2
A2 PIU1000118
116 A3
PIU1000116
A3
112 A4
A4 PIU1000112
109 A5
A5 PIU1000109
108 A6
A6 PIU1000108
105 A7
A7 PIU1000105
28 A8
A8 PIU100028
29 A9
A9 PIU100029
31 A10
A10 PIU100031
32 A11
A11 PIU100032
33 A12
A12 PIU100033
34 A13
PIU100034
A13
35 A14
A14 PIU100035
40 A15
A15 PIU100040
42 A16_BA0
PIU100042
BA0_A16
45 A17_BA1
BA1_A17 PIU100045
46 A18
A18 PIU100046
47 A19
PIU100047
A19
48 A20
A20 PIU100048
49 A21
NAND_ALE_A21 PIU100049
51 A22
PIU100051
NAND_CLE_A22
189 A23
PCK0_A23_PA14 PIU1000189
COU200A
U200A
A2
23
PIU200023
A3
24
PIU200024
A4
25
PIU200025
A5
26
PIU200026
A6
29
PIU200029
A7
30
PIU200030
A8
31
PIU200031
A9
32
PIU200032
A10
33
PIU200033
A11
34
PIU200034
A10_SDRAM
22
PIU200022
A13
35
PIU200035
A14
36
PIU200036
A16_BA0
A17_BA1
DQM3
DQM2_A1
39 CAS
CAS PIU100039
41 RAS
RAS PIU100041
43 A10_SDRAM
SDA10 PIU100043
117 CKE_SDRAM
SDRAMCKE PIU1000117
119 WE_SDRAM
SDWE PIU1000119COR207
121 R207
33R CLK_SDRAM
PIR20702
SDRAMCLK PIU1000121 PIR20701
NRD
NWR0
DQM1_NWR1
DQM3_NWR3
B
SDRAM x 16
SDRAM x 16
20
PIU200020
21
PIU200021
39
15
PIU200039
PIU200015
COU201A
U201A
A2
23
PIU201023
A0
A3
24
PIU201024
A1
A4
25
PIU201025
A2
A5
26
PIU201026 A3
A6
29
PIU201029 A4
A7
30
PIU201030
A5
A8
31
PIU201031 A6
A9
32
PIU201032 A7
A10
33
PIU201033
A8
A11
34
PIU201034
A9
A10_SDRAM
22
PIU201022 A10
A13
35
PIU201035
A11
A14
36
PIU201036
A12
2
D16
DQ0 PIU20002
4
D17
DQ1 PIU20004
5
D18
DQ2 PIU20005
7
D19
DQ3 PIU20007
8
D20
DQ4 PIU20008
10
D21
DQ5 PIU200010
11
D22
DQ6 PIU200011
13
D23
DQ7 PIU200013
42
D24
DQ8 PIU200042
44
D25
PIU200044
DQ9
45
D26
DQ10 PIU200045
47
D27
DQ11 PIU200047
48
D28
PIU200048
DQ12
50
D29
DQ13 PIU200050
51
D30
DQ14 PIU200051
53
D31
PIU200053
DQ15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
A16_BA0
A17_BA1
20
PIU201020
21
PIU201021
2
D0
DQ0 PIU20102
4
D1
DQ1 PIU20104
5
D2
DQ2 PIU20105
7
D3
DQ3 PIU20107
8
D4
DQ4 PIU20108
10
D5
DQ5 PIU201010
11
D6
DQ6 PIU201011
13
D7
DQ7 PIU201013
42
D8
DQ8 PIU201042
44
D9
PIU201044
DQ9
45
D10
DQ10 PIU201045
47
D11
DQ11 PIU201047
48
D12
PIU201048
DQ12
50
D13
DQ13 PIU201050
51
D14
DQ14 PIU201051
53
D15
PIU201053
DQ15
BA0
BA1
A
DQM1
39
PIU201039 DQMH
DQM0_A0 PIU201015
15
DQML
DQMH
DQML
CKE_SDRAM
37
PIU200037
CKE
CLK_SDRAM
38
PIU200038 CLK
CKE_SDRAM
37
PIU201037
CKE
CLK_SDRAM
38
PIU201038 CLK
NCS1_SDRAM
19
PIU200019
CS
RAS
18
PIU200018 RAS
CAS
17
PIU200017 CAS
WE_SDRAM
16
PIU200016 WE
NCS1_SDRAM
19
PIU201019
CS
RAS
18
PIU201018 RAS
CAS
17
PIU201017 CAS
WE_SDRAM
16
PIU201016 WE
MT48LC32M16A2
MT48LC32M16A2
197 OE_NORflash
PIU1000197
COU200B
U200B
16 WE_NORflash
PIU100016
196 DQM1
85 DQM3
28
VSS
41
VSS
54
PIU200054
VSS
PIU1000196
PIU200028
PIU100085
PIU200041
103 NCS0_NORflash
NCS0 PIU1000103
181 NCS1_SDRAM
SDCS_NCS1 PIU1000181
115 NCS2_NORflash32
NCS2 PIU1000115
102
PIU1000102
NAND_CS_NCS3
6
VSSQ
12
PIU200012 VSSQ
46
PIU200046
VSSQ
52
PIU200052 VSSQ
PIU20006
GRIDARM-208
GND
VCC
VCC
VCC
1
14
27
PIU200027
COU201B
U201B
28
VSS
41
VSS
54
PIU201054
VSS
PIU20001
PIU201028
PIU200014
PIU201041
3
VCCQ PIU20003
9
VCCQ PIU20009
43
PIU200043
VCCQ
49
VCCQ PIU200049
3V3
6
VSSQ
12
PIU201012 VSSQ
46
PIU201046
VSSQ
52
PIU201052 VSSQ
COC201
C201
PIC20 02
COC200 PPIICC2200110021
PIC20 01 C200
2.2uF
PIU20106
100nF
GND
MT48LC32M16A2
GND
VCC
VCC
VCC
B
1
14
27
PIU201027
PIU20101
PIU201014
3
VCCQ PIU20103
9
VCCQ PIU20109
43
PIU201043
VCCQ
49
VCCQ PIU201049
3V3
COC203
C203
PIC20202
COC202 PPIICC2200330021
PIC20201 C202
2.2uF
100nF
GND
MT48LC32M16A2
COR204 1k
R204
16bit wide NOR flash
uC CONSTRAINT:
With BMS=0, NOR access at startup is 16bit only.
NOR flash x 16
COU204
U204
R200
COR200
JP202
10k
PIR20 02
COC210
C210
PIR20 01 100nF
PIJP20 2
COJP202 PIJP20 1
PIC210 1
PIC210 2
GND GND
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
BYTE#
VCC
RY/BY
WProt_Bootblk_NOR16
14
PIU204014
uC-Reset
12
PIU204012
OE_NORflash PIU204028
28
WE_NORflash
11
PIU204011
26
PIU204026
PIJP20001 PIJP20002
ACC
RESET
OE
WE
CE
D
47
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A2
25
PIU202025
A3
24
PIU202024
A4
23
PIU202023
A5
22
PIU202022
A6
21
PIU202021
A7
20
PIU202020
A8
19
PIU202019
A9
18
PIU202018
A10
8
PIU20208
A11
7
PIU20207
A12
6
PIU20206
A13
5
PIU20205
A14
4
PIU20204
A15
3
PIU20203
A16_BA0PIU20202
2
A17_BA1PIU20201
1
A18
48
PIU202048
A19
17
PIU202017
A20
16
PIU202016
A21
9
PIU20209
A22
10
PIU202010
A23
13
PIU202013
AVOIDANCE#3:
BMS=0, all three NOR chips populated,
a small 16 bit NOR on "-CS0" to load UBOOT from,
a large 32bit NOR on "-CS2" for all the other things.
X-I-P possible...
R202 1k
COR202
PIU204047
PIR20202
PIR20201
3V3
37 hi=16bit mode
PIU204037
3V3
COC204 PIC20502 COC205
C205
PIC20402 C204
15
PIU204015
PIC20401 100nFPIC20501 2.2uF
46
VSS PIU204046
27
VSS PIU204027
GND
3V3
R206
COR206
10k
PIR20601
COC211
C211
PIR20602 100nF
PIJP203 2
COJP203 PIJP2031
PIC21101
PIC21102
GND GND
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
COU203
U203
ACC
RESET
OE
WE
CE
29
31
PIU202031
33
PIU202033
35
PIU202035
38
PIU202038
40
PIU202040
42
PIU202042
44
PIU202044
30
PIU202030
32
PIU202032
34
PIU202034
36
PIU202036
39
PIU202039
41
PIU202041
43
PIU202043
45
PIU202045
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
PIU202029
BYTE#
PIU202047
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
47 hi=16bit mode
37
VCC PIU202037
RY/BY
WProt_Bootblk_NOR32
14
PIU202014
uC-Reset PIU202012
12
OE_NORflash
28
PIU202028
WE_NORflash 11
PIU202011
CS_NORflash32
26
PIU202026
15
PIU202015
3V3
C206 PIC20702 COC207
C207
PIC20602 COC206
PIC20601 100nFPIC20701 2.2uF
GND
46
VSS PIU202046
27
VSS PIU202027
A2
25
PIU203025
A3
24
PIU203024
A4
23
PIU203023
A5
22
PIU203022
A6
21
PIU203021
A7
20
PIU203020
A8
19
PIU203019
A9
18
PIU203018
A10
8
PIU20308
A11
7
PIU20307
A12
6
PIU20306
A13
5
PIU20305
A14
4
PIU20304
A15
3
PIU20303
A16_BA0PIU20302
2
A17_BA1PIU20301
1
A18
48
PIU203048
A19
17
PIU203017
A20
16
PIU203016
A21
9
PIU20309
A22
10
PIU203010
A23
13
PIU203013
ACC
RESET
OE
WE
CE
29
31
33
PIU203033
35
PIU203035
38
PIU203038
40
PIU203040
42
PIU203042
44
PIU203044
30
PIU203030
32
PIU203032
34
PIU203034
36
PIU203036
39
PIU203039
41
PIU203041
43
PIU203043
45
PIU203045
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
PIU203029
BYTE#
PIU203047
PIU203031
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
C
47 hi=16bit mode
37
VCC PIU203037
3V3
COC208 PIC20902 C209
COC209
PIC20802 C208
RY/BY
WProt_Bootblk_NOR32
14
PIU203014
uC-Reset PIU203012
12
OE_NORflash
28
PIU203028
WE_NORflash 11
PIU203011
CS_NORflash32
26
PIU203026
15
PIU203015
PIC20801 100nF PIC20901 2.2uF
GND
46
VSS PIU203046
27
VSS PIU203027
GND
SST38VF64
SST38VF64
NCS0_NORflash
WProt_Bootblk_NOR32
CS_NORflash32
PIJP20102
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
GND
SST38VF64
JP201
COJP201
PIJP20101
NOR flash x 16
COU202
U202
AVOIDANCE#2:
BMS=1, starts a "micro loader" from SPI flash,
which in turn sets the registers to 32 bit access
and then loads UBOOT from the 32bit wide NOR flash
(and all the rest, maybe X-I-P).
Slow start, but X-I-P lateron possible...
GND
COJP200
JP200
NCS0_NORflash
29
31
PIU204031
33
PIU204033
35
PIU204035
38
PIU204038
40
PIU204040
42
PIU204042
44
PIU204044
30
PIU204030
32
PIU204032
34
PIU204034
36
PIU204036
39
PIU204039
41
PIU204041
43
PIU204043
45
PIU204045
PIU204029
JP203
3V3
Adjust together
Default open: no Bootblock protection
C
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
NOR flash x 16
AVOIDANCE#1:
Accepted because cheap !
BMS=0, 16bit wide NOR flash only (starting with A1).
Probably too slow for X-I-P.
Default open: no Bootblock protection
DQM2_A1
25
PIU204025
A2
24
PIU204024
A3
23
PIU204023
A4
22
PIU204022
A5
21
PIU204021
A6
20
PIU204020
A7
19
PIU204019
A8
18
PIU204018
A9
8
PIU20408
A10
7
PIU20407
A11
6
PIU20406
A12
5
PIU20405
A13
4
PIU20404
A14
3
PIU20403
A15
2
PIU20402
A16_BA0PIU20401
1
A17_BA1PIU204048
48
A18
17
PIU204017
A19
16
PIU204016
A20
9
PIU20409
A21
10
PIU204010
A22
13
PIU204013
PIR20401 3V3
hi=16bit mode
PIR20402
32bit wide NOR flash
Title:
PEAK-gridARM-EVB
PIJP20103 NCS2_NORflash32
uC-Reset
PO\UC0RESET
uC-Reset
uC-Reset
uC-Reset
PEAK-System Technik GmbH
Otto-Röhm-Str. 69
D-64293 Darmstadt
Engineer: StS
valid combinations:
JP200 closed AND JP201 2-3
JP200 open AND JP201 1-2
1
D
C PEAK-System Technik GmbH
CS_NORflash32
Date:
File:
2
3
4
5
6
7
Sheet:
Memory
Customer:
Version:
Variant:
*
*
30.05.2012
Memory.SchDoc
Page 2
8
1.2
of
6
1
2
3
4
5
6
7
8
3V3
PIR3340133R
PIR3350133R
33R
PIR33601
PIR3370133R
53
RXCLK PIU100053
54
RXCTL PIU100054
57
RXD0 PIU100057
58
PIU100058
RXD1
59
RXD2 PIU100059
61
RXD3 PIU100061
CLK125
PHY_INTR
MDIO
MDC
52
PIU100052
81
PIU100081
PIR30601
COR306
R306
3V3
PIR30602
RGMII_RxClk
RGMII_RxCtl
RGMII_RxD0
RGMII_RxD1
RGMII_RxD2
RGMII_RxD3
COR338
R338
PIR33802
COR339
R339
PIR33902
COR340
R340
PIR34002
COR341
R341
PIR34102
COR342
R342
PIR34202
COR343
R343
PIR34302
Clk125
COR344
R344
PIR34402
Phy_Int
COR303
R303
PIR30302
3k3
82
83
3V3
MDIO
MDC
PIU100082
PIU100083
PIR30401
COR304
R304
LDO_O
ISET
3V3
3V3
50
PIU301050
47
PIU301047
D300
BAW56
PIR30802
COD30
PO\UC0RESET
uC-Reset
PIR30801 10k
PID30003
PIC30401
PID30 02
PIC30402
DA_P
DA_N
DB_P
7
PIJ30007
DB_N
5
PIJ30005 DC_P
6
PIJ30006 DC_N
8
PIJ30008
DD_P
9
PIJ30009 DD_N
Vcc
PIJ30002
3
PIJ30003
10
PIJ300010
COC300
C300
GND
100nF
PIC30001PIC30002
4
PIJ30004
DB1_P
DB1_N
DC1_P
DC1_N
A
RJ45 Giga
n.c.
yellow = activity
14
3V3 PIJ300014 Aye
COR301
R301
220R
13
PIR30101
PIR30102
PIJ300013
Cye
R302
220R
12
LED cathodes COR302
PIR30201
PIR30202
PIJ300012 Cgn
11
3V3 PIJ300011 Agn
green = connect
COC301
C301
when new layout, pls. swap pin13+14 !!
(here by accident = green+green) GND PIC30102 PIC30101
1nF
DD1_P
DD1_N
Eth_LED1
Eth_LED2
COL
CRS
XI
57
PIU301057
COR305
R305
62
PIU301062
60
PIR30502
COR307
R307
PIU301060
PIR30702
PIJ30 B3
PIJ30 B4
1
PIJ30001
WE-7499111440
56
PIU301056
COC304
C304
RESET
KSZ9021RLI
XO
59
PIU301059
PIR30501
GND
COC302 33pF
C302
PIC30201 PIC30202
PIR30701
1M
Delay > 10msec after power stable
Shield
5k1 maybe ?
4,99k
33R
COR309
R309
COR308
R308
PID30 01
2
DA1_P
DA1_N
PIR30 02100R
COJ300
J300
PIR30402
49
PIU301049 MDIO
3k3PIU301048
48
MDC
PHYconfig
GRIDARM-208
COR300
R300
Shield
RGMII_TxClk
RGMII_TxCtl
RGMII_TXD0
RGMII_TXD1
RGMII_TXD2
RGMII_TXD3
PIR3330133R
PIR30 01
WE-7499111440 (-40..+85°C)
B4
33R
PIR33201
internal Termination
32
1
PIU301032 GTX_CLK
TxRxP_A PIU30101
33
2
PIU301033
Tx_EN
TxRxM_A PIU30102
24
PIU301024 TxD0
25
7
PIU301025
TxD1
TxRxP_B PIU30107
26
8
PIU301026 TxD2
TxRxM_B PIU30108
27
PIU301027
TxD3
10
TxRxP_C PIU301010
33R 46
11
PIR33801PIU301046 Rx_CLK
TxRxM_C PIU301011
33R 43
PIR33901PIU301043 Rx_DV
33R
42
14
PIR34001
PIU301042
RxD0
TxRxP_D PIU301014
33R
41
15
PIR34101
PIU301041
RxD1
TcRxM_D PIU301015
33R 38
PIR34201PIU301038 RxD2
33R
36
21
PIR34301
PIU301036
RxD3
LED1 PIU301021
19
LED2 PIU301019
33R 55
PIR34401PIU301055 CLK125_NDO
45
Rx_ER PIU301045
0RPIU301051
51
31
PIR30301
INT
Tx_ER PIU301031
Shield
80 COR332
R332
PIR33202
TXCLK PIU100080
63 COR333
R333
PIR33302
TXCTL PIU100063
70 COR334
R334
PIR33402
TXD0 PIU100070
72 COR335
R335
PIR33502
TXD1 PIU100072
COR336
74
R336
PIR33602
TXD2 PIU100074
COR337
78
R337
TXD3 PIU100078 PIR33702
COU301A
U301A
RGMII
B3
COU100E
U100E
A
RJ45
1GBit PHY
GEMAC
PIXT30 3
PIR30901
GND
COXT300
XT300
PIXT30004
PIXT30002
PIR30902
PIXT30 1
GND
25MHz
PIC30301 PIC30302
COC303
C303
33pF
E-LQFP-64
1uF
GND
B
B
COR345
R345
PIR34502
PHY Strapping Options
0R
PIR34501
Bypass (default=open)
Bootstrap Options
----------------PHY- Address (5bit):
0- 0- <pin46>- <pin19>- <pin21>
- > set to " 00001"
Mode (4bit):
<pin36>- <pin38>- <pin41>- <pin42>
- > set to " 1111" = RGMII Mode - advertise all capabilities
Clk125enable (1bit):
<pin43>
- > set to " 1" = Enable 125kHz Clock Output at Pin 55
LEDmode (1bit):
<pin55>
PHY Power
1V2D1
COR314
R314
3V3
PIR31401
3V3
PIR31601
3V3
PIR31801
PIR31402
10k
COR316
R316
PIR31602
10k
COR318
R318
PIR31802
Eth_LED1
COR315
R315
PIR31502
GND
Phy_Addr0
1k
R317
Eth_LED2 PIR31701COR317
PIR31702
1k
COR319
R319
RGMII_RxClk
GND
Phy_Addr1
GND
Phy_Addr2
PIR31501
PIR31901
PIR31902
4k7
4k7
COR320
R320
COR321
R321
3V3D1
44
PIU301044 3,3VD
37
PIU301037 3,3VD
30
PIU301030 3,3VD
20
PIU301020 3,3VD
53
39
34
28
PIU301028
23
PIU301023
18
PIU301018
17
PIU301017
PIU301053
GND
PIU301039 GND
3V3
PIR32001
PIR32002
RGMII_RxD0
4k7
PIR32201
3V3
PIR32401
3V3
PIR32601
PIR32102
GND
Mode 0
4k7
COR322
R322
3V3
PIR32101
PIU301034
PIR32202
RGMII_RxD1
4k7
COR323
R323
PIR32301
PIR32302
GND
Mode 1
GND
Mode 2
GND
Mode 3
4k7
COR324
R324
PIR32402
4k7
R326
COR326
PIR32602
4k7
RGMII_RxD2
GND
COR325
R325
PIR32501
PIR32502
4k7
R327
RGMII_RxD3 PIR32701COR327
PIR32702
4k7
GND
GND
GND
GND
GND
1,2VA_PLL
COL301
L301
58
PIU301058
13
12
1,2VA PIU301012
5
1,2VA PIU30105
4
PIU30104
1,2VA
1,2VA PIU301013
64
3,3VA PIU301064
61
3,3VA PIU301061
16
3,3VA PIU301016
6
3,3VA PIU30106
63
AGNDH PIU301063
9
AGNDH PIU30109
3
AGNDH PIU30103
GND
65
E_PAD PIU301065
1V2_PLL1
1V2phy
1V2A1
3V3A1
PIL30101
1V2_PLL1
PIL30102
BLM21P331SPT
PIC31202 100nF
PIC31 01
GND
COL302
L302
1V2phy
PIL30201
1V2A1
PIL30202
BLM31A601SPT
C315
PIC3C314
14COC314
01
PICCOC315
31501
PIC31402 100nFPIC31502 10nF
PIC31302+ C313
COC313
10uF
PIC31301
GND
COL303
L303
1V2phy
PIL30301
1V2D1
PIL30302
BLM21P331SPT
C319
PIC3C317
17COC317
01
PIC3C318
18COC318
01
PICCOC319
31901
PIC31702 100nFPIC31802 100nFPIC31902 100nF
PIC31602+ C316
COC316
10uF
GND
PIC31601
KSZ9021RLI
GND
current consumption PHY,
worst case:
3,3V: 133mA
1,2V: 563mA
(1GBit duplex 100%)
L304
COL304
3V3
PIL30401
3V3A1
PIL30402
BLM21P331SPT
C324
PIC3C322
2COC322
01
PIC3C323
23COC323
01
PICCOC324
32401
PIC320 2+ C320
COC320
47uF
R328
COR328
3V3
PIR32801
PIR32802
RGMII_RxCtl
4k7
PIR32902
GND
Clk125-enable
PIL30501
PIR33001
4k7
PIR33002
Clk125
COR331
R331
PIR33101
PIR33102
GND
GND
LEDmode
PEAK-gridARM-EVB
3V3D1
PIL30502
BLM21P331SPT
3V3
Title:
COL305
L305
3V3
PIC32502+ C325
COC325
PIC3260+
2 COC326
C326
C330
PIC3C328
28COC328
01
PIC3C329
29COC329
01
PICCOC330
301
47uF
47uF
PIC32802 100nFPIC32902 10nF PIC10nF
302
PIC32501
PIC32601
4k7
PEAK-System Technik GmbH
Otto-Röhm-Str. 69
D-64293 Darmstadt
Engineer: StS
Date:
File:
1
2
3
4
5
D
C PEAK-System Technik GmbH
R329
COR329
PIR32901
4k7
COR330
R330
PIC32 02 100nFPIC32302 10nF PIC32402 10nF
PIC320 1
GND
D
C
C312
PICCOC312
31201
PIC31 02+ C311
COC311
10uF
1,2V, current up to 0,6A
PHY Strapping Options
C
COU301B
U301B
54
PIU301054 1,2VD
52
PIU301052 1,2VD
40
PIU301040 1,2VD
35
PIU301035 1,2VD
29
PIU301029 1,2VD
22
PIU301022 1,2VD
6
7
Sheet:
1GBit Ethernet
Customer:
Version:
Variant:
*
*
30.05.2012
1GB-Ethernet.SchDoc
Page 3
8
1.2
of
6
5
6
COJP430 PIJP4302
SCL
SDA
PIR40402
I2C
Atmel 24C02
open=write enable
PIR40401
EEPROM necessary for gaLoader
Must be Addr. = 0x50
100nF
GND
8
Vcc
7
PIU40007
WP
6
PIU40006
SCL
5
PIU40005 SDA
I2C
COR404
R404
10k
PIJP40 1
PIJP403 1 PIJP402 1
PIJP401 2
GND
PIJP40 2
MISO
------------CS
MOSI
SCLK
GND
PID41302
3V3
5V0_USBin
to power supply sheet
PIR45502
PIR45501
PIR45602
15k
UI_P
3
PIL40003
2
PIL40002
L400
COL400
4
PIL40004
UA_N
1
UA_P
PIL40001
COR449
R449 18R
PIR44901
PIR44902
PIR45101
PIR45102
PIJ40102
COR451
R451 18R
DLW31SN900SQ2
PIJ40101
COR450
R450
PIR44701
PIR44801
GNDa
3V3a
Term_RtSi
POTERM0RTSI
POTERM0CTSI
Term_CtSi
Term_TxDi
POTERM0TXDI
Term_RxDi
POTERM0RXDI
149
PIU1000149 USB_DDP
USB PIU1000148
148
USB_DDM
Dbg_RxDi
Dbg_TxDi
Debug RS232
Term_RtSi
Term_CtSi
Term_TxDi
Term_RxDi
PIU100020
89
CANTX PIU100089
87
CANRX PIU100087
CAN
DBG_RXD_PA00
DBG_TXD_PA01
RS232 Terminal
27
PIU100027 RTS0_PA03
84
PIU100084 CTS0_PA04
86
PIU100086 TXD0_PA05
90
PIU100090 RXD0_PA06
R446
R445
R444
R443
R442
R441
PIR4 101 PIR4 201 PIR4 301 PIR4 401 PIR4 501 PIR4 601
COR441 COR442 COR443 COR4 4 COR4 5 COR4 6
2
GRIDARM-208
10k
10k
10k
10k
1nF
93
I2C_SCL PIU100093
91
I2C_SDA PIU100091
I2C
3
INT
I2C
22
PIU402022
SCL
23
PIU402023
SDA
21
A0
2
A1
3
PIU40203 A2
PIU402021
PIU40202
GND
4
IO_A0 PIU40204
5
IO_A1 PIU40205
6
IO_A2 PIU40206
7
IO_A3 PIU40207
8
IO_A4 PIU40208
9
IO_A5 PIU40209
10
IO_A6 PIU402010
11
IO_A7 PIU402011
internal pull up
POCAN0TX
CAN_Tx
CAN_Rx
POCAN0RX
10k
10k
PIR42801
10k
PIR42701
10k
PIR40502
10k
PIR40602
10k
PIR40702
10k
PIR43202
COR421
R421
PIR42101
COR422
R422
PIR42201
COR423
R423
270R
270R
PIR41902
PIR42002
270R
PIR42102
COR400
R400
PIR40001
COR411
R411
PIR41101
PIR41102
COR412
R412
PIR41201
PIR41202
COR413
R413
PIR41301
1k
PIR41302
COR414
R414
PIR41401
PIR41402
COR415
R415
PIR41501
PIR41502
COR416
R416
PIR41601
PIR41602
COR424
R424
PIR42401
COD400
D400
PID4000K
COD401
D401
PID4010K
COD402
D402
PID4020K
COD403
D403
PID4030K
COD404
D404
PID4040K
COD405
D405
PID4050K
COD406
D406
PID4060K
270R
PIR41802
270R
270R
PIR42302
270R
PIR42402
100R
PIR40002
PIR42301
PIR42202
B
3V3
YE
PID4000A
YE
YE
PID4010A
PID4020A
COSP400
SP400
F/UCW-06
GN
GN
PID4050A
RD
PID4060A
COT402
T402
YE
PID4030A
PISP40001+
PISP40002
PID4040A
PIT40203
BeepPIT40201
Push Buttons
COJP421PIPB40001
1k JP421
PIPB40002
PIT40202
PIPB40004
PIPB40003
COPB400
PB400
PIPB40104
PIPB40103
COPB401
PB401
GND
PIJP42101 PIJP42102
COJP422
1k JP422
PIPB40102
PIPB40101
PIJP42201 PIJP42202
COJP423PIPB40201
JP423
PIPB40202
COPB402
PIPB40204 PB402
PIPB40203
PIJP42301 PIJP42302
COJP424
1k JP424
PIPB40302
PIPB40301
PIPB40304
PIPB40303
COJP425PIPB40401
1k JP425
PIPB40402
PIPB40404
PIPB40403
COJP426PIPB40501
1k JP426
PIPB40502
PIPB40504
PIPB40503
PIJP42401 PIJP42402
PIJP42501 PIJP42502
COPB403
PB403
COPB404
PB404
C
COPB405
PB405
PIJP42601 PIJP42602
GND
when new layout, pls. correct PB's footprint !!
(here by accident = shortcut, always pressed)
COU405
U405
TPS77012
1PIU40501
IN
OUT
user port B
(unprotected)
PIR42901
C409
COC409PIC40901
1uF PIC40902
2
EN
FB
to uC pin 161 (VddBU)
5
1V2bat
PIU40505
4
PIU40504
PIU40502
COC410
PIC410 1 C410
PIC410 2 4.7uF
5uA nom.
TP400
COTP400
PITP40001 TP
VddBU
400kHz max.
4
GND
3V3
PIH402 1 PIH402 PIH402 3 PIH402 4 PIH402 5 PIH402 6 PIH402 7 PIH402 8 PIH402 9 PIH40210
COH402
H402
3V3
SCL
SDA
PIR41901
COR420
R420
PIR42001
COJP413
JP413
PIJP41301 PIJP41302
COJP414
JP414
PIJP41401 PIJP41402
COJP415
JP415
PIJP41501 PIJP41502
COJP416
JP416
PIJP41601 PIJP41602
COJP417
JP417
PIJP41701 PIJP41702
COJP418
JP418
PIJP41801 PIJP41802
COJP419
JP419
PIJP41901 PIJP41902
COJP420
JP420
PIJP42001 PIJP42002
13
IO_B0 PIU402013
14
IO_B1 PIU402014
15
IO_B2 PIU402015
16
PIU402016
IO_B3
17
IO_B4 PIU402017
18
IO_B5 PIU402018
19
PIU402019
IO_B6
20
IO_B7 PIU402020
PCA9555PW
COR418
R418
PIR41801
COR419
R419
3V3
GND
COJP405
JP405
PIJP40501 PIJP40502
COJP406
JP406
PIJP40601 PIJP40602
COJP407
JP407
PIJP40701 PIJP40702
COJP408
JP408
PIJP40801 PIJP40802
COJP409
JP409
PIJP40901 PIJP40902
COJP410
JP410
PIJP41001 PIJP41002
COJP411
JP411
PIJP41101 PIJP41102
COJP412
JP412
PIJP41201 PIJP41202
100nF
GND
Output register can't be read back !
COR429
R429
PIR42902
R428
COR428
PIR42802
R427
COR427
PIR42702
COR405
R405
PIR40501
COR406
R406
PIR40601
R407
COR407
PIR40701
R432
COR432
PIR43201
CAN_Tx
CAN_Rx
3V3
(unprotected)
internal pull up
PIU4021
5
32.768 kHz
PIXTCOXT400
40 1
XT400
real time clock
COC407
C407
3V3
PIXT40003
PIXT40002
100nF
COU404
U404
GND PIC40702 PIC40701
8
1
PIXT40 4
PIU40408 Vcc
R437
Xi PIU40401
COR437
7
2
3V3 PIR43702 PIR43701 PIU40407 Out
Xo PIU40402
6
3
PIU40406 SCL
Vbat PIU40403 PIR43801 PIR43802
10k
5
4
PIU40405 SDA
Vss PIU40404
COR438
R438
I2C
M41T81S
1k
26
R403 0R
I2C_INT
COR403
PA02 PIU100026PIR40301 PIR40302
COR457
188
R457 0R
PIR43502 PIR43402
PA15 PIU1000188PIR45701 PIR45702
R435
COR435
R434
COR434
COD407 COR440
D407
R440
PIJP43202
for "USB power detect"
2k2
2k2
PIJP43203
3V3 PID4070A PID4070KPIR44002 PIR44001PIJP43201
PIR43501 PIR43401
unnecessary
when
board
powered
from
USB
270R
GN
JP432
COJP432
uC heartbeat LED
1-2 default
3V3
PIR4 102 PIR4 202 PIR4 302 PIR4 402 PIR4 502 PIR4 602
10k
3V3
1
18
20
PIU100018
C412
COC412
PIC41202 PIC41201
M
P
4
50
COU402
U402
COR410
R410
PIR410 222k 1
PIU40201
GND
Shield
COR452
R452
92
100R MISO
MISO_PA07 PIU100092
98
MOSI
MOSI_PA08 PIU100098
99
SCK
SCK_PA09 PIU100099PIR45201 PIR45202
101
CS0_SPI
SPICS0_PA10 PIU1000101
192
CS1_SPI
SPICS1_PA11 PIU1000192
191
CS2_SPI
SPICS2_PA12 PIU1000191
190
CS3_SPI
SPICS3_PA13 PIU1000190
SPI
COU100F
U100F
168
AD0
169
PIU1000169 AD1
170
PIU1000170 AD2
171
PIU1000171 AD3
172
PIU1000172 AD4
67
PIU100067 AD_EN
PIR44702
167
PIR44802
PIU1000167 ADVREF
PIU1000168
0R
0R
10k
(unprotected)
5* ADC in
COR447
R447
COR448
R448
3V3a
3V3a
Dbg_TxDi
PODBG0TXDI
ADC
GND
Ain0i
Ain1i
Ain2i
Ain3i
Ain4i
PIJ40100
PIJ40105
GND
Digikey 490-1067-1-ND
COH403
H403
PIR45002
1
2
PIJ40103 3
0R
PIR45001
PIJ40104
PIR45601
22k
USB-B-THT
UI_N
COJP431
PIU402 4
PIC40502PIC40501
Header 14
SDcard_detect
User
controls
(These parts optional in own designs)
PIH401 PIH401 2 PIH401 3 PIH401 4 PIH401 5 PIH401 6 PIH401 7 PIH401 8 PIH401 9 PIH401 0
3V3 C405
COC405
PIR410 1
3V3
3V3
3V3
PID41301
COR455 PID41303 R456
COR456
R455
COJ401
J401
PODBG0RXDI
Dbg_RxDi
PIJP43101
SCL
SDA
3V3
USB
D
16
PIJP43102
SST25VF032
COC413
C413PIC41302PIC41301100nF
Vcc
user & system I/O's
COD413
D413
BAT54S
C
1 PIH40301
2 PIH40302
3 PIH40303
4 PIH40304
5 PIH40305
6 PIH40306
7 PIH40307
8 PIH40308
9 PIH40309
10 PIH403010
COH401
H401
3V3
1
PIP40102 2
Contrast PIP40103
3
RSel
PIP40104 4
R/W
PIP40105 5
EN
PIP40106 6
LCD-D0 PIP40107
7
LCD-D1 PIP40108
8
LCD-D2 PIP40109
9
LCD-D3 PIP401010
10
LCD-D4 PIP401011
11
LCD-D5 PIP401012
12
LCD-D6 PIP401013
13
LCD-D7 PIP401014
14
COTP403
TP403
SDcard_detect
PITP40301 TP
SDcard_detect
user port A
MISO
MOSI
SCK
CS0_SPI
PIJP401 PIJP40 1
COJP404 COJP403 COJP402 COJP401 COJP40
COP401
P401
PIP40101
GND
2
PIJP402
JP400
PIJP403 2
JP401
PIJP40 2
JP402
0R
JP403
COR454
R454
PIR45402
GND
PCA9554PW
SDcard_detect
serial flash
3V3 COU403
U403
8
2
PIU40308 VCC
SO PIU40302
COC406
C406 PIC40602 PIU40303
3
5
WP
SI PIU40305
7
6
PIC40601 PIU40307
100nF
HOLD SCK PIU40306
4
1
PIU40304 GND
CS PIU40301
PIR43102
PIT40102
GND
GND
Output register can't be read back !
MOSI
SCK
PIJP43103
JP404
PIR45401
GND
GND
Relations:
Dat0
Dat1
Dat2
Dat3
CMD
CLK
PIR43002
1k lin
VddBU
PIU4018
MISO
COTP404
TP404
CORV400 PITP40401
RV400
PIRV40003
TP
1k lin
PIRV40 02
LCD_power
GND
COR409 SD Drive attached
R409
10k via SPI to the gridARM uC
PIR42602
3k3
3V3a
PIRV40402
3V3
GND
GND
HD44780-Display, optional
A
GND
100nF
PIRV40 01
RTC_Alarm
PIR43101
SCL
SDA
1
PIU40101
A0
2
PIU40102
A1
3
PIU40103 A2
4
P0 PIU40104
5
P1 PIU40105
6
P2 PIU40106
7
P3 PIU40107
9
PIU40109
P4
10
P5 PIU401010
11
P6 PIU401011
12
P7 PIU401012
1
2
3
4
5
6
7
8
9
10
PIR40902
15
PIU401015
GND
100nF
COC401
C401
PIC40102PIC40101
COR402
R402
PIR40202220R
GND
TP401
COTP401
RTC_Alarm
PITP40101 TP
PIJP42901 COJP429
JP429
2-3 default
PIJP42902
+
PIRV40401
PIR40901
MicroSD
14
PIU401014
PIC40401PIC40402
1
2
1
2
3
4
5
6
7
8
9
10
1k lin
GNDa
0R
PIR45302
8
1
PIJ40001
2 CS1_SPI
PIJ40002
3
PIJ40003
5
PIJ40005
9 SDcard_detect
PIJ40009
PIJ40008
3V3
3k3
3V3a
COR431
R431
PIRV40302
CORV404
PIRV40 3
RV404
7 PIR45301
PIJ40007
I2C
GND
PIRV40301
SCL
SDA
INT
12
PIR43001
PIH40001
13
PIU401013
I2C_INT
PIRV40202
PIH40002
from uC sheet
SDA
SCL
I2C_INT
GNDa
DAT0
DAT1
DAT2
CD/DAT3
CMD
CLK
Carddetect
3k3
3V3a
COR430
R430
1k lin
PIH40003
ca. 2.9V
PIRV40201
CORV403
PIRV403
RV403
PIH40004
PIU401 6
COU401
U401
COT401
T401
SDcard_detect
GNDa
GND
COR453
R453
Micro-SD
VCC
GND
Case
Case
Case
Case
Carddetect
COR426
R426
PIR42601
CORV402
PIRV402 3
RV402
PIH40005
PO\UC0RESET
uC-Reset
8
6
B1
PIC40301100nF PIJ4000B1
B2
PIJ4000B2
47uFPIC40201
B3
PIJ4000B3
B4
PIJ4000B4
GND
10
PIJ400010
PIJ40006
3V3a
PIRV40102
1k lin
PIH40006
USB (udp)
PIRV40101
I2C
PIH40007
(optional)
3V3 C404
COC404
SCL
SDA
uC-Reset
CS3_SPI
CS2_SPI
SCK
MOSI
MISO
microSD card
COJ400
J400
4
PIJ40004
4* analog in COR425
R425
PIR42501
PIR42502
CORV401
PIRV401 3
RV401
3k3
GNDa
3V3
0R
B
PIH40008
JP431
1-2 default
PID41201
PIR43602
COC402
C402PIC40202 + PIC40302COC403
C403
GNDa
PIH40009
PIT40101
100R
PIP40002
Header 2
PIR40201
PIT40103
PIR40101 PIP40001
GND
PIT40 03
LCD_switch
PIT4051
MISO
MOSI
SCK
CS0_SPI
CS1_SPI
CS2_SPI
CS3_SPI
PID41 01
PID41202
COD412
D412
Ain4i
PID41203
BAT54S
PID41 02
COD411
D411
Ain3i
PID41103
BAT54S
PID410 1
BAT54S
PID40901
BAT54S
BAT54S
PID40801
PID410 2
COD410
D410
Ain2i
PID41003
COR436
R436PIR43601
3V3
GND
PIH400010
PIT40001
COTP405
TP405
text display
SPI
10R for current limit
3V3a
Clamp Diodes
PID40802
PID40902
COD408
COD409
D408
D409
Ain0i
Ain1i
PID40803
PID40903
COTP406
TP406
GND
COP400
P400
COR401
R401
PIR40102
COT400PIT40 02
T400
GND
GND
SPI
3V3
GND
3V3 A2 -must- be log.1 (=CS) !!
2 x 64k x 8
GND
(unprotected)
periph. buses
ADC
1
2
PIU40002
3
PIU40003
4
PIU40004
PIU40001
GND
24LC1025I/SN
www.microchip.com
COH400
H400
10
9
8
7
6
5
4
3
2
1
A0
A1
A2
Vss
PIU40008
LED Backlight
1k
SCL
SDA
Hitachi HD44780 compat. display
COR433
R433
PIR43301
PIJP42703
PIJP42701
3V3
COJP427PIJP42702 2-3 default
JP427
5V0aux
PIT4061
COU400
U400
BCR112
GND
8
7 PIR43302
PIU40607
6
PIU40606
5
PIU40605
PIU40608
3V3
PIC40002 PIC40001
GND
LCD
text display
(These parts optional in own designs)
BCR191
Vcc
WP
SCL
SDA
COC400
C400
PIJP430 1
8
GND
EEPROM
TP
1
A0
2
PIU40602
A1
3
PIU40603
A2
4
PIU40604 Vss
A
100nF
GND
PIC41102 PIC41101
PIU40601
In some devices, address lines internally not connected !!
Carefully read eeprom's data sheet !!
3V3
1k x 8
COU406
U406
I2C
(These parts optional in own designs)
3V3
COC411
C411
JP430
EEPROM
TP
I2C
(These parts mandatory in own designs !)
7
BCR112
4
Display_Pwr_Switch
3
24
2
Vcc
1
PPIIJCP4402890013 COC408
C408
PIC40802 100nF
PIBC40 2
BC400
COBC400
PIBC40 1 CR2032
RTC Alarm
D
C PEAK-System Technik GmbH
Title:
GND
PEAK-gridARM-EVB
RTC_Alarm
PEAK-System Technik GmbH
Otto-Röhm-Str. 69
D-64293 Darmstadt
Engineer: StS
Date:
File:
6
7
Sheet:
I/O
Customer:
Version:
Variant:
*
*
30.05.2012
IO.SchDoc
Page 4
8
1.1
of
6
1
2
3
4
5
6
7
8
COTP502
TP502
PITP50201
CAN
TP
Reset CAN
COU507
U507
CAN_Rxi
5V0aux
4
PIU50004
PIJP50003
PIJP50001
8 PIR50001
RS PIU50008
COR500
R500
7
CANH PIU50007
RXD
3V3
3
PIJP50 02
PIU50003 VCC
COJP500 COC500
JP500
C500 PIC50 02
2-3 default
2
100nFPIC50 01PIU50002 GND
GNDiso
CANL
REF
6
1PIL50001
PIU50006
COD500
D500
5
PIU50005
In1
GNDiso
COC524 PIC52401
C524
Out2
Out1
3
PIL50003
4
PIL50004
WE-SL1 51µH
2PID50002
1
PID50001
PID50 3
3
COR518
R518
PIR51802
PIR52402
COR524
R524
0R
Using a 5V CAN transceiver (U500) like NXP's 82C251:
Set jumper JP500 to pos 2-3 (=5V supply)
--Using a 3,3V CAN transceiver (U500) like TI's SN65HVD230:
Set jumper JP500 to pos 1-2 (=3.3V supply)
Remark: CAN levels might be slightly reduced.
PIR51801
PIR52401
0R
47pF
1
PIJ50001
6
PIJ50006
GND
2
7
PIJ50007
3
PIJ50003
8
PIJ50008
4
PIJ50004
9
PIJ50009
5
PIJ50005
COC526
C526
0
PIJ50000
PIC52602PIC52601
PIJ50002
PESD1CAN
3.3V solution:
SN65HVD230
47pF
CANH
PIC52502
CAN
COJ500
J500
COC525
PIC52501 C525
PIC52402
CANL
PIS50 04 PIS50 03
GNDiso
COS500
PPIISR55003012 PPIISR55004022
COR503
R503
62R
COR504
R504
62R
COD516
PIR50301 PIR50401
COR506
R506
GNDiso
PIR50601
PID51601
PID51701
COC501
C501
10
PIJ500010
PIC50102PIC50101
GND
1nF
SUB-D 9
COD517
PID51602
A
GNDiso
1nF
male
CAN_Rx
1
PIU50001
TXD
D516
PESD24VL1BA
POCAN0RX
CAN_Rx
CAN_Txi
4
3
CAN_Tx
2PIU50702
S500
POCAN0TX
CAN_Tx
0R
PIR52502
1
2
PIR50501 10k
A
MAX810L EUR+T
3
VCC PIU50703 5V0aux
RESET
1
GND PIU50701 GNDiso
PIR50002 GNDiso
COL500
0R
L500
2PIL50002
In2
COR525
R525
PIR52501
PCA82C251T
optional assembly
COU500
U500
COR505
R505
CAN termination
isolated
PIR50502
D517
PESD24VL1BA
3V3
Shield
PID51702
PIR50602
PIC50202 COC502
PIC50201 C502
0R
10nF
GNDiso
GNDiso
CAN_Tx
CAN_Rx
ADuM-1201 bypass
B
B
Activity
LEDs
(These parts optional in own designs)
COJP505
PIJP50502
11
10
PIU502010
14
T1_OUT PIU502014
7
T2_OUT PIU50207
RS232 PIU502 TEXT2
13
R1_IN PIU502013
8
R2_IN PIU50208
100nF
PIR51501
PIR51502
PIR51601
PIR51602
PIR51701
PIR51702
R515
COR515
COR516
R516
COR517
R517
PIR52001
COR520
R520
Term_TxD
Term_RtS
Term_RxD
100R
GND
Term_CtS
100R
4
PIC51702 COC517
C2+
C517 PIU50304
5
PIC51701
PIU50305 C2100nF
11
T1_IN
T2_IN
PIU503 TEXT1 TTL
closed
12
PIU503012 R1_OUT
JP504
9
COJP504
PIU50309 R2_OUT
TTL PIJP50402 PIJP50401
PIU503011
GND
Dbg_RxDi
PODBG0RXDI
Dbg_RxDi
JP502 10
COJP502
PIJP50202 PIJP50201
PIU503010
open
MAX3232
V+
V-
2
6
PIU50302
100nF
GND
PIU50306
14
T1_OUT PIU503014
7 JP503
COJP503
T2_OUT PIU50307PIJP50301 PIJP50302
P
I
U
5
0
3
T
E
X
T
2
closed
RS232
13
R1_IN PIU503013
8
R2_IN PIU50308
10
PIJ502010
1
1
PID510 1
PIR52201
100nF
R522
COR522
PIR52202
GND
GND
GND
GND
PIR52301
PIR52302
R523
COR523
DTE male
nullmodem cable f-f
Terminal
100R
Dbg_RxD
Dbg_TxD
PID51302 COD513
D513 PID51402 COD514
D514
COC506
C506
220nF
PIC50601PIC50602
CTL2
GND
GND
DEBUG
Adjust R522 + R523 pads as square
GND
COC510
C510
PIC51001PIC51002
220nF
COC512
C512
220nF
PIC51201PIC51202
CTL4
GND
100R
LED1
GND IN1
18
PIU501018
17
IN2
PIU501017
16
IN3
PIU501016
15
IN4
PIU501015
14
LED1
PIU501014
13
LED2
PIU501013
12
LED3
PIU501012
11
LED4
PIU501011
LED2
COR513
R513
PIR51301
1PID50501
COD505
D505
COR514
R514
PIR51401
1PID50601
COD506
D506
R519
COR519
PIR51901
1PID51101
D511
COD511
LED3
1M
PIR51302
COD501
D501
COR501
R501
PID5010K PID5010A PIR50101
PIR50102
YE
270R
COD502
D502
COR502
R502
PID5020K PID5020A PIR50201
PIR50202
YE
270R
COD503
D503
COR507
R507
3V3
TxD
3V3
RxD
3V3
TxD
RS232 Debug
or CAN
IN1
LED4
PID5030K PID5030A PIR50701
270R
COD504
D504
COR508
R508
PID5040K PID5040A PIR50801
PIR50802
3V3
RS232 Terminal
RxD
270R
YE
3
BAT54
PIR50702
YE
PID50503
1M
PIR51402
C
IN2
3
PID50603
BAT54
1M
PIR51902
IN3
3
PID51103
BAT54
PESD15
1
PID50901
PESD15
1
PID50801
PESD15
COC516
C516
100nF
COC518
C518
RS232
CTL3
PIC51601 PIC51602
PIC51801 PIC51802
CTL1
Shield
PESD15
2
PIU50303 C1-
C514
PIC51402 COC514
PIC51401
0
PIJ50200
B1
B2
B3
B4
B5
B6
B7
B8
PIC50302 COC503
20
PIC50301 C503
10
100nF
PIU501010
PIU501020
74VHC245
SUB-D 9
COC511
C511
PIC51101PIC51102
1nF
GND
PID507 2 COD507
PID508 2 COD508
PID509 2 COD509
PID510 2 D510
COD510
D507
D508
D509
PID50701
3V3
16
IVCC PIU503016
15
IGND PIU503015
COJ502
J502
1
6
PIJ50206
Term_TxD
2
PIJ50202
Term_CtS
7
PIJ50207
Term_RxD
3
PIJ50203
Term_RtS
8
PIJ50208
4
PIJ50204
9
PIJ50209
5
PIJ50205
100R
PIR52002
10-89-1101
PIJ50201
100R
RS232 (Debug)
COU503
U503
COC513
C513
1
PIC51301 100nFPIU50301
C1+
3
GND
GND
Adjust R515 + R517 pads as square
Adjust R516 + R520 pads as square
PIC51302
PIR51001
COR510
R510
VCC
GND
IN[1..4]
T1_IN
T2_IN
PIU502 TEXT1 TTL
12
PIU502012 R1_OUT
9
PIU50209 R2_OUT
PIU502011
Term_RxDi
Term_CtSi
PIC50901 PIC50902
COC509
C509
MAX3232
COJ501
J501
1
2
PIJ50102
3
4
PIJ50104
5
6
PIJ50105 PIJ50106
7
8
PIJ50107 PIJ50108
9
10
PIJ50109 PIJ501010
PIJ50101
PIJ50103
GND
10-89-1101
GND
COC515
C515
220nF
PIC51501PIC51502
R521
COR521
PIR52101
1
PID51201
D512
COD512
1M
PIR52102
IN4
3
PID51203
BAT54
D
C PEAK-System Technik GmbH
Title:
PEAK-gridARM-EVB
1
PID51301 PESD15 PID51401 PESD15
1
D
1
2
PIJ50301 PIJ50302
0R
3
4
PIR50902
PIJ50303 PIJ50304
5
6
PIR51002PIJ50305
PIJ50306
0R
7
8
PIJ50307 PIJ50308
9
10
PIJ50309 PIJ503010
PIU501019
opt. DTE male
nullmodem cable f-f
Term_TxDi
Term_RtSi
COC507
C507
100nF
PIC50701 PIC50702
COJ503
J503
0R
2
2
V+ PIU50202
6
V- PIU50206
100nF
100nF
GND
2
4
PIC50802 COC508 PIU50204
C2+
5
PIC50801 C508 PIU50205
C2-
C
C505
PIC50502 COC505
PIC50501
2
16
IVCC PIU502016
15
IGND PIU502015
3
PIU50203
C1-
Dbg_TxDi
PIR51202
Term_TxD
Term_RxD
Term_RtS
Term_CtS
3V3
PIC50402 COC504
C504
1
PIC50401
100nFPIU50201 C1+
PODBG0TXDI
Dbg_TxDi
PIR51201
0R
COR512
R512
Adjust R509 + R510 pads as square
COU502
U502
POTERM0RXDI
Term_RxDi
POTERM0CTSI
Term_CtSi
PIR51102
COR509
R509
PIR50901
RS232 (TTY)
POTERM0TXDI
Term_TxDi
POTERM0RTSI
Term_RtSi
COR511
R511
PIR51101
DCE female
prolong cable m-f
Adjust R511 + R512 pads as square
2
PIJP50603
alternative source for activity LED 1 + 2
Term_RxDi
Term_TxDi
2
JP506
COJP506
PIJP50602
Dbg_TxDi
Dbg_RxDi
PIJP50503
PIJP50601
CTL[1..4]
JP505
GND
LED[1..4]
default: 1-2 (=CAN)
3V3
COU501
U501
19
G
1
PIR53101
PIR53102
PIU50101
3V3
DIR
COR531
R531 1k
2
PIU50102 A1
3
PIU50103 A2
Term_RxDi
4
PIU50104 A3
Term_TxDi
5
PIU50105
A4
CTL1
6
PIU50106 A5
CTL2
7
PIU50107 A6
CTL3
8
PIU50108 A7
CTL4
9
PIU50109
A8
PIJP50501
GND
GND
PEAK-System Technik GmbH
Otto-Röhm-Str. 69
D-64293 Darmstadt
Engineer: StS
Date:
File:
1
2
3
4
5
6
7
Sheet:
Serial
Customer:
Version:
Variant:
*
*
30.05.2012
Serial.SchDoc
Page 5
8
1.2
of
6
1
2
3
4
5
6
7
8
JP600:
1-2: Supply from USB
2-3 Supply from ext. power
-NEVER- tie 1-2-3 together,
as this will destroy your PC !
Input
PIJ60001
CT1210K30
C601
PIC601COC601
02
PIC60101 1nF
GND
PIJ60002
PHOENIX_MC_2
COJ601
J601
3
8-30V
2
PIJ60102
1
PIJ60101
Input
8...30V
PIF60002
PID601 K
COD601
D601
PID6010A
COD600
D600
PID6000A
SK34B
PID6000K
PIL60001
COJP600
JP600
PIL60002
WE744772100
COC607
PIC60702 C607
PIC60701 1nF
PIJP60003
C608
PIC60802 COC608
PIC60801 1uF
USB power in
COL605
L605
PIJP60001
PIL60501
COR600
R600
5V
PIL60502
PIR60001
WE742792116
PIJP60 02
COC600
C600 PIC60 02
1uF
COD604 PID604 K
PIC60 01
PIR60002
5V
A
5V0_USBin
0R
Vusb from I/O sheet
PID6040A
CT1210K30
GND
C610
PIC610COC610
2
RS 448-382
NEB/J21R
PIV60 01
PIF60001
C602 3AT
PIC60202COC602
COV600
V600 PIC60201 100nF
Shield
GND
PIJ60103
PIV60 2
COL600
L600
D604
1
2
40V/3A
COF600
F600
1-2 default
8-30V
A
Vsupply
SMDJ30CA
COJ600
J600
SMCJ5.0
ext. power in
PIC610 1
9..12V/2A DC Wall Adaptor
1nF
PIV601 2
PIV60101
digikey "SMDJ30CATR-ND"
C611
PIC61102COC611
COV601
V601
PIC61101
GND
GND
GND
100nF
Shield
max. 29V here
Vin
COTP600
TP600
COTP604
TP604
TP
TP
3.3V
Vin
COC604
COC625
C604 COC624
C624 C625
PIC62502
PIC62501
15
PIU600015
19
PIU600019
GND GND GND
Thr. 1.25 V
20
PIU600020
200 kHz
PIR60301
PIR60302
4
PIU60004
COR603
R603
1
15k
PIU60001
COC626
C626 PIC62602
C606
PIC60602 COC606
C609
PIC60902 COC609
10pF PIC62601
PIC60601 1.5nF
PIC60901 6.8nF
EN
Boost
SYNC
COMP
SS/Track
LM20333
COL601
L601
7
SW PIU60007
8
SW PIU60008
13
SW PIU600013
14
SW PIU600014
VIN
5
VIN
6
PIU60006 VIN
PIU60005
FB
PIU60 9 PIU60 10 PIU60 1 PIU60 12 PIU60 21
PITP60201
1.2V
3.3V
4.5V to 36V nom.
16
PIU600016
VIN
COTP602
TP602
TP
PITP60101
GND
GND
GND
GND
AGND
EP
PIC60401
PIC62402
PIC62401
4.7uF 50V
33uF 50V
PIC60402 +
4.7uF 50V
max. 29V here
Vin
COU600
U600
GND
17
PIU600017
2
PIU60002
18
Vcc
PIU600018
PGOOD
PIU60003
3
WE744770122
22uH 3A
COD602
D602
COC603
C603
PIC60302PIC60301 PID6020K
PID6020A
100nF
GND
CMMSH1-40-NST
Keep Feedback Wiring
Away From Inductor Flux !
COR604
R604
PIR60401
PIR60501
PIR61902
COR619
R619
PIR61901 1k2
PIR60102
COR601
R601
COC614
C605 PIC61402 C614
PIR60101 30k PIC60502 COC605
PIR60202
PID6070A
10k
6
EN
PIU60107 Pgood
3
PIU60103
SGND
8
PIU601011 PGND
PIU60108
100R
Power PID607 K GN
PIR60602
PIC61C615
5COC615
01
PIC61C616
6COC616
01
COR606
R606
GND
PIC6110uF
502
PIC61602 10uF
PIR60601 270R
1
SW PIU60101
10
SW PIU601010
Vin
9
PIU60109
Vin
PIU60106
PIR62201
COD607
D607
COD60P5ID605 A
COR602
R602
2
PIU60102
COR622
R622
PID605 K
COL602
L602
WE7447789001
COU601
U601
3V3
PIR62202
PIL60201
PIL60202
PIU60105
Bias
4
PIU60104
1.2V
PIR60801
MIC4720YMME
COR611
2MHz
R611
PID6030K
PID6030A
COC618
C618
PIR61102
COR608
COC613
R608 PIC61301 C613
PIR60802
COD603
D603
PIR610 1
COC617
PIC61701 C617
SSA33L
B
COR607
R607
5
FB
PIR61101
10k
PIC61302 82pF
0R ca. 563 mA for PHY core
PIR60701
PIR60702
1V2phy
populate R607 after test
COR609
R609
0R ca. 100 mA for uC core
PIR60902
PIR60901
1V2uC
populate R609 after test
COR610
R610
PIR610 2 47k
PIC61702 4.7uF
PIC61801
PIC61802 100nF
10R
1%
GND
TP
1,2V
PIR60502
PIC60501 100uF PIC61401 100uF
PIR60201 10k
PIR60402
populate R605 after test
COR605
R605 0R
nom. 2A, max. 3A
PIL601023.3V
PIL60101
GND GND
GND
GND
GND
GND
COC612
PIC61202 C612
9
10
11
12
21
B
COTP601
TP601
PITP60401
D605
BZV55C3V9
PITP60001
PIC61201 1uF
PIT60 02
GND GND
GND
GND GND
GND
-no- SoftStart capacitor (C609): fastest startup
GND
GND GND
GND
COT600
T600
GND
BCR191
PIT60001
when new layout, pls. add inverter transistor !!
(here by accident, PGOOD misinterpreted)
maybe some addtl. delay
PIT60 3
PIR620 2
1V2 on, when 3V3 good
COR621
R621
PIR62102
PIR62101
10k
COR620
R620
COC629
PIC62901 C629
PIC62902 10nF
PIR620 1 100k
C
C
GND
GND
to SERIAL- and IO-sheet
5V0aux
CAN 5V iso supply
COTP606
TP606
TP
TP
5V0iso
5V0non-iso
PITP60601
COR612
R612
PIR61201
CAN 5V non-iso supply (for CAN transceiver and LCD text display)
COTP605
TP605
PITP60501
PIR61202
0R
COR613
R613
PIR61301
populate either R612 or R613 after test
PIR61302
0R
TP
COTP603
TP603
COU604
U604
COL604
L604
5V / 250mA
8
PIL60401
PIL60402
PIU60408 OUT
WE742792022
6
PIC62802+ C628
COC628 C620
COC620PIC620 2 C621
COC621PIC62102 C622
COC622PICPIU60406
CXN
62 01
PIC62801 10uF
GNDiso
PIT6031
62 02 7
10uFPIC620 1 10uFPIC62101 1uFPICPIU60407
5
PIU60405
GND
GND GND GND
CXP
PGND
COL603
L603
WE742792022
3
IN PIU60403
/SKIP
1
PIU60401
2
/SHDN PIU60402
GND
PIL60301
PIR61402
COC623
COR614 PIC62302C623
R614
PIR61401120k PIC62301 2.2uF
PIL60302
3V3
PIC6190+
2 C619
COC619
PIC61901 10uF
4
PIU60404
MAX682ESA
GND
GND
GND
GNDiso
If 5V CAN transceiver is required:
Populate one of the shown 5V power supplies.
Depending on whether galvanic isolation is necessary or not.
COR617
R617
PIR61702
PIR61701
GNDiso
0R
default: shorten GNDs
GND
D
D
C PEAK-System Technik GmbH
Title:
PEAK-gridARM-EVB
PEAK-System Technik GmbH
Otto-Röhm-Str. 69
D-64293 Darmstadt
Engineer: StS
Date:
File:
1
2
3
4
5
6
7
Sheet:
Power Supply
Customer:
Version:
Variant:
*
*
30.05.2012
PowerSupply.SchDoc
Page 6
8
1.2
of
6