ACS8944 JAM PLL
Jitter Attenuating, Multiplying Phase Locked Loop
for OC-12/STM-4
ADVANCED COMMUNICATIONS
COMMS & SENSING
FINAL
EVALUATION BOARD
ACS8944 JAM PLL
Evaluation Board (EVB)
Overview
This document describes the ACS8944 JAM PLL
Evaluation Board (EVB). It describes how to set-up and
operate the board in order to exercise and evaluate the
functionality of the ACS8944 JAM PLL. The PCB Schematic
and Bill of Materials (BOM) are included.
This document should be read in conjunction with the
ACS8944 JAM PLL Datasheet.
Revision 1/January 2007 © Semtech Corp.
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Table of Contents
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EVALUATION BOARD
Section
Page
Overview ..................................................................................................................................................................................................... 1
Description ................................................................................................................................................................................................. 3
Features..............................................................................................................................................................................................3
Hardware Description ........................................................................................................................................................................3
PCB Description .................................................................................................................................................................................4
PCB Configuration..............................................................................................................................................................................4
PCB Layout Recommendations ........................................................................................................................................................5
Bill Of Materials ......................................................................................................................................................................................... 6
Schematic .................................................................................................................................................................................................. 7
Trademark Acknowledgements ................................................................................................................................................................ 8
Revision Status/History ............................................................................................................................................................................ 8
Abbreviations ............................................................................................................................................................................................. 8
Notes .......................................................................................................................................................................................................... 9
Ordering Information .............................................................................................................................................................................. 10
Disclaimers...................................................................................................................................................................................... 10
Contacts........................................................................................................................................................................................... 10
Revision 1/January 2007 © Semtech Corp.
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Description
FINAL
Features
The ACS8944 JAM PLL Evaluation Board (EVB) provides
the means to quickly set-up and evaluate the functionality
and performance of the ACS8944 JAM PLL device. The
ACS8944 can be configured using simple jumper settings
on the EVB.
The board provides differential line input and output
connections via SMB connectors, with appropriate
termination circuitry for LVPECL signals. The required RC
components that define the loop filter bandwidth can be
determined from the datasheet for the specific
application. These must then be soldered to the
underside of the board.
EVALUATION BOARD
z
4-layer populated PCB
z
Surface-mounted ACS8944 JAM PLL
z
SMB connectors for a differential clock input and
differential output
z
Jumpers to configure input and output clock
frequencies
z
Pushbutton switch for board reset
z
Single 3.3V supply connection
Hardware Description
Figure 1 Annotated EVB - Top View
0 V DC SK1 Terminal Block
+3.3 V DC
JMP1
Configuration
Jumpers
Decoupling Capacitor
Probe Point
(VDD)
Probe Point
(VDD)
Lock Detector
Probe Point
(Active Low)
Ref Clock
Differential Input (-ve)
SMB Connector
IN
Ref Clock
Differential Output (+ve)
SMB Connector
Ref Clock
Differential Input (+ve)
SMB Connector
OUT
Ref Clock
Differential Output (-ve)
SMB Connector
Probe Point
(RESET Bar)
Probe Point (GND)
Probe Point
(GND)
LVPECL Input
Termination
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ACS8944 JAM PLL
Page 3
SW1
RESET Switch
LVPECL Output
Termination
F8944EVB_001annotop_01
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
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Figure 2 Annotated EVB - Bottom View
PLL Loop Filter Components
C7 (PCB) = Datasheet C2
R9 (PCB) = Datasheet R1
C8 (PCB) = Datasheet C1
C10 (PCB) = Datasheet C3
R10 (PCB) = Datasheet R2
C9 (PCB) = Datasheet C4
Note... C7 and C9 landing pads
allow different sized capacitors
C5, C6, C13, C14, C15, C16: 3.3 V Supply Decoupling Capacitors
C11, R11: RC Delay for Reset
R12, C17: Lock Detector Filter Components
F8944EVB_annotbotfig2_01
PCB Description
PCB Configuration
Figures 1 and 2 indicate the location of the main PCB
components referred to in this description. Where
“Datasheet” terms are given in red in Figure 2, these refer
to the loop filter components in the figures and tables in
the “Loop Filter Components” section of the ACS8944
datasheet.
The EVB can be configured using three jumpers on the
JMP1 header block located on the top left hand corner of
the evaluation board.
Figure 3 Jumper Configuration
EXT1
Config
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
F77
F155
Revision 1/January 2007 © Semtech Corp.
4
F38
The lock detector output can be observed via the test
point TP1. This is located on the right hand side of the
board and is labelled “LOCKB”.
2
JMP1
The configuration of the device is controlled via jumpers
on the header block JMP1. The manual reset switch SW1
must be used to reset the device after a configuration
change.
OP_FSEL
Config
F19
A single 3.3 V DC supply is required for the board. This
should be connected to the board via terminal SK1. A
100 uF supply decoupling capacitor is provided for the
supply near to SK1. Each supply pin to the device has
additional decoupling capacitors placed close to the pin.
EXT2
Config
EXT1 and EXT2 configure the input frequency of the
ACS8944, whilst OPFSEL configures the required output
frequency. The jumper connections should be configured
as described in Tables 1 and 2.
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
FINAL
C9, C10, R9 and R10) should be changed to the values
specified in the “Loop Filter Components” section of the
ACS8944 datasheet.
Table 1 Input Frequency Configuration Settings
Input Frequency
(MHz)
EXT1
EXT2
19.44
Connect 1 & 2
Connect 9 & 10
38.88
Connect 3 & 4
Connect 11 & 12
77.76
Connect 5 & 6
Connect 9 & 10
155.52
Connect 7 & 8
Connect 11 & 12
PCB Layout Recommendations
The Evaluation Board PCB layout follows good layout
practice for minimizing noise. Large area ground planes
and supply decoupling are used. The analog and digital
parts of the IC use separate ground and supply
connections. The following guidelines should be
considered when laying out a custom circuit board for the
ACS8944 IC:
Table 2 Output Frequency Configuration Settings
Output Frequency (MHz)
1. A generous ground plane should be provided around
the IC to minimize noise and maximize the effectiveness
of decoupling components.
OP_FSEL
19.44
Connect 13 & 14
38.88
Connect 15 & 16
77.76
Connect 17 & 18
155.52
Connect 19 & 20
2. Power supply decoupling capacitors should be placed
as close as possible to the pins of the IC to decouple all
power connections to the device.
The ACS8944 EVB board comes configured with loop filter
component values for a 19.44 MHz input clock with a loop
filter bandwidth of 2 kHz. For other input frequencies and
loop filter bandwidths the loop filter components (C7, C8,
Revision 1/January 2007 © Semtech Corp.
EVALUATION BOARD
3. Ensure that for the differential inputs and outputs, both
tracks in each pair of tracks are matched in length.
4. Ensure that for the differential inputs and outputs, both
tracks in each pair of tracks are of 50 Ohm impedance.
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Bill Of Materials
FINAL
EVALUATION BOARD
Table 3 Evaluation Board Component Listing
Reference
Value
Description
PCB Qty.
C1, C2, C3, C4, C5, C14, C16, C17
220 nF
0805 Capacitor (SMD).
8
C6, C13, C15
100 pF
0603 Capacitor (SMD).
3
C7, C9
15 uF
1812 Polarized Capacitor (Surface Mount). Low ESR
Electrolytic.
2
C8, C10
100 nF
0805 Capacitor (SMD).
2
C11
22 nF
0603 Capacitor (SMD).
1
C12
100 uF
Case ‘D’ Polarised Capacitor (SMD).
1
JMP1
Header 10 x 2
Header, 10-Pin Dual Row 0.1.
1
R1, R3, R6, R8
82 R
0805 Resistor (SMD).
4
R2, R4, R5, R7
130 R
0805 Resistor (SMD).
4
R9, R10
75 R
0805 Resistor (SMD).
2
R11
10 K
0603 Resistor (SMD).
1
R12
470 K
0603 Resistor (SMD).
1
RF1
I-
5-Pin SMB - 90 deg. (PTH) 1.0mm Centre Hole.
1
RF2
I+
5-Pin SMB - 90 deg. (PTH) 1.0mm Centre Hole.
1
RF3
O+
5-Pin SMB - 90 deg. (PTH) 1.0mm Centre Hole.
1
RF4
O-
5-Pin SMB - 90 deg. (PTH) 1.0mm Centre Hole.
1
SK1
PCON2
5 mm Pitch Vertical Mount DC Connector.
1
SW1
SW SPST
Push Button Single-Pole, Single-Throw Switch.
1
TP1
LOCKB
Test Point. Not populated.
0
TP5
RESETB
Test Point. Not populated.
0
TP6, TP8
+
Test Point. Not populated.
0
TP7, TP9
-
Test Point. Not populated.
0
U1
ACS8944_QFN_DUAL
QFN 7 x 7 48L MLP Package Footprint.
1
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Schematic
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EVALUATION BOARD
Figure 4 EVB Schematic
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Abbreviations
FINAL
EVALUATION BOARD
Semtech and the Semtech S logo are registered
trademarks of Semtech Corporation.
BOM
Bill of Materials
DC
Direct Current
EVB
Evaluation Board
I/C
Integrated Circuit
I/O
Input/Output
JAM PLL
Jitter-Attenuating, Multiplying PLL
LVPECL
Low Voltage Positive Emitter Coupled
Logic
MLP
Micro Leadframe Package
PCB
Printed Circuit Board
PLL
Phase Locked Loop
PTH
Plated Through Hole
RC
Resistor/Capacitor
SMB
Sub-Miniature type B- a connector type for
use in DC to 4 GHz range
Revision Status/History
Trademark Acknowledgements
The Revision Status, as shown in the top center of the
document, may be DRAFT, PRELIMINARY, or FINAL, and
refers to the status of the Device (not the document), with
the design cycle. DRAFT status is used when the design is
being realized but is not yet physically available, and the
document content reflects the intention of the design. The
document is raised to PRELIMINARY status when initial
prototype devices are physically available, and the
document content more accurately represents the
realization of the design. The document is only raised to
FINAL status after the device has been fully characterized.
This is a FINAL release (Revision 1) of the ACS8944 EVB
document. Changes made for this document revision are
given in Table 4, together with a brief summary of
previous revisions. For specific changes between earlier
revisions, refer (where available) to those earlier
revisions. Always use the current version of the document.
Table 4 Revision History
Revision
Rev. 1, January 2007
Reference
All pages
Revision 1/January 2007 © Semtech Corp.
Description of changes
Initial draft.
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Notes
Revision 1/January 2007 © Semtech Corp.
FINAL
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EVALUATION BOARD
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ACS8944 JAM PLL
ADVANCED COMMS & SENSING
Ordering Information
FINAL
EVALUATION BOARD
Table 5 Parts List
Part Number
ACS8944 EVB
Description
Evaluation Board (EVB).
Disclaimers
Life support- This product is not designed or intended for use in life support equipment, devices or systems, or other critical
applications. This product is not authorized or warranted by Semtech for such use.
Right to change- Semtech Corporation reserves the right to make changes, without notice, to this product. Customers are advised
to obtain the latest version of the relevant information before placing orders.
Compliance to relevant standards- Operation of this device is subject to the User’s implementation and design practices. It is the
responsibility of the User to ensure equipment using this device is compliant to any relevant standards.
Contacts
For Additional Information, contact the following:
Semtech Corporation Advanced Communications Products
E-mail:
sales@semtech.com
acsupport@semtech.com
Internet:
http://www.semtech.com
USA:
200 Flynn Road, Camarillo, CA 93012-8790
Tel: +1 805 498 2111,
Fax: +1 805 498 3804
FAR EAST: 12F No. 89 Sec. 5, Nanking E. Road, Taipei, 105, TWN, R.O.C.
Tel: 886-2-2748-3380
Fax: 886-2-2748-3390.
EUROPE:
Semtech Ltd., Units 2 and 3, Park Court, Premier Way,
Abbey Park Industrial Estate, Romsey, Hampshire, SO51 9DN
Tel: +44 (0)1794 527 600
Fax: +44 (0)1794 527 601
ISO9001
CERTIFIED
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