Design and Implementation of VLSI Systems
(EN1600)
lecture07
[sources: Weste/Addison Wesley – Rabaey Pearson - Baker Wiley]
MOS transistor theory
• Schedule for 4 lectures
–
–
–
–
Ideal (Shockley) Model
Non-ideal model
Inverter DC characteristics
SPICE
gate-oxide-body sandwich = capacitor
Operating modes
• Accumulation
• Depletion
• Inversion
polysilicon gate
silicon dioxide insulator
Vg < 0
+
-
p-type body
(a)
0 < V g < Vt
+
-
depletion region
(b)
• The charge accumulated
V >V
is proportional to the
excess gate-channel
voltage (Vgc-Vt)
g
(c)
t
+
-
inversion region
depletion region
The MOS transistor has three regions of
operation
• Cut off
Vgs < Vt
• Linear (resistor):
Vgs > Vt & Vds < VSAT=Vgs-Vt
Current prop to Vds
NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5, VDD
= 2.5V, VT = 0.4V
• Saturation:
Vgs > Vt and Vds ≥ VSAT=Vgs-Vt
Current is independent of Vds
How to calculate the current value?
• MOS structure looks like parallel plate
capacitor while operating in inversion
– Gate – oxide – channel
• Qchannel = CV
• C = εoxWL/tox = CoxWL (where Cox=εox/tox)
• V = Vgc – Vt = (Vgs – Vds/2) – Vt
gate
Vg
+
+
Cg Vgd drain
source Vgs
Vs
Vd
channel
+
n+
n+
Vds
p-type body
Carrier velocity is a factor in determining the
current
• Charge is carried by electrons
• Carrier velocity v proportional to lateral E-field
between source and drain
• v = μE
μ called mobility
• E = Vds/L
• Time for carrier to cross channel:
t=L/v
I=Q/t
• Now we know
– How much charge Qchannel is in the channel
– How much time t each carrier takes to cross
Qchannel
I ds 
t
W
 Cox
L
V  V  Vds
 gs t
2

V
  Vgs  Vt  ds Vds
2

V
 ds

In linear mode (Vgs > Vt & Vds < Vgs-Vt)
Qchannel
I ds 
t
W
 Cox
L
V  V  Vds
 gs t
2

V
  Vgs  Vt  ds Vds
2

V
 ds

Can be ignored for small Vds
For a given Vgs, Ids is proportional (linear) to Vds
In saturation mode (Vgs > Vt and Vds ≥ Vgs-Vt)
Qchannel
I ds 
t
W
 Cox
L
V  V  Vds
 gs t
2

Vds 

  Vgs  Vt 
Vds
2


Vdsat

I ds   Vgs  Vt 
2



V

2
gs
 Vt 
V
 ds

V
 dsat

pinched off
2
Now drain voltage no longer increases current
Operation modes summary


0


V
I ds    Vgs  Vt  ds
2
 
2


Vgs  Vt 


2
Vgs  Vt
V V  V
 ds
ds
dsat

Vds  Vdsat
cutoff
linear
saturation
Transistor capacitance
 Gate capacitance: to body + to drain + to source
 Diffusion capacitance: source-body and drain-body capacitances
Gate capacitance as a function of Vgs
QuickTime™ and a
decompressor
are needed to see this picture.
Source/Drain diffusion capacitance
• Csb, Cdb
• Undesirable, called parasitic
capacitance
• Capacitance depends on area and
perimeter
W
– Use small diffusion nodes
– Comparable to Cg
– Varies with process
Channel-stop implant
N
A1
Side wall
Source
ND
Bottom
xj
Side wall
LS
Channel
SubstrateNA
Summary
• Covered ideal (long channel) operation (Shockley model) of
transistor
• Next time: short-channel transistors
• TA