ES210, Digital Design Lab Reporter Name: Date: Partner Names Group No.: Lab 7: Half-Adder and Full-Adder A. Objectives 1. Learn what a half adder is and its operation. 2. Implement the half-adder on the protoboard. 3. Build the Verilog design and test bench programs for a half-adder and simulate it for the input and output waveforms. B. Introduction A half-adder is used to add two bits that can result in a sum bit and sometimes a carry bit that represents the most significant bit. Below is the truth table for the half-adder. A 0 0 1 1 B 0 1 0 1 Sum 0 1 1 0 Carry 0 0 0 1 When more bits are added together the carry from each position will add to the bits in the next position. In that case we need to use a full-adder (see the textbook). C. Parts needed A Digital Multimeter A +5 V power supply A breadboard/protoboard Wires One 7408 Quad 2-input AND gates One 7483, 4-Bit Binary Adder with Fast Carry One 7486 Quad XOR gates Datasheets of the gates from the Internet D. Procedure 1. Use table above to express a half-adder in terms of its inputs A and B and outputs S (Sum) and C (Carry) using AND and XOR gates. Draw the diagram in your logbook and below. Show your design on paper to the instructor. Express Sum and Carry in Half-Adder Diagram for Half-Adder 2. Implement the binary half-adder on the bread/protoboard using the AND and XOR gates. Use switches for the inputs and LEDs to display the outputs. Show the results in the following table. VA 0.0 V 0.0 V 5.0 V 5.0 V VB 0.0 V 5.0 V 0.0 V 5.0 V VSum (Volts) VCarry (Volts) 3. a. Refer to IC 7483 datasheet and explain what it does. b. Explain what fast carry does. 4. a. In 7483 express Sum1 for A1 and B1 inputs with C0=0 in terms of minterms of A and B. Dr. Ali Kujoory 6/30/2016 1 b. Explain whether this is what you expect. 5. Set up a 7483 IC, 4-Bit Full-Adder circuit on the protoboard. Connect C0 (input carry) of the IC to ground. Use the eight switches to enter A4, A3, A2, A1, B4, B3, B2, B1, and five LEDs to represent C4, S4 (Sum4), S3, S2, S1, respectively. Set the following values to the switches, observe the LEDs, and complete the following table. A4 0 0 0 1 1 A3 0 1 1 0 0 A2 1 0 1 0 0 Input Switches A1 B4 1 0 0 0 1 0 0 0 1 1 B3 0 1 1 1 0 B2 1 0 1 1 0 B1 1 0 1 1 1 C4 S4 Output LEDs S3 S2 S1 6. Write a Verilog design program in the table below to simulate a half-adder and compile it to assure it is error-free. 7. Then, write the corresponding Verilog test bench program in the table below and compile it to assure it is error-free. Include all combinations for A and B with 50 ms delay between each combination entry in the program for 200ms duration. 8. Simulate the program to display the waveforms of the inputs and outputs (S and C) and copy the display in the table below. Show your displays to the instructor. //half_adder.v program module //half_adder_tb.v program module Waveforms of inputs and outputs E. Feedback/Comments (your comments will help improving this lab) Was the instruction clear enough? Any error? How difficult was it for you? Do you have any observations to make? F. Report 1. Insert the answers and the display of waveforms you obtained in the tables above. You do not need to include the unnecessary parts such as the objectives, instructions, and procedures in your report. 2. Each member should submit the Verilog section separately in the report to make sure that you do the Verilog on your own. Dr. Ali Kujoory 6/30/2016 2