Realization of Self-Powered Electronics by 3-D Integration
Zeynep Dilli, Neil Goldsman, Martin Peckerar and George Metze
(*)
Dept. of Electrical and Computer Engineering, University of Maryland, College Park, MD 20742 USA
(*)Laboratory for Physical Sciences, 8050 Greenmead Drive, College Park, 20740 MD USA
Photodiode Array Design
Introduction
A micro-sized three-dimensionally integrated circuit
(3DIC) with self-powering and energy storage units is
designed for fabrication.
•For a given incident optical power Pinc , iph=R×Pinc
•R, responsivity: R=ηλ/1.24.
•η, quantum efficiency: η=(1-R)ξ(1-exp(-αd))
Self-powered sensor units: Challenge for “smart
dust systems.”
•(1-R):Surface reflection;ξ:non-recombined carrier ratio;
α:absorption coefficient; d:photosensitive material depth.
System Overview
•0.18 um SOI process: Si depth is 50 nm only.
•Under daylight: 6.6 pA per mm2; net assigned design
area 250 mm2.
•Two types: lateral pin- and annular pn-junctions.
Lateral PIN Photodiode
Junction: n-type threshold adjust implant & p-type low doped
“body/intrinsic” Si.
Layout
Three tiers connected
with dense vertical
vias.
Top tier:
PD arrays; bonding pads
Middle tier:
30 pF storage capacitor
Advantage: Large depletion width. Disadvantage: “i” region not
recommended for use.
Left:
Only implant
layers shown.
Right:
Bottom tier:
Local oscillator, output buffer
Full diode layout
shown.
System Concept
An array of 52
of these diodes
is in the final
layout;
expected ~99.5
pA per diode.
Available tiers each meet a general function in a
specific way.
Tier & Function In this design… Also could be…
Top Tier:
Sensors
Middle Tier:
Storage
Bottom Tier:
Functional
Electronics
Power-harvesting Data (sound, light,
photodiode arrays temperature…)
sensors
A charge-storage Data storage
capacitor
elements
A local oscillator Data processors,
and output buffer converters,
communication…
Annular PN Photodiode
Junction: n-type threshold adjust implant & p-type threshold
adjust implant. 2062 diodes in final layout; ~3.63 pA expected
per diode.
Top:
Only implant layers shown.
Right:
Full diode layout shown.
dilli@eng.umd.edu
Circuit Operation
Photocurrent charges Cstorage Inverter rail voltage.
Inverter switching discharges Cst  Vrail stabilizes.
Top:
Full
operation.
Left:
Start of
oscillation.
Right:
Full
oscillation.