EECS 105 Fall 2003, Lecture 21
Lecture 21:
Voltage/Current Buffer Freq Response
Prof. Niknejad
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Lecture Outline
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Department of EECS
Last Time: Frequency Response of
Voltage Buffer
Frequency Response of Current
Buffer
Current Mirrors
Biasing Schemes
Detailed Example
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Common-Collector Amplifier
Procedure:
1. Small-signal twoport model
2. Add device (and
other) capacitors
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Two-Port CC Model with Capacitors
Gain ~ 1
Find Miller capacitor for C -- note that the base-emitter
capacitor is between the input and output
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Voltage Gain AvC Across C
AvC  Rout /( Rout  RL ) 1
gm RL  1
Rout
1

gm
Note: this voltage gain is neither the two-port gain nor the
“loaded” voltage gain
Cin  C  CM  C  (1  AvC )C
1
Cin  C 
C
1  g m RL
Cin  C
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Bandwidth of CC Amplifier
Input low-pass filter’s –3 dB frequency:
p
1

C 

 RS || Rin  C 
1  g m RL 

Substitute favorable values of RS, RL:
RS  1 / g m


 p 1  1 / g m  C 
RL  1 / g m
C 
  C / g m
1  BIG 
Model not valid at
these high frequencies
 p  g m / C  T
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
CB Current Buffer Bandwidth
Same procedure: start
with two-port model and
capacitors
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Two-Port CB Model with Capacitors
No Miller-transformed capacitor!
Unity-gain frequency is on the order of T for small RL
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Summ of Single-Stage Amp Freq Resp
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CE, CS: suffer from Miller-magnified capacitor
for high-gain case
CC, CD: Miller transformation  nulled
capacitor  “wideband stage”
CB, CG: no Millerized capacitor  wideband
stage (for low load resistance)
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
CMOS Diode Connected Transistor
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Department of EECS
Short gate/drain of a transistor
and pass current through it
Since VGS = VDS, the device
is in saturation since VDS >
VGS-VT
Since FET is a square-law (or
weaker) device, the I-V curve
is very soft compared to PN
junction diode
What’s the input impedance of
circuit?
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Diode Equivalent Circuit
 di
RD   OUT
 dvOUT

1

vt
 

it
IOUT  0 
1
RD 
gm
Equivalent Circuit:
RD
iOUT
+
VD +-
vOUT
-
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
The Integrated “Current Mirror”
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High Res
Low Resis
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Department of EECS
M1 and M2 have the same
VGS
If we neglect CLM (λ=0),
then the drain currents are
equal
Since λ is small, the
currents will nearly mirror
one another even if Vout is
not equal to VGS1
We say that the current IREF
is mirrored into iOUT
Notice that the mirror
works for small and large
signals!
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Current Mirror as Current Source
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The output current of M2 is only weakly dependent on
vOUT due to high output resistance of FET
M2 acts like a current source to the rest of the circuit
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Small-Signal Resistance of I-Source
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Improved Current Sources
Goal: increase roc
Approach: look at amplifier output resistance
results … to see topologies that boost resistance
Rout  ro
Looks like the output
impedance of a commonsource amplifier with source
degeneration
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Effect of Source Degeneration
vt  (it  g m vgs )ro  vRS
vgs  vRS
1
Req 
gm
vRS  it RS
vt  (it  gm RS it )ro  it RS
vt
Ro   1  g m RS  ro
it
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Equivalent resistance loading gate is dominated by
the diode resistance … assume this is a small
impedance
Output impedance is boosted by factor 1  gm RS 
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Cascode (or Stacked) Current Source
Insight: VGS2 = constant AND
VDS2 = constant
Small-Signal Resistance roc:
Ro  1  gm RS  ro
Ro  1  gm ro  ro
Ro  g m r02  ro
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Drawback of Cascode I-Source
Minimum output voltage to keep both transistors in
saturation: V
V
V
OUT , MIN
DS 4, MIN
DS 2, MIN
VDS 2, MIN  VGS 2  VT 0  VDSAT 2
iOUT
VD 4  VDSAT 2  VGS 4  VGS 2  VGS 4  VT 0
VOUT , MIN  VGS 2  VGS 4  VT 0
Department of EECS
vOUT
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Current Sinks and Sources
Sink: output current goes
to ground
Department of EECS
Source: output current comes
from voltage supply
University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Prof. A. Niknejad
Current Mirrors
Idea: we only need one reference current to set up all the
current sources and sinks needed for a multistage amplifier.
Department of EECS
University of California, Berkeley