Lecture 16: Small Signal Amplifiers Prof. Niknejad Department of EECS

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EECS 105 Fall 2003, Lecture 16
Lecture 16:
Small Signal Amplifiers
Prof. Niknejad
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Lecture Outline


Review: Small Signal Analysis
Two Port Circuits
–
–
–
–

Department of EECS
Voltage Amplifiers
Current Amplifiers
Transconductance Amps
Transresistance Amps
Example: MOS Amp Again!
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small Signal Analysis

Step 1: Find DC operating point. Calculate
(estimate) the DC voltages and currents (ignore
small signals sources)

Substitute the small-signal model of the
MOSFET/BJT/Diode and the small-signal models
of the other circuit elements.

Solve for desired parameters (gain, input
impedance, …)
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
A Simple Circuit: An MOS Amplifier
Input signal
RD
VDD
Supply “Rail”
vo
vs
vGS  VGS  vs
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VGS
I DS
Output signal
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small-Signal Analysis
Step 1. Find DC Bias – ignore small-signal source
IGS,Q
VGS,BIAS was found in
Lecture 15
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small-Signal Modeling
What are the small-signal models of the DC supplies?
Shorts!
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small-Signal Models of Ideal Supplies
Small-signal model:
isupply
gsupply 

vsupply
rsupply  0
short
gsupply 
isupply
vsupply
0
rsupply  
open
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small-Signal Circuit for Amplifier
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Low-Frequency Voltage Gain
Consider first   0 case … capacitors are open-circuits
vout   gmvs  RD || ro 
Av   gm  RD || ro 
Design Variable
Transconductance
2 I D,SAT
W
gm  nCox (VGS  VT ) 
L
VGS  VT
Design Variables
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Voltage Gain (Cont.)
Substitute transconductance:
 2 I D,SAT 
Av   
  RD || ro 
 VGS  VT 
g m RD
Output resistance: typical value n= 0.05 V-1

1
ro  
 I
 n D , SAT
Voltage gain:
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 
1

  
 k   200 k
  0.05  0.1 
 2  0.1 
Av   
  25 || 200   14.3
 0.32 
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Input and Output Waveforms
Output small-signal voltage amplitude: 14 x 25 mV = 350
Input small-signal voltage amplitude: 25 mV
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
What Limits the Output Amplitude?
1. vOUT(t) reaches VSUP or 0 … or
2. MOSFET leaves constant-current region and enters
triode region
VDS  VDS , SAT  VGS  VTn  0.31V
vo , MIN  VDS , SAT  0.32 V
amp  2.5  0.32V = 2.18V
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Maximum Output Amplitude
vout(t)= -2.18 V cos(t)  vs(t) = 152 mV cos(t)
How accurate is the small-signal (linear) model?
vs
0.152

 0.5
VGS  VTn
0.32
Significant error in neglecting third term in expansion
of iD = iD (vGS)
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Generalized Amplifier
VDD
RS
vS  VBIAS  vs
vs
I DD
VBIAS
iD  f (vin )
vo
iL  I DD  iD
RL
vin
is
Department of EECS
I BIAS
VSS
Active Device
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Amplifier Terminology





Sources: Signal, its source resistance, and bias
voltage or current
Load: Use resistor in Chap. 8, but could be a
general impedance
Port: A pair of terminals across which a voltage
and an associated current are defined
Source, Load: “one port”
Amplifier: “two port”
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
One-Port Models (EECS 40)

A terminal pair across which a voltage and
associated current are defined
iab

Circuit
Block
vab

iab

vab

Department of EECS
iab
Rthev

vthev
vab
Rthev
ithev

University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small-Signal Two-Port Models
iin




vin
vout


We assume that input port is linear and that the
amplifier is unilateral:
–

iout
Output depends on input but input is independent of
output.
Output port : depends linearly on the current and
voltage at the input and output ports
Unilateral assumption is good as long as “overlap”
capacitance is small (MOS)
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Math 54 Perspective
Can write linear system of equations for either iout or vout
in terms of two of iin, vin, iout, or vout: possibilities are
iout  1vin   2vout
iout  3iin   4vout
vout  5vin   6iout
vout   7iin  8iout
What is physical meaning of 1? of 6?
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
EE Perspective

Four amplifier types: determined by the output
signal and the input signal … both of which we
select (usually obvious)
–
–
–
–

Voltage Amp (VV)
Current Amp (II)
Transconductance Amp (VI)
Transresistance Amp (IV)
We need methods to find the 6  parameters for the
four models and equivalent circuits for unilateral
two ports
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Two-Port Small-Signal Amplifiers
Rout
Rs

vs
vin
Rin
RL
Av vin

Voltage Amplifier
iin
is
Rs
Rin
Aii in
Rout
RL
Current Amplifier
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Two-Port Small-Signal Amplifiers
Rs

vs
vin
Rin
Gmvin
Rout
RL

Transconductance Amplifier
Rout
iin
is
Rs
Rin
Rmiin
RL
Transresistance Amplifier
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Input Resistance Rin
Looks like a Thevenin resistance measurement, but note that the
output port has the load resistance attached
vt
Rin 
it
Department of EECS
RS removed ,
RL attached
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Output Resistance Rout
Looks like a Thevenin resistance measurement, but note that the
input port has the source resistance attached
Rout
vt

it
Department of EECS
RL removed ,
RS attached
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Finding the Voltage Gain Av
Key idea: the output port is open-circuited and the
source resistance is shorted
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Finding the Current Gain Ai
Key idea: the output port is shorted and the source
resistance is removed
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Finding the Transresistance Rm
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Finding the Transconductance Gm
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Common-Source Amplifier (again)
How to isolate DC level?
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
DC Bias
5V
Neglect all AC signals
2.5 V
Choose IBIAS, W/L
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Load-Line Analysis to find Q
I RD 
VDD  Vout
RD
Q
slope 
5V
ID 
10k
1
10k
0V
ID 
10k
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Small-Signal Analysis
Rin  
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Two-Port Parameters:
Find Rin, Rout, Gm
Generic Transconductance Amp
Rs

vs
vin
Rin
Gmvin
RL
Rout

Rin  
Gm  gm Rout  ro || RD
Department of EECS
University of California, Berkeley
EECS 105 Fall 2003, Lecture 16
Prof. A. Niknejad
Two-Port CS Model
Reattach source and load one-ports:
Department of EECS
University of California, Berkeley
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