EECS 105 Fall 2003, Lecture 10 Lecture 10: PN Junction & MOS Capacitors Prof. Niknejad Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Lecture Outline Review: PN Junctions Thermal Equilibrium PN Junctions with Reverse Bias (3.33.6) MOS Capacitors (3.7-3.9): – – – Department of EECS Accumulation, Depletion, Inversion Threshold Voltage CV Curve University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Results of MT #1 Good Job! AVG 74 MIN 34 MAX 99 STD DEV 13 This is only 17% of your grade Homework Laboratory Midterm #1 Midterm #2 Final Department of EECS 15% 20% 17% 18% 30% University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad PN Junction in Thermal Equilibrium Contact potential develops between P and N region Diffusion current balanced by drift current Depletion region is a “space-charge” region where the concentration of free carriers is low The depletion region is charged due to the immobile background ions (donors and acceptors) Used the “Depletion Approximation” to estimate the charge density calculate the electric fields and potential variation using electrostatics in 1D Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Have we invented a battery? Can we harness the PN junction and turn it into a battery? ND NA ND N A bi n p Vth ln ln Vth ln 2 n n n i i i ? Numerical example: ND N A 10151015 bi 26mV ln 60mV log 600mV 2 20 ni 10 Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Contact Potential The contact between a PN junction creates a potential difference Likewise, the contact between two dissimilar metals creates a potential difference (proportional to the difference between the work functions) When a metal semiconductor junction is formed, a contact potential forms as well If we short a PN junction, the sum of the voltages around the loop must be zero: + bi − Department of EECS mn pm 0 bi pm mn n p bi ( pm mn ) University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad PN Junction Capacitor Under thermal equilibrium, the PN junction does not draw any current But notice that a PN junction stores charge in the space charge region (transition region) Since the device is storing charge, it’s acting like a capacitor Positive charge is stored in the n-region, and negative charge is in the p-region: qN a x po qN d xno Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Reverse Biased PN Junction What happens if we “reverse-bias” the PN junction? + bi VD − VD VD 0 Since no current is flowing, the entire reverse biased potential is dropped across the transition region To accommodate the extra potential, the charge in these regions must increase If no current is flowing, the only way for the charge to increase is to grow (shrink) the depletion regions Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Current Under Reverse Bias n VD n n p + − VD E0 p Xd0 E0 p X d (VD ) Under thermal equilibrium current is zero If we apply a reverse bias, we are increasing the barrier against diffusion current Drift current is low since the field only moves minority carriers across junction In fact, current is not zero but very small since the minority carrier concentration is low. Minority carriers within one diffusion length of junction can contribute to a reverse bias current. This is more or less independent of the applied bias Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Voltage Dependence of Depletion Width Can redo the math but in the end we realize that the equations are the same except we replace the builtin potential with the effective reverse bias: 2 s (bi VD ) N a xn (VD ) qN d Na Nd V xn 0 1 D bi 2 s (bi VD ) N d x p (VD ) qN a Na Nd VD x p 0 1 bi 2 s (bi VD ) 1 1 X d (VD ) x p (VD ) xn (VD ) q Na Nd VD X d (VD ) X d 0 1 bi Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Charge Versus Bias As we increase the reverse bias, the depletion region grows to accommodate more charge QJ (VD ) qN a x p (VD ) qN a 1 VD bi Charge is not a linear function of voltage This is a non-linear capacitor We can define a small signal capacitance for small signals by breaking up the charge into two terms QJ (VD vD ) QJ (VD ) q(vD ) Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Derivation of Small Signal Capacitance From last lecture we found dQD QJ (VD vD ) QJ (VD ) dV C j C j (VD ) dQ j dV Cj V VD d dV qN a x p 0 2bi 1 Notice that C j0 qN a x p 0 2bi Department of EECS qN a 2bi VD bi vD VD V qN a x p 0 1 bi V VR C j0 1 2 sbi N d qN a N a N d VD bi q s N a N d 2bi N a N d University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Physical Interpretation of Depletion Cap q s N a N d C j0 2bi N a N d Notice that the expression on the right-hand-side is just the depletion width in thermal equilibrium C j0 s 1 1 2 sbi N a N d q 1 s Xd0 This looks like a parallel plate capacitor! C j (VD ) Department of EECS s X d (VD ) University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad A Variable Capacitor (Varactor) Capacitance varies versus bias: Cj C j0 Application: Radio Tuner Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad “Diffusion” Resistor N-type Diffusion Region Oxide P-type Si Substrate Resistor is capacitively isolation from substrate – – Must Reverse Bias PN Junction! PN Junction creates a distributed capacitance with substrate (RC transmission line) Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad MOS Capacitor Oxide (SiO2) ox 3.9 0 Gate (n+ poly) 0 Very Thin! tox ~ 1nm Body (p-type substrate) x s 11.7 0 MOS = Metal Oxide Silicon Sandwich of conductors separated by an insulator “Metal” is more commonly a heavily doped polysilicon layer n+ or p+ layer NMOS p-type substrate, PMOS n-type substrate Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad P-I-N Junction Gate (n+ poly) Body (p-type substrate) Under thermal equilibrium, the n-type poly gate is at a higher potential than the p-type substrate kT N a p ln n 550mV q ni No current can flow because of the insulator but this potential difference is accompanied with an electric field Fields terminate on charge! Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Fields and Charge at Equilibrium + Vox − ++++++++++++++++++ + − − − − − − − − − VB − − − − − − − − − − − − − − − − − − Body (p-type substrate) Eox Xd0 At equilibrium there is an electric field from the gate to the body. The charges on the gate are positive. The negative charges in the body come from a depletion region Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Good Place to Sleep: Flat Band QG (VGB VFB ) 0 VFB 0 + − Body (p-type substrate) If we apply a bias, we can compensate for this built-in potential VFB (n p ) In this case the charge on the gate goes to zero and the depletion region disappears In solid-state physics lingo, the energy bands are “flat” under this condition Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Accumulation QG Cox (VGB VFB ) VGB VFB − + −−−−−−−−−−−−−−−−−− ++++++++++++++++++ QB QG Body (p-type substrate) If we further decrease the potential beyond the “flat-band” condition, we essentially have a parallel plate capacitor Plenty of holes and electrons are available to charge up the plates Negative bias attracts holes under gate Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Depletion VGB VFB + − ++ + + + + + + ++ − − − − − − − − − − − − − − − − − Body (p-type substrate) QG (VGB ) QB QB qN a X d (VGB ) Similar to equilibrium, the potential in the gate is higher than the body Body charge is made up of the depletion region ions Potential drop across the body and depletion region Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Inversion s VGB VT ++ + + + + + + ++ − − − − − − − − − − − − − − − − − + − Body (p-type substrate) As we further increase the gate voltage, eventually the surface potential increases to a point where the electron density at the surface equals the background ion density ns ni e qs kT Na s p At this point, the depletion region stops growing and the extra charge is provided by the inversion charge at surface Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Threshold Voltage The threshold voltage is defined as the gate-body voltage that causes the surface to change from ptype to n-type For this condition, the surface potential has to equal the negative of the p-type potential We’ll derive that this voltage is equal to: 1 VTn VFB 2 p Cox Department of EECS 2q s N a (2 p ) University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Inversion Stops Depletion A simple approximation is to assume that once inversion happens, the depletion region stops growing This is a good assumption since the inversion charge is an exponential function of the surface potential Under this condition: QG (VTn ) QB ,max QG (VGB ) Cox (VGB VTn ) QB ,max Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Q-V Curve for MOS Capacitor QG QN (VGB ) QB ,max VFB VTn VGB (V ) In accumulation, the charge is simply proportional to the applies gate-body bias In inversion, the same is true In depletion, the charge grows slower since the voltage is applied over a depletion region Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Numerical Example MOS Capacitor with p-type substrate: tox 20nm N a 5 1016 cm 3 Calculate flat-band: VFB (n p ) (550 (402)) 0.95V Calculate threshold voltage: ox 3.45 1013 F/cm Cox tox 2 10-6cm 1 VTn VFB 2 p 2q s N a (2 p ) Cox 2 1.6 1019 1.04 1012 5 1016 2 0.4 VTn .95 2(0.4) 0.52V Cox Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Num Example: Electric Field in Oxide Apply a gate-to-body voltage: VGB 2.5 VFB Device is in accumulation The entire voltage drop is across the oxide: Vox VGB n p 2.5 0.55 (0.4) 5 V Eox 8 10 tox tox 2 106 cm The charge in the substrate (body) consist of holes: QB Cox (VGB VFB ) 2.67 107 C/cm 2 Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 10 Prof. A. Niknejad Numerical Example: Depletion Region In inversion, what’s the depletion region width and charge? VB ,max s p p p 2 p 0.8V VB ,max X d ,max 1 qNa 2 s 2 X d ,max 2 sVB ,max qN a 144nm QB,max qNa X d ,max 1.15 107 C/cm2 Department of EECS University of California, Berkeley