Abbreviations ® January 1998 The 1998 Data Book uses the following abbreviations and acronyms: ACAP ACCESS AHDL AMPP APD APU AN AS ASCII ASIC ASSP ATM BGA BNF BPR BSC BSDL BST CAE CerDIP CMD CMOS CPLD CPU CQFP CRC DIP DRAM DS DSP DUT EAB EAU EDA EDF EDIF EEPROM Altera Corporation Altera Consultants Alliance Program Altera Commitment to Cooperative Engineering Solutions Altera Hardware Description Language Altera Megafunction Partners Program Active parallel down Active parallel up Application note Active serial American Standard Code for Information Interchange Application-specific integrated circuit Application-specific standard product Asynchronous transfer mode Ball-grid array Backus-Naur form Bypass register Boundary-scan cell Boundary-scan description language Boundary-scan test Computer-aided engineering Ceramic dual in-line package Command File Complementary metal-oxide semiconductor Complex programmable logic device Central processing unit Ceramic quad flat pack Cyclic redundancy code Dual in-line package Dynamic random access memory Data sheet Digital signal processing Device under test Embedded array block Electronic application utility Electronic design automation EDIF Input File Electronic Design Interchange Format Electrically erasable programmable read-only memory 857 Abbreviations EPLD EPROM ESD FFT FIFO FIN FIR FIT FLEX FPGA FTP GAL GDF HDL HEX IC ICR ICT IEEE IIR INC INI I/O IOC IOE IR ISA ISP JCF JED JLCC JTAG LAB LCA LE LED LMF LOG LPM LSB LSI LUT MAC MAX MD-SAS MMF 858 Erasable programmable logic device Erasable programmable read-only memory Electrostatic discharge Fast Fourier transform First-in first-out Fitter Input File (.fin) Finite impulse response Fit File (.fit) Flexible Logic Element MatriX Field-programmable gate array File transfer protocol Generic array logic Graphic Design File (.gdf) Hardware description language Hexadecimal File Integrated circuit In-circuit reconfigurability In-circuit test Institute of Electrical and Electronic Engineers Infinite impulse response Include File (.inc) Initialization File (.ini) Input/output Input/output cell Input/output element Instruction register Industry-standard architecture In-system programmability JTAG Chain File (.jcf) JEDEC File (.jed) Ceramic J-lead chip carrier Joint Test Action Group Logic array block Logic cell array Logic element Light-emitting diode Library Mapping File (.lmf) Log File (.log) Library of parameterized modules Least significant bit Large-scale integration Look-up table Multiplier-accumulator Multiple Array MatriX Multi-device sequential active serial MAX+PLUS II Message File (.mmf) Altera Corporation Abbreviations MPU MRI MSB MSI MSPS MTBF MTF NRE OCR OEM OTP PAL PC PCB PCI PDIP PGA PIA PIB PLCC PLD PLL POF POR PPA PPS PQFP PROM PS QFP RAM ROM RPT RQFP RTL SAM SOF SOIC SR SRAM SSG SSI SYM TDF TQFP TTF Altera Corporation Master programming unit Magnetic resonance imaging Most significant bit Medium-scale integration Million samples per second Mean time between failures Message Text File (.mtf) Non-recurring engineering Optical character recognition Original equipment manufacturer One-time-programmable Programmable array logic Personal computer Printed circuit board Peripheral component interconnect Plastic dual in-line package Pin-grid array Programmable interconnect array Product information bulletin Plastic J-lead chip carrier Programmable logic device Phase-locked loop Programmer Object File (.pof) Power-On Reset Passive parallel asynchronous Passive parallel synchronous Plastic quad flat pack Programmable read-only memory Passive serial Quad flat pack Random access memory Read-only memory Report File (.rpt) Power quad flat pack Register transfer level Stand-Alone Microsequencer SRAM Object File (.sof) Small-outline integrated circuit Staging register Static random access memory Synchronous signal generator Small-scale integration Symbol File (.sym) Text Design File (.tdf) Thin quad flat pack Tabular Text File (.ttf) 859 Abbreviations TTL UES UV VEC VHD VHDL VHSIC VITAL VLSI WDF WWW WYSIWYG XNF ZIF 860 Transistor-to-transistor logic User electronic signature Ultraviolet Vector File (.vec) VHDL Design File (.vhd) VHSIC Hardware Description Language Very high speed integrated circuit VHDL Initiative Toward ASIC Libraries Very large-scale integration Waveform Design File (.wdf) World-wide web What-you-see-is-what-you-get Xilinx Netlist Format File (.xnf) Zero-insertion-force Altera Corporation Copyright © 1995, 1996, 1997, 1998 Altera Corporation, 101 Innovation Drive, San Jose, CA 95134, USA, all rights reserved. By accessing this information, you agree to be bound by the terms of Altera’s Legal Notice.