Alexander Merritt
350659 Georgia Tech Station, Atlanta, GA 30332, USA
404.954.2485, merritt [dot] alex [at] gatech [dot] edu
Research
Interests
Operating systems and computer architecture, virtualization, high-performance computing.
Education
PhD, Computer Science, Systems Software
Georgia Institute of Technology, Atlanta, GA
GPA 3.89/4.0, Advisors: Dr. Karsten Schwan, Dr. Ada Gavrilovska
Bachelor of Science, Computer Science
Rochester Institute of Technology, Rochester, NY
GPA 3.77/4.0, Minor: German Language
Research
Experience
(expected late 2016)
May 2009
Memory Centric Computing: Exploiting Architecture and Operating Systems
Georgia Institute of Technology, Graduate Research Assistant
2015–current work
As memory sizes grow in high-end systems, fueled by new innovations in non-volatile memory
technologies, we are experiencing new challenges for applications and operating systems in
how to efficiently execute entirely in memory. For example, new file systems are designed
without relying on the legacy block layer interface, and new programming models exist to
support consistent execution in persistent memory. In this project, we explore new operating
system designs and interfaces, presenting abstractions over new CPU architectural features to
accelerate applications. Additionally, we are desinging new memory management systems that
scale to hundreds of CPU cores and tens of terabytes of main memory, while containing memory
allocation bloat introduced by complex, ill-matched allocation heuristics.
Relevant Papers: ASPLOS’16
Fine-grained Resource Management on Heterogeneous High-Performance Clusters
Georgia Institute of Technology, Graduate Research Assistant
2010–2014
GPGPUs are advantageous for increasing application scalability. Applications scalability and
portability are limited by the composition of accelerators and memory within and among compute nodes. We introduce the notion of a ‘GPGPU Assembly’ for applications on heterogenous
HPC clusters, presenting a logical configuration of hardware as a ‘slice’ of the underlying cluster hardware. We developed a runtime that transparently abstracts all GPGPUs as locally
available devices, easing programmability and portability. Application use of accelerators are
characterized, and combined with dynamic monitoring of the CPUs, memory, and network communication, our runtime provides dynamic assemblies for improving application throughput.
Relevant Papers: XSEDE’14, CLUSTER’13, VTDC’11
Publications
1. I. El Hajj, A. Merritt, G. Zellweger, D. Milojicic, R. Achermann, P. Faraboschi, W.M. Hwu,
T. Roscoe, and K. Schwan. 2016. SpaceJMP: Programming with Multiple Virtual Address
Spaces. ASPLOS’16, Atlanta, GA. (co-primary author)
2. A. Merritt, N. Farooqui, M. Slawinska, A. Gavrilovska, K. Schwan, and V. Gupta. 2014.
Slices: Provisioning Heterogeneous HPC Systems. XSEDE’14, Atlanta, GA.
3. J. Young, S.H. Shon, S. Yalamanchili, A. Merritt, K. Schwan, and H. Fröning. 2013. Oncilla:
A GAS runtime for efficient resource allocation and data movement in accelerated clusters.
CLUSTER’13, Indianapolis, IN.
4. A. Merritt, V. Gupta, A. Verma, A. Gavrilovska, and K. Schwan. 2011. Shadowfax: scaling
in heterogeneous cluster systems via GPGPU assemblies. VTDC’11, San Jose, CA.
5. J. R. Lange, K. Pedretti, P. Dinda, P. G. Bridges, C. Bae, P. Soltero, and A. Merritt. 2011.
Minimal-overhead virtualization of a large scale supercomputer. VEE’11, Newport Beach,
CA.
6. A. Merritt, K. Pedretti. 2010. Techniques for Managing Data Distribution in NUMA Systems. SC’10 [poster], New Orleans, LA.
7. A. Merritt, K. Pedretti. 2010. Techniques for Managing Data Distribution in NUMA Systems. Sandia Computer Science Research Institute 2010 Summer Proceedings.
Teaching
Experience
Lecturer, Georgia Institute of Technology
OS Design and Implementation, CS3210 (undergraduate)
2014
• Organized, designed, and taught course for the entire semester.
• Designed projects targeting user-space memory allocators, system-call timing, and use of
FUSE (file system in user-space) in a student-lead course project.
Teaching Assistant, Georgia Institute of Technology
OS Design and Implementation, CS3210 (undergraduate)
• Designed course lectures, and projects based on the Linux kernel.
Professional
Experience
2013
High-Performance Computing Architectures, CS6290 (graduate)
• Duties: project design, grading, office hours.
2010
Introduction to Database Systems (undergraduate)
• Duties: grading, office hours.
2009
Hewlett-Packard Labs, Palo Alto, CA
Summer 2015
Graduate Research Intern
• Designing new operating system virtual memory interfaces to manage scalable execution
on large-memory systems.
• Research was accepted to ASPLOS 2016.
• Filed six patent applications.
Hewlett-Packard Labs, Palo Alto, CA
Summer 2014
Graduate Research Intern
• Evaluated state-of-the-art in-memory object storage systems in their ability to provide
end-to-end guarantees for real-time analytics applications.
• Filed one patent application.
Intel Labs, Hillsboro, OR
Summer 2013
Graduate Research Intern
• Researched virtualization strategies for the graphics display using Xen virtual machines
and the Android client device software stack.
Intel Labs, Hillsboro, OR
Summer 2012
Graduate Research Intern
• Developed memory instrumentation support for virtual machines within Xen using page
fault mechanisms to evaluate methods for remote process execution on end-client devices.
• Xen patchset and userlevel tools used internally for further performance studies.
Sandia National Laboratories, Albuquerque, NM,
Summer 2011
Graduate Research Intern
• Integrated use of IOMMU programmability into the Kitten light-weight research operating system, enabling access to GPGPUs from within virtual machines managed by the
Palacios embedded virtual machine monitor.
Sandia National Laboratories, Albuquerque, NM
Summer 2010
Graduate Research Intern
• Evaluated current state of memory distribution and management techniques within the
Linux operating system kernel on AMD NUMA platforms (“Magny-Cours”).
• Added support for large pages (virtual) into the Palacios virtual machine monitor.
• Research published in VEE 2011.
Service
ACM Intl. Conf. on Virtual Execution Environments (VEE’16)
Webmaster
IEEE Internet Computing
External Reviewer
USENIX ;login:, Vol. 40, No. 1
Conference Report Writer, OSDI’14
Recognition
and Awards
Skills
Patents
Student Travel Grant, ACM SOSP
Student Travel Grant, USENIX OSDI
Student Travel Grant, ACM HPDC
President’s Fellowship, Georgia Institute of Technology
Dean’s List, Golisano College of Computing and IS, RIT
Platforms
Languages
Tools
2015-16
2015
Feb. 2015
2015
2014
2011
2009-14
2004-09
BSD, GNU/Linux, Xen; Nvidia GPGPU
C, C++, Rust; Bash, Python
git, R, LaTeX2e
1. I. El Hajj, A. Merritt, G. Zellweger, D. Milojicic. Submission pending. Multiple Persistent
Virtual Address Spaces (MPVAS).
PCT/US2016/015661, filed Jan. 29, 2016.
2. I. El Hajj, A. Merritt, G. Zellweger, D. Milojicic. Submission pending. Versioning using
multiple virtual address spaces per process.
PCT/US2016/015814, filed Jan. 29, 2016.
3. I. El Hajj, A. Merritt, G. Zellweger, D. Milojicic. Submission pending. Hardware support
for tracking writes to memory objects with sub-page granularity.
PCT/US2016/015815, filed Jan. 29, 2016.
4. I. El Hajj, A. Merritt, G. Zellweger, D. Milojicic., R. Achermann. Submission pending.
Use of memory write logging for fast versioning of in-memory objects.
PCT/US2016/015839, filed Jan. 29, 2016.
5. I. El Hajj, A. Merritt, G. Zellweger, D. Milojicic. Submission pending. Supporting and
managing multiple virtual address spaces per process.
PCT/US2015/049726, filed Sept. 11, 2015.
6. A. Merritt, D. Milojicic. Submission pending. Active Distributed Data Managment of
In-Memory Object Stores Using Data Chunking and Replication.
PCT/US2016/013764, filed Nov. 07, 2014.
References
Supervisors:
Ada Gavrilovska, ada@cc.gatech.edu. Senior Research Faculty, Georgia Tech, Atlanta, GA.
Dejan Milojicic, dejan.milojicic@hpe.com. Senior Researcher, HP Labs, Palo Alto, CA.
Paul Diefenbaugh, paul.s.diefenbaugh@intel.com. Principal Engineer, Intel Labs, Hillsboro, OR.
Additional references available upon request.