A Multilevel Inverter System for an Induction Motor with Open-end Windings
V.T.Somasekhar, M.R.Baiju, K.K.Mohapatra, K.Gopakumar SM - IEEE
Center for Electronics Design and Technology, Indian Institute of Science, Bangalore-560 012, INDIA
E-mail;kgopa@cedt.iisc.emet.in
-
In this paper, a multilevel inverter system for an
open-end winding induction motor drive is described, Multilevel
inversion is achieved by feeding an open-end winding induction
motor with t w o 2-level inverters in cascade (equivalent to a 3level inverter) from one end and a single 2-level inverter, from
the other end of the motor. The combined inverter system with
open-end winding induction motor produces voltage space
phasor locations identical to a 6-level inverter. A total of 512
space phasor combinations are available i n the proposed
scheme, distributed over 91 space vector locations. The
proposed inverter drive scheme is capable of producing B
multilevel PWM waveform for the phase voltage ranging from a
2-level waveform to a 6-level waveform depending on the speed
range. A space vector PWM scheme for the proposed drive is
implemented using a I-HP induction motor with open-end
winding structure.
Abstract
I. NTRODUCTION
Multilevel inverters of 5-level and above, which are
extensions of the conventional three-level type, are seldom
used due to increased power circuit complexity. Series
connected hybrid topology can produce higher voltage space
phasor levels, hut also with an increased power circuit
complexity [2][3]. Dual inverter fed open-end winding
induction motor drives with equal DC-link voltages for the
inverters can produce voltage space vector locations identical
to those produced by a three-level inverter [ 1][4][5]. A Dual
inverter scheme with asymmetrical DC link voltages for the
open-end winding induction motor is capable of producing a
4-level PWM waveform for the motor phase voltage [6]. The
number of triangular sectors in the asymmetrical DC link
open-end winding induction motor drive scheme, described
in [6], is enhanced to 54 (compared to a 3-level scheme,
which produces 24 sectors) [5][6].
In the present work, an inverter system to produce a
multilevel PWM waveform ranging from a 2-level to a 6level for the motor phase voltage for an open-end winding
induction motor drive is proposed. In the proposed scheme,
an open-end winding induction motor is fed with a threelevel inverter at one end and a two-level inverter at the other
end, with asymmetrical DC link voltages. An alternative
circuit topology is adopted to realize the three-level inverter
used in this scheme. In the present work, three-level
inversion is obtained by connecting two 2-level inverters in
cascade. The inverter scheme proposed in this paper
produces 91 voltage space vector locations. A total of 512
voltage space vector combinations are possible in this
scheme. The total number of constituent sectors in this
scheme is enhanced to 150. This results in a reduction of the
switching ripple in the motor phase voltage waveform in the
medium and higher speed ranges.
0-7803-7474-61021117.0002002 lEEE
11. PROPOSED POWER CIRCUIT CONFIGURATION
The proposed power circuit topology for realizing a
multilevel phase voltage is depicted in Fig.1. In this circuit
configuration, an open-end winding induction motor is fed
from one end, with a 3-level inverter (two 2-level inverters
are connected in cascade-inverter-l and inverter-2 of Fig.1)
and with a 2-level inverter fed from the other end of the
motor. The DC-link voltages of inverter-1, inverter-2 and
inverter-3 are - (215)Vd,, (2/5)Va. and (1/5)Vd, respectively,
where Vdc is the DC-link voltage of an equivalent
conventional single 2-level inverter drive.
The pole voltage, of any phase for inverter-2, for example
vAzo(Fig.l) attains a voltage of (215)Vdc,if the following
conditions are satisfied:
The top switch of that leg in inverter-2, in this
(i)
case S2,,is turned on (Fig.1).
(ii) The bottom switch of the corresponding leg
in inverter-l,in this case SI4,is turned on (Fig.l),
Similarly the pole voltage of any phase in inverter-2, for
examplevA20attains a voltage of (4/5)vdC,
if the
following conditions are satisfied:
The top switch of that leg in inverter-2, in this
(i)
case S21,is turned on (Fig.1).
The top switch of the corresponding leg in
(ii)
inverter-I, in this case S I I ,is turnedon (Fig.1).
Thus, the DC-input points of individual phases of inverter-2
may be connected to a DC-link voltage of either (4/5)v,
5)vdC
or (2 /
by turning on the top switch or the bottom
switch of the corresponding phase leg in inverter-I.
Additionally, the pole voltage of a given phase in inverter-2
attains a voltage of zero, if the bottom switch of the
corresponding leg in inverter-2 is turned on. Thus, the pole
voltage of a given phase for inverter-2 is capable of assuming
one of the three possible values- 0, (2/5)Vdcand
(4/5)vdc,
which is the characteristic of a three level
inverter. This configuration of 3-level inverter eliminates the
neutral point fluctuations associated with the conventional
neutral clamped 3-level inverter [I] as the capacitors C, and
C2 do not carry the load current hut only the ripple currents.
The pole voltages of the 2-level'inverter (inverter-3, e.g.
v
~ assume
~
one
~ of ) the two values - either 0 or
(l/5)vdc,
depending on whether the top switch or the
bottom switch of a given phase leg is turned on.
It may be noted that, each of the three phases of the motor
can attain six distinct voltage levels (Table-I). Fig.2 depicts
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the voltage space phasor combinations from the three-level
inverter (left) and the two-level inverter (right) respectively.
It may be noted that the three-level inverter has 64 space
phasor combinations, and the two-level inverter has 8 voltage
space phasors (Fig.2). Thus, the number of resultant space
phasor combinations for the combined system is equal to 512
(64 x 8) distributed over 91 locations. In the present work,
only certain space phasor combinations are used to
demonstrate the capability of the proposed power circuit.
Certain space vector combinations are not used to ensure
that the capacitor C3, which is placed on the side of lower
voltage, is not charged by CI or C2, which are placed on the
sides of higher voltage (Fig.1). Alternatively, one could use a
regenerative front-end converter for the AC-DC conversion
in the lower side that is capable of maintaining a stiff DCvoltage across the capacitor C3 and use all the space vector
combinations.
The difference in the pole voltages, for example (v,,~ vAJ0.) (Tablel), contains harmonic components of the triplen
order. All these components are dropped across the points 0
and 0' (Fig.1) as isolated power supplies are employed to
power the individual inverters. Consequently, the motor
phase voltage does not possess the harmonic components of
the triplen order. The triplen harmonic currents are absent in
the motor phases for the lack of a return path.
In the proposed PWM scheme, only inverter-3 is switched
in the lowest speed range (with V/f mode operation), with
inverter-I and inverter2 are both clamped to a state of 8(---).
In the middle range of speed, inverter-2 and inverter-3 are
switched, while in the higher speed range, all the three
inverters are switched. Since inverter-l and inverter-2 are not
switched in the lowest speed range, the switching losses are
due entirely to the switching of inverter-3. Similarly in the
middle speed range, the switching losses are due to the
switching of inverter-2 and inverter-3 only.
Fig.3 shows the voltage space vector locations ;and the
voltage space phasor combinations of the individual inverters
in the lowest and the middle speed range. When inverter-I is
clamped to a state of 8(---), the DC-input points for inverter2 itre all connected to the DC-link voltage of ( 2 / 5 ) V d c .
Hence the pole voltage of inverter-2, vao, can assume one of
the states - 0 or (2/5)Vd,. The pole voltage of inverter-3,
vA30, can assume one of the states - 0 or (1/5)vdc,Thus,
the ratio of the DC-link voltages connected at either end of
the open-end winding induction motor is equal to 2:1 and up
to the middle speed range of operation, the proposed power
circuit configuration behaves exactly similar to the four-level
drive described in [6].
Fig.4 illustrates the space phasor locations and the space
phasor combinations in the higher speed range, i s when
inverter-l is also switched along with inverter-2 and inverter3. It can be observed that a total of 150 sectors are present in
Fig.4, organized into five layers. The combination '126'
means, inverter-I is switched with a state of'l'(+--), inverter2 is switched with a state of '2'(++) and inverter-3 is
switched with a state of '6'(+-+).
111. SWITCHING STRATEGY AND PWM PATTERN
GENERATION
The 91 voltage space phasor locations form the vertices
of 150 equilateral triangles, which are referred to as sectors
(Fig.3 and Fig.4). These sectors are distributed into five
layers (Fig.3 and Fig.4). The equilateral triangles numbered
'1' through '6' in the inner most layer are referred to as 'inner
sectors' (Fig.3). Layer-2 consists of the sectors numbered '7'
through '24' and layer-3 consists of the sectors numbered '25' through '54' (Fig.3). Similarly, layer4 is constituted by
the sectors numbered - '55' through '96' and layer-5
comprises of the sectors numbered - '97' through '150'
(Fig.4).
Six adjacent sectors constitute a sub-hexagon. Sixty such
sub-hexagons can be identified with their centers located at
Al through D2,, (Fig.3 and Fig.4). In addition, there is one
inner sub-hexagon with its center at 0 (Fig.3). Each outer
sector can be mapped to the inner sector by shifting the outer
sub- hexagonal center to the inner hexagonal center-0.
In this paper, the method employed to determine the
timing periods To, T i and T2 to realize the reference voltage
space phasor v , ~ involves
,
the following steps:
(i)
Finding the sector in which the tip of the reference
space phasor v., (OP, Fig.5) is situated;
(ii)
Finding the outer sub-hexagon to which the sector
belongs;
(iii)
Shifting the outer sub-hexagonal center to the
inner most hexagonal center using an appropriate
coordinate transformation so that the reference
voltage space phasor is mapped to the
corresponding sector in the inner most suhhexagon. Thus, the reference voltage space phasor
OP gets mapped as OP' in the inner sub-hexagon
(Fig.5);
Determining the time periods To, T, and T1 to
(iv)
realize the mapped reference voltage space phasor
OP', in the inner most hexagon [ 5 ] ;
Employing these time periods to switch the space
(v)
vector combinations available at the vertices
forming the sector in which the tip of the reference
space phasor is situated [S] [7].
Thus, this procedure is conceptually equivalent to realize
the mapped reference space phasor in the inner hexagon and
applying a vectored offset to realize the actual reference
space phasor in the outer sector. It may he noted that this
procedure ensures that the reference space phasor is realized
by switching amongst the three vertices, which are situated
in the closest proximity to the tip of the actual reference
space phasor. Consequently, the switching ripple in the
output voltage waveform is minimized.
The sector identification is accomplished by comparing the
components of OP on the >a', gb', 5c' axes (perpendicular to
the - a, b, c axes), denoted by vJ., v , vJ. respectively, with
I?
appropriate reference quantities using level comparators
~
974
(Fig.5)[5][6]. For example, it may he verified that if,
):(:
vIY< 1 , vib > -41 and v j , < 41 where 1 = - then the tip of the reference voltage space vector is situated
in sector numbered '55' (Fig.4 and Fig.5). A similar
procedure is adopted to identify all of the remaining sectors.
IV. EXPERIMENTAL RESULTS AND DISCUSSION
The proposed scheme is implemented for a 1 H.P., 3phase open-end winding induction motor drive in open loop
with Vif control, using TMS 3203240 DSP. The respective
DC-bus voltages are (2/5)vd,, (2/)5Vd,and (115)Vdc for
inverter-I, inverter-2 and inverterd. This means that the
DC-bus voltage of an equivalent conventional 2-level
inverter drive is VdE.Look-up tables are employed for the
generation of PWM signals in each layer.
The experimental results for lvsr I = 0.12
are
presented in Fig.6. In this case, the tip of the reference
voltage space phasor v , ~is confined to the inner sectors i.e.
sectors 'I' through '6' (Fig.3). The top trace of Fig6 depicts
(Fig.]) and the bottom
the actual motor phase voltage vA2A3
trace of Fig.6 illustrates the motor phase current at no-load.
The motor phase voltage shows the familiar 2-level
waveform as the switching is confined to the inner hexagon.
Similar experimental results are presented for Jv, 1 =
0.3
In this case, the tip of the reference voltage vector is
confined to the layer-2, which consists of sectors numbered
'7' through '24'. In this operating region, inverter-2 and
inverter-3 are switched while inverter-I is clamped to a state
of '8'(---). Fig.7 shows the waveforms of the motor phase
voltage (top trace) and the motor phase current at no-load
(bottom trace). In this case, the motor phase voltage shows a
3-level waveform. Similar conclusions can he drawn from
the experimental results shown in Fig.8 corresponding to the
case lvlrl = 0.48Vd,. In this operating condition, the tip of vsr
is situated exclusively in the sectors of layer-3 (sectors
numbered '25' through '54'). In this region also, inverter-I is
clamped to a state of '8'(---). In this case, the motor phase
voltage shows a 4-level waveform. Fig.9 illustrates the
, forced to
experimental results obtained when the tip of v ~ is
be within the layer4 (sectors '55' through '96') and
corresponds to the case of lvsr/= 0.65Vd,. Unlike the three
previous cases, all the inverters are switched in this speed
range. The motor phase voltage is further refined, showing a
5-level waveform, as the space vector PWM scheme uses the
24 vertices, 'DI' through 'D2{ along with the vertices - 'C,'
through 'CIS'. Fig.10 illustrates the experimental results
obtained when the tip of v,, is restricted to be within the
layer-5 (sectors '97' through ,150') and corresponds to the
case of Iv,J = 0.83Vd,. The motor phase voltage is the most
refined, now showing a 6-level waveform, as the space
vector PWM scheme uses the 30 vertices, 'El' through 'El;
along with the vertices - 'Dl' through ID2:. Further
experimental results are presented for the case of over-
vdc
vdc.
modulation and the thirty-step operation. When the inverter
system is over-modulated, the tip of va. is forced to trace the
outer most hexagon. The motor phase voltage shows a 6level waveform in this case also (Fig.1 I).
Fig.12 presents the waveforms of the motor phase voltage
(top trace) and the motor phase current (bottom trace) for the
30-step bpeiation under no load operation. The motor phase
voltage clearly shows thirty steps in this case while the motor
phase current is slightly distorted compared to the earlier
cases due to the increased magnitude of the lower order
harmonics in phase voltage.
V. CONCLUSION
A six-level inverter drive scheme, for an open-end
winding induction motor is presented. The salient features of
this scheme are:
The open-end winding induction motor is fed by a
3-lcvel inverter from one end and a 2-level inverter
from the other end. A total of 512 voltage space
phasor combinations are present, distributed over 91
space vector locations.
The 3-level inverter used in this scheme is realized
by connecting two 2-level inverters in cascade. This
3-lcvel inverter eliminates the neutral point
fluctuations, which are present in the conventional
neutral clamped 3-level inverter.
A controlled AC to DC converter is needed for the
low voltage 2-level inverter to use all the space
vector combinations.
The motor phase voltage in the proposed inverter
scheme shows a 2-level PWM phase voltage
waveform in the lowest speed range, a 3-level or a
4-level PWM phase voltage waveform in the
medium speed range or a 5-level or a 6-level PWM
phase voltage waveform in the higher speed range.
.
.
VI. REFERENCES
[I]
[2]
[3]
[4]
[S]
975
A.Nahse, LTakahashi, and H.Agaki,"A New NeutralpointGlamped PWM Inverter", IEEE Transactions
on Indostry Applications, vol.IA-17, Sept.iOct. 1981,
pp 518- 523.
Madhav D. Manjrekar and Thomas A. Lipo,
"A Hybrid Multilevel Inverter Topology for Drive
Applications", in Proceedings of the 1998 IEEE APEC Conference, pp.523-529
A.Rufer, M.Veenstra and K.Gopakumar, "Asymmetric
Multilevel Converter for High Resolution Voltage
Phasor Generation",in Proceedings offhe 1999
EPE Conference, pp. PI-PIO.
HStemmler and P.Guggenhach, "Configurations of
High Power Voltage Source Inverter Drives", in
Proceedings of the 1993 EPE Conference, pp.7-12.
E.G.Shivakumar, K.Gopakumar and V.T.Ranganathan,
"Space vector PWM control of Dual Inverter fed
Open-end winding Induction Motor drive", in
Proceedings ofthe 2001 IEEE - APEC Conference,
pp.394 - 404.
[6] E.G S h i v a h a r , V.T Somasekhar, K.K.Mohapatra,
K.Gopakumar and L.Umanand, " A Multilevel Spacephasor based PWM Strategy for an Open-end
Winding Induction Motor Drive using Two Inverters
with Different DC Link Voltages", in Proceedings of
the 2001 IEEE-PEDS Conference, pp.169-175.
[7] Joohn-Sheok Kim and Seung-Ki Sul, "A Novel Voltage
Modulation Technique of the Space Vector PWM", in
Proceedings of the 1995 IPEC Conference, pp.742747.
n
Pole-voltage of
2-lev1 inverter (vAgg.)
I/5Vd,
n
Motor phase voltage
(VA2A3)VA2A3 = vA20. vA30
-1/5vd,
n
2/5Vd,
2/5V",
4/5Vd,
4/SVd,
1/5Vd,
0
l/5Vd,
0
I/SV,,
2/5Vd,
315V&
4/5Vd,
Pole-voltage of
3- level inverter (vIuo)
0
............................................................................
Ihlee-LPuel in*-=
Fig. I Schematic circuit diagram of the proposed invener drive scheme
. ."
Fig3 The voltage space vector locations for the proposed
inverter topology with inverter-1 (Fig.1) clamped to a state of
Pig.2 Voltage space vcctor locations of the three-level inverter (Left) and
the two-level invener (Right)
'8' (..)
976
Fig.5 Mapping the rcference voltage space phasar V,, = OP La (tip situated in secior-55) into the inner sub-hexagon
(OP' represents the mapped voltage space vector in the inner sub-hexagon)
OX = Y,. ; OY = v,~and 0 2 = v,,
911
- .-.
5*.:
.
.
.......................
...........................
,
:
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1
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.
:
:
.......................
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.
.
.:...
....... . . . . . i ....... . . . . 1 ... . . . . . . . . . . .
?-ms--j
;
.........i
....i ....... i . . . , ~... . .
........
.... . ~ . . . . ~. . . . . .....j
I
......
.....I
Y
Fig 6 Motor phase voltagr and rurr~ntwhen v. = 0 12V&
(24rrel waveform forthe phase volmge)
Scale X-axts 2Oms dw Y-axis SO voltsdiv
--- ........
...........
.
!......I.
t...
,
~
,
-.:.
---,
,
..............
i. . . . . .!
.
. . . . . .’ . . .
Fig 7 Motor phase voltage and cwmi when
= 0 3V,
(3-level waveform for thc phac tollage)
Scale X.axir 2Omrdiv Y-axis 100 voltrdiv
--.-.. ,
r.:-.,
. . ;. . . . . .
,
,.
~
.z+q
. . . . ,. . . . .1I
..f .
--- .:.
”
,........
I
,
---.--
. . . :. . . . . ., . . . .
.....
. . . . . . . . :. . . . . I--,
.
,
.
.
.
,
:
,
. . . . . .,. . . . . . ... . . . . . .., . . . . . . . . . . . . . . . . . . . . . . . . ..
.: . . . . . . . . . . . .
/I
~
......
Fig.8 Motor phase voltage and current when Iv../ = 0.48V.h
(4-level waveform for the phase voltage)
Scale: X-axis: IOmsidiv. Y-axis: 100 voltddiv
Fig9 Motor phase voltage and current when
= 0.65Va.
(5-level waveform for the phase voltage)
Scale: X-axis: I O d d i v . Y-axis: 100 voltddiv
t
Fig. 10 Motor phase voltage and current when Ivd = 0.83Vd.
(6-level waveform for the phase voltage)
Scale: X-axis: Smddiv. Y-axis: 100 voltddiv.
Fig.] 1 Motor phase voltage and current when Iv.l= V
,
(Over-modulation)(6-l~velwaveform for the phase voltage)
Scale: X-axis: Smddiv. Y-axis: 100 voltsidiv.
Fig.12 Motor phase voltage and current for 30-step operation
Scale: X-axis: Srnddiv. Y-axis: 100 voltddiv
Note: Scale for all motor phase current plots: IAmpIdiv.
978