IDT74ALVC162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT
BUFFER/DRIVER WITH
3-STATE OUTPUTS
FEATURES:
IDT74ALVC162244
DESCRIPTION:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
µ W typ. static)
• CMOS power levels (0.4µ
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
This 16-bit buffer/driver is built using advanced dual metal CMOS
technology. The ALVC162244 is designed specifically to improve the
performance and density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and transmitters. The device can be
used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides
true outputs and symmetrical active-low output-enable (OE) inputs.
The ALVC162244 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
DRIVE FEATURES:
APPLICATIONS:
• Balanced Output Drivers: ±12mA
• Low switching noise
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
1 OE
1
3 OE
1A1
47
2
1A2
46
3
44
5
43
6
1A3
1A4
2 OE
48
2A 1
41
8
40
9
38
11
37
12
2A2
2A 3
2A 4
1Y 1
3A 1
1Y 2
3A 2
1Y 3
3A 3
1Y 4
3A 4
25
36
13
35
14
33
16
32
17
3Y 1
3Y2
3Y 3
3Y 4
4 OE
24
2Y 1
4A 1
30
19
4Y 1
2Y2
4A 2
29
20
4Y2
2Y3
4A 3
27
22
2Y 4
4A 4
26
23
4Y 3
4Y 4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
MARCH 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4560/1
IDT74ALVC162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
Description
VTERM(2)
Max
Terminal Voltage with Respect to GND
VTERM(3) Terminal Voltage with Respect to GND
Unit
–0.5 to +4.6
V
–0.5 to VCC+0.5
V
1OE
1
48
2OE
1Y1
2
47
1A1
1Y2
3
46
1A2
GND
4
45
GND
1Y3
5
44
1A3
1Y4
6
43
1A4
VCC
7
42
VCC
2Y1
8
41
2A1
2Y2
9
40
2A2
GND
10
39
GND
2Y3
11
38
2A3
2Y4
12
37
2A4
3Y1
13
36
3A1
Symbol
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
5
7
pF
COUT
Output Capacitance
VOUT = 0V
7
9
pF
COUT
I/O Port Capacitance
VIN = 0V
7
9
pF
3Y2
14
35
3A2
GND
15
34
GND
3Y3
16
33
3A3
3Y4
17
32
3A4
VCC
18
31
VCC
4Y1
19
30
4A1
4Y2
20
29
4A2
GND
21
28
GND
4Y3
22
27
4A3
4Y4
23
26
4A4
4OE
24
25
3OE
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
VI < 0 or VI > VCC
±50
mA
IOK
Continuous Clamp Current, VO < 0
–50
mA
ICC
ISS
Continuous Current through each
VCC or GND
±100
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
Description
xOE
3-State Output Enable Inputs (Active LOW)
xA x
Data Inputs
xYx
3-State Outputs
FUNCTION TABLE (EACH 4-BIT BUFFER)(1)
SSOP/ TSSOP/ TVSOP
TOP VIEW
Inputs
xOE
xAx
xYx
L
H
H
L
L
L
H
X
Z
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2
Outputs
IDT74ALVC162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
Symbol
VIH
VIL
Min.
Typ.(1)
Max.
Unit
VCC = 2.3V to 2.7V
1.7
—
—
V
VCC = 2.7V to 3.6V
2
—
—
VCC = 2.3V to 2.7V
—
—
0.7
VCC = 2.7V to 3.6V
—
—
0.8
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Test Conditions
V
IIH
Input HIGH Current
VCC = 3.6V
VI = VCC
—
—
±5
µA
IIL
Input LOW Current
VCC = 3.6V
VI = GND
—
—
±5
µA
IOZH
High Impedance Output Current
VCC = 3.6V
VO = VCC
—
—
±10
µA
IOZL
(3-State Output pins)
VO = GND
—
—
±10
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
—
–0.7
–1.2
V
VH
ICCL
ICCH
ICCZ
∆ICC
Input Hysteresis
Quiescent Power Supply Current
VCC = 3.3V
VCC = 3.6V
VIN = GND or VCC
—
—
100
0.1
—
40
mV
µA
Quiescent Power Supply Current
Variation
One input at VCC - 0.6V, other inputs at VCC or GND
—
—
750
µA
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
OUTPUT DRIVE CHARACTERISTICS
Symbol
VOH
Test Conditions(1)
Parameter
Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC = 2.3V
VCC = 2.7V
VCC = 3V
VOL
Output LOW Voltage
Min.
Max.
Unit
VCC – 0.2
—
V
IOH = – 4mA
1.9
—
IOH = – 6mA
1.7
—
IOH = – 4mA
2.2
—
IOH = – 8mA
2
—
IOH = – 6mA
2.4
—
IOH = – 12mA
2
—
VCC = 2.3V to 3.6V
IOL = 0.1mA
—
0.2
VCC = 2.3V
IOL = 4mA
—
0.4
IOL = 6mA
—
0.55
IOL = 4mA
—
0.4
IOL = 8mA
—
0.6
IOL = 6mA
—
0.55
IOL = 12mA
—
0.8
VCC = 2.7V
VCC = 3V
V
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
3
IDT74ALVC162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, TA = 25°C
Symbol
Parameter
CPD
Power Dissipation Capacitance Outputs enabled
CPD
Power Dissipation Capacitance Outputs disabled
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Test Conditions
Typical
Typical
Unit
CL = 0pF, f = 10Mhz
16
19
pF
4
5
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V ± 0.2V
Symbol
Parameter
tPLH
Propagation Delay
tPHL
xAx to xYx
tPZH
Output Enable Time
tPZL
xOE to xYx
tPHZ
Output Disable Time
tPLZ
xOE to xYx
tSK(o)
Output Skew(2)
VCC = 2.7V
VCC = 3.3V ± 0.3V
Min.
Max.
Min.
Max.
Min.
Max.
Unit
1
4.9
—
4.7
1
4.2
ns
1
6.8
—
6.7
1
5.6
ns
1
6.3
—
5.7
1
5.5
ns
—
—
—
—
—
500
ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
IDT74ALVC162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
VCC(1)= 3.3V±0.3V VCC(1)= 2.7V
Symbol
V IH
VT
0V
SAME PHASE
INPUT TRA NSITION
VCC(2)= 2.5V±0.2V
Unit
VLOAD
6
6
2 x Vcc
V
VIH
2.7
2.7
Vcc
V
VT
1.5
1.5
Vcc / 2
V
V LZ
300
300
150
mV
VHZ
300
300
150
mV
CL
50
50
30
pF
t PLH
t PHL
t PLH
t PH L
V OH
VT
V OL
OUTPUT
V IH
VT
0V
OPPOSITE PHASE
INPUT TRA NSITION
ALVC Link
Propagation Delay
V LOAD
VCC
Open
500 Ω
(1, 2)
V IN
CONTROL
IN PUT
V OU T
Pulse
Generator
DIS ABLE
ENA BLE
GND
D.U.T.
t PZL
OUTPUT
SW ITCH
NORMALLY
CLO SED
LOW
t PZ H
OUTPUT
SWITCH
NORMA LLY
O PEN
HIGH
500 Ω
RT
CL
ALVC Link
Test Circuit for All Outputs
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
VLOAD
Disable High
Enable High
GND
All Other Tests
Open
V LOAD /2
V OL + V LZ
V OL
t PHZ
V OH
V OH - V HZ
VT
0V
0V
Enable and Disable Times
SWITCH POSITION
Open Drain
Disable Low
Enable Low
V L OAD/2
VT
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
DATA
INPUT
Switch
0V
t PLZ
ALVC Link
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.
Test
V IH
VT
t SU
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
tH
TIMING
INP UT
t R EM
A SYNCHRONOUS
C ON TROL
SYNCHRONOUS
C ON TROL
t SU
tH
ALVC Link
Set-up, Hold, and Release Times
V IH
INPUT
t PLH1
VT
0V
t PHL 1
LOW -HIGH-LOW
PULSE
V OH
OUTP UT 1
t SK (x)
VT
V OL
t SK (x)
tW
V OH
HIGH-LOW -H IGH
PULSE
VT
V OL
OUTPUT 2
t PLH 2
VT
ALV C Link
Pulse Width
t PH L2
t SK (x) = t PLH 2 - t P LH1 or t PH L2 - t PHL1
Output Skew - tSK(X)
VT
ALVC Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
IDT74ALVC162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XX
ALVC
Temp. R ange
X
XX
XXX
XX
Bus-Hold
Family
D evice Type
Package
CORPORATE HEADQUARTERS
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Santa Clara, CA 95054
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PF
Shrink Small O utline Package (SO48-1)
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244
16-Bit Buffer/Driver w ith 3-State Outputs
162
D ouble-D ensity w ith R esistors, ±12m A
Blank
N o Bus-Hold
74
– 40°C to +85°C
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