EE-313 LAB #7
ALTERA QUARTUS II DESIGN SOFTWARE
MOD 8 Ripple Up Counter
1. Purpose:
Demonstrate operation of a counter using a Positive Edge Triggered JK Flip Flop
Demonstrate use of the 7447 7-Segment Display driver and the 7-Segment Display.
Demonstrate operation of Active Low Set and Reset
2. Equipment: Desktop with Altera Software
Altera PLD Board
Altera Quartus II Quick Reference
3. Procedure
a. Create a new Quartus Project called lab07_lastname.
b. Download the one_sec_clock.bdf and one_sec_clock.bsf files from the EE313 web page and
save them in your lab07 project directory.
c. Create the counter using the given schematic.
7447
INPUT
VCC
GND
KEY [1]
CLRN
inst2
VCC
K
Q
OUTPUT
inst13
VCC
CLRN
inst1
NOT
PRN
J
VCC
CLRN
K
Q
OUTPUT
inst
inst12
VCC
K
NOT
PRN
J
VCC
sec_clock
Q
OUTPUT
clock
VCC
INPUT
VCC
PRN
J
VCC
one_sec_clock
JKFF
JKFF
JKFF
A
B
C
D
LTN
RBIN
BIN
OA
OB
OC
OD
OE
OF
OG
RBON
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
inst15BCD TO 7SEG
ledr[2]
INPUT
VCC
ledr[0]
KEY [0]
ledr[1]
inst14
Note: Remember that you can find a given symbol by typing its name into the Symbol
selector Name block. This project uses 4 new symbols. (VCC, GND, 7447, and
ONE_SEC_CLOCK)
d. Download and import the pin assignments file from the EE313 website.
e. Assign Pins per the following table.
Input
Pin Name
Clock
CLOCK_27
Asynchronous Set
KEY[1]
Asynchronous Reset
KEY[0]
OA,OB,OC,OD, OE, OF, OG
HEX0[0] through HEX0[6]
Q0, Q1, Q2
LEDR[0] through LEDR[2]
f. Program your Altera board and demonstrate its operation to the Instructor.
4. Deliverables Your lab notebook shall include:
a.
Block Diagram Schematic
b.
Lessons Learned
c.
Instructor Initial indicating proper demonstration of your project.
d.
Answer how this could be converted to down counter.
EE313
Lab #7
Spring 12
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