Part I: Course overview TDDC05: Embedded Systems • Check www.ida.liu.se/~TDDC05 Simulation and Verification • Course roles: – Examiner: Simin N-T – Course assistant: Jonas Elmqvist – Supervisor: Calin Curescu Lecture 1: Course overview, Introduction to SE/modelling • Project roles: – Consultant: Jonas Elmqvist – Customer: Simin N-T Simin Nadjm-Tehrani Real-time Systems Laboratory Department of Computer and Information Science Embedded systems simulation and verification Linköping university 40 pages Spring term 2006 Embedded systems simulation and verification Linköping university Industrial lecture & Feedback • Invited lecture: Friday 20/1, Tool Demo and short overview of UML 2.0, Telelogic – Tell me what you think about this lecture! – Interested in new tool lectures? • Book Monday 6/3 for Muddy Card evaluation! • Feedback is welcome continuously! Embedded systems simulation and verification Linköping university 3 of 40 Spring term 2006 Embedded systems A computer system that – is part of a larger system, – is tailor-made for a specific application, – is characterised by restricted programmability by the user, – has tight interaction with a physical environment. Embedded systems simulation and verification Linköping university This course ... ... is about development process for complex embedded systems • In particular: systems in which software is a significant component 2 of 40 Spring term 2006 4 of 40 Spring term 2006 Systems Engineering An interdisciplinary collaborative approach to derive, evolve, and verify a life-cycle balanced system solution which satisfies customer expectations and meets public acceptability IEEE P1220 Standard Sys. Eng. process Embedded systems simulation and verification Linköping university 5 of 40 Spring term 2006 Embedded systems simulation and verification Linköping university 6 of 40 Spring term 2006 Software engineering The Printing plant Paper rolls • What is the difference? Software package Temp_Control is subtype Temperature is integer range 0..100; Sensor_Dead, Actuator_Dead: exception; ... end Temp_Control; Embedded systems simulation and verification Linköping university Fetch full roll! radio Software receiver LGV Hardware LGV Operator Embedded systems simulation and verification Linköping university 7 of 40 Spring term 2006 Project presentation • The description is intentionally vague and unstructured! It is from a real company! • Objectives: – to follow the process of systems engineering (according to books) and prepare the documentation of the work as steps gets completed – To learn to use the tools from scratch (given basic theoretical knowledge) – To learn how to plan, cooperate and follow up plans – To practice written and oral presentation Embedded systems simulation and verification Linköping university Overview • • • • • • History of the course Why these tools? Assume familiarity with LIPS The teacher roles Group formation The student roles – See a potential update on the web page once the group numbers are fixed! Embedded systems simulation and verification Linköping university 9 of 40 Spring term 2006 Planned & unplanned time • Role of lectures: Orientation & theory • See web for LIPS and Ind. Lecture! • Other occasions: – Time with supervisor to be booked in advance. First meeting: Friday 27/1! – Time with consultant to be booked in advance – Lab hours, no teacher attendance Embedded systems simulation and verification Linköping university 11 of 40 Spring term 2006 8 of 40 Spring term 2006 10 of 40 Spring term 2006 Examination • • • • • UPG part: period 1 PROJ part: period 1 and 2 Common (group) grade: G/U Simin ”approves” Req. Spec. Calin ”approves” time plan & project plan, and at each meeting follows up the resource usage and progress • Jonas ”approves” the design • Simin ”approves” Test/Verification docs • Jonas corrects the logic exercises Check deadlines on the web! Embedded systems simulation and verification Linköping university 12 of 40 Spring term 2006 Trouble shooting • No knocking on the doors! • May send mails to Calin and Jonas and expect an answer within 2 days • Attendance to tool problems may take a couple of days in the worst case Practical stuff • Limitation on printing quota! • Password for accessing the LIPS templates • Group account for project Embedded systems simulation and verification Linköping university 13 of 40 Spring term 2006 Post-analysis • Technical content: – The customer will add an adjustment to the reqs. (an update) 3 weeks from the end of the course. The postanalysis should include a reflection on how this change affects the design and the verification. • Process content: – See next slide. Embedded systems simulation and verification Linköping university 15 of 40 Spring term 2006 Embedded systems simulation and verification Linköping university Post-analysis reflection • What did we learn? Are the goals in the course plan accurate? • What was specially fun about the things we learnt? • How we organise/plan the work if we would start from scratch today? • How could the course be improved by changing the way teachers were interacting, or by a different timing of the ingredients in the course? • Would we read more if more material was selected and put on the web pages in advance? Embedded systems simulation and verification Linköping university Questions? 16 of 40 Spring term 2006 This lecture: Part II • Review of basic terminology • Orientation about major topics in the course: – Review of systems engineering process models and what they are good for – What are models and specifications and why do we need them? – Overview on verification techniques Now to Process/Modelling … Embedded systems simulation and verification Linköping university 14 of 40 Spring term 2006 17 of 40 Spring term 2006 Embedded systems simulation and verification Linköping university 18 of 40 Spring term 2006 Handout System development process • There are as many models as there are companies, but the models in the literature emphasise common aspects • See figure 2.4-2.6 in Blanchard & Fabrycky • NOTE: resemblance to software engineering process models! Embedded systems simulation and verification Linköping university 19 of 40 Spring term 2006 • Figure 2.4 - 2.6 • Note concepts: – test & evaluation – review – analysis Embedded systems simulation and verification Linköping university Why an ideal process model? • Methodology for novices • Focus attention on important areas • Standardisation in large companies • Mechanism for measuring success • Project overview for external organisations/individuals (David L. Parnas) Embedded systems simulation and verification Linköping university 21 of 40 Spring term 2006 Process-Technique-Tool • Each phase in the process can be supported by one or more techniques, e.g. Verification: – Testing – Inspection – Simulation – Formal verification • Each method can be supported by one or more tools e.g. Testing: – Test case generation, unit test tools,… Embedded systems simulation and verification Linköping university Verification and Validation • Verification: to detect errors in a verification object (design model, program, HW-circuit) with respect to a requirements specification To build the system right • Validation: to determine whether requirements reflect ”needs of the user” To build the right system Embedded systems simulation and verification Linköping university 23 of 40 Spring term 2006 20 of 40 Spring term 2006 22 of 40 Spring term 2006 V&V in development process User reqs System reqs operational system integrated system ... Component reqs ... Component design implemented component Embedded systems simulation and verification Linköping university 24 of 40 Spring term 2006 Notation • System validation • System verification Models are built either before or after ”the thing”. This course: • Requirements verification, Component verification, Potential approach for System level verification • Modelling! Embedded systems simulation and verification Linköping university 25 of 40 Spring term 2006 Specifications done usually before... Embedded systems simulation and verification Linköping university Requirements • Note difference between user requirements and system requirements • Many different ways to formulate (capture) and document (specify) the requirements • In systems engineering important to trace requirements Embedded systems simulation and verification Linköping university 27 of 40 Spring term 2006 Handout • Different types of requirements • See Figure 3.4 in Stevens, Jackson, Brook & Arnold • Not all types of requirements validated/verified systematically Embedded systems simulation and verification Linköping university Models (why?) • Prototyping (requirements capture) • Iterative design refinement, co-design, distribution, optimisation, documentation • Subgroup/subcontractor communication • Overview (handling complexity) • Code generation (efficient production) • Systematic test case generation • Certification, formal analysis Embedded systems simulation and verification Linköping university 29 of 40 Spring term 2006 26 of 40 Spring term 2006 28 of 40 Spring term 2006 Models (which?) • • • • Architectural (component) Functional (input - output) Behavioural (over ”time”) Life cycle (dependability: reliability, safety, availability, maintainability, …) • Other (size, weight, shape, cost, ...) Embedded systems simulation and verification Linköping university 30 of 40 Spring term 2006 Models (How?) Models (How?) Language Method Tool Or vice versa... – formal/semi-formal – general/specific – specification type: requirements, design, environment, ... – purpose: verification, optimisation, test generation, … Model used in a process Language Tool Method Embedded systems simulation and verification Linköping university 31 of 40 Spring term 2006 System design approach (1) • Function-oriented Embedded systems simulation and verification Linköping university 32 of 40 Spring term 2006 System design approach(2) • State-oriented Requirements Requirements Functions States States Functions Architecture Embedded systems simulation and verification Linköping university 33 of 40 Spring term 2006 System design approach(3) • Object-oriented Architecture Embedded systems simulation and verification Linköping university 34 of 40 Spring term 2006 What does UML deliver? • All three computational models – State-based – dataflow-based – Object-based Requirements Objects • With no (complete) formal semantics! / • No mechanisms for systematic tracing of requirements Architecture • Soon: UML profile for systems engineering Embedded systems simulation and verification Linköping university 35 of 40 Spring term 2006 Embedded systems simulation and verification Linköping university 36 of 40 Spring term 2006 Handout • What does it look like in the real world? • See figure 2.1 in Shumate & Keller Embedded systems simulation and verification Linköping university 37 of 40 Spring term 2006 V&V methods • • • • • • In reality done using a combination of following activities: Testing Inspection Simulation Formal verification This course Prototyping Use cases (scenarios) Embedded systems simulation and verification Linköping university } 39 of 40 Spring term 2006 Ideal ¾Reality Problems not deeply studied in the course: • Non-functional requirements • Legacy modules • Technological development & interoperability issues • Organisation, personnel resources, professional education Embedded systems simulation and verification Linköping university 38 of 40 Spring term 2006 Simulation vs. Formal verification • Simulation can demonstrate what will happen – Presence of the desired • Formal verification can prove what will not happen – Absence of the undesired Embedded systems simulation and verification Linköping university 40 of 40 Spring term 2006