Linköping University 2009-05-18 Department of Computer and Information Science (IDA)

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Linköping University
Department of Computer and Information Science (IDA)
Concurrent programming, Operating systems and Real-time operating systems (TDDI04)
2009-05-18
Memory management assignments (lesson 3)
1. Explain how using a unprotected system call solution can give the process programmer unauthorized read and write access to an other process memory. You can assume a malicious attacker with full knowledge of your implementation and the
memory addresses to reach. Explain step by step how to first read a memory portion
and then overwrite selected parts.
2. What is a buffer overflow?
3. What is an address space?
4. Given a 15-bit address space and assuming 2-bytes is used for each page pointer:
a) Determine a minimum page size so that a pagetable fit completely in one page
and cover the entire address space.
b) How many pages does it yield?
5. Given a modern 64-bit architecture with 6-bytes used for each page pointer, 1 MB
pages, and 16 GB installed memory:
a) How much memory can be addressed by the paging solution?
b) How large must each page table be?
c) Suggest and motivate a better solution.
6. Calculate the effective average access time when using virtual memory when a
memory access require 100 ns, a disk access 10 ms and the page fault rate is 0.1%.
We assume the effect of any caches and tlb are included in the 100 ns figure.
7. Repeat question 2, but with a 2-level paging solution. What about a N-level solution?
8. Given the following pagetable and the physical memory described on next page, answer the questions below. It is the steps needed to arrive at the correct answer that
are important, not just the answer.
All questions assume the given memory and pagetable state. (For simplicity NOT
the the state after previous question.)
a) Lookup physical address 0x83
b) Lookup relative address 0x83 (physical base address 0x21)
c) Lookup logical address 0x83 (10000011)
d) Lookup logical address 0x21 (00100001)
e) Lookup virtual address 0x83 (victim frame is 2 if applicable)
f) Lookup virtual address 0x83 (victim frame is 5 if applicable)
g) Lookup virtual address 0x7B (victim frame is 7 if applicable)
h) Lookup virtual address 0x21 (victim frame is 3 if applicable)
1
Linköping University
Department of Computer and Information Science (IDA)
Concurrent programming, Operating systems and Real-time operating systems (TDDI04)
2009-05-18
9. Assume a demand paging system with Memory access time = 50 nanoseconds, 5
milli for page fault service time and the limit 100 nano seconds you can not exceed.
What is your acceptable page-fault rate?
10. How much performance degradation is the move from 100ns access time to 10us
access time?
11. What pagefault rate is needed to achieve less than 10% performance degradation?
12.Given the following page access sequence and a memory with 4 frames initially
empty, which replacement strategy is preferable; FIFO or LRU? How can LRU be
implemented?
[2 6 1 6 4 5 8 6 8 7 4 4 5 2 4 2 5 4 1 3]
2
Linköping University
Department of Computer and Information Science (IDA)
Concurrent programming, Operating systems and Real-time operating systems (TDDI04)
2009-05-18
Memory properties:
8-bit address space (256 byte)
256 (2^8) byte total memory
32 (2^5) byte per page
8 (2^3) frames
Memory contents:
page
x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
Fx
7 Ex
06 61 89 b0 3b 67 94 1e e5 b1 a3 0e 93 d9 64 b2
f0 c0 69 a0 ef 28 33 88 f4 c1 09 53 ae a0 34 fd
Dx
6 Cx
a0 fc f6 c6 ce f1 ac 2b 21 e8 c1 9c 95 36 c9 97
22 72 99 de 09 21 19 f7 a0 0f 2f fb e8 f9 79 28
Bx
5 Ax
f0 13 f0 06 f7 3a 01 f1 bf c8 82 74 e5 89 79 21
77 19 c2 9d ee 06 8f 7d 30 2a 97 40 74 d5 b7 2b
9x
4 8x
ee 56 1c 32 0b e4 5b 2a 71 d5 3d 09 2e d0 20 10
f9 4a 48 dd 54 b8 6e b5 4a 21 7c 90 53 8e f3 60
7x
3 6x
48 ea 36 ed b7 34 46 c1 6f 7d eb 0b 06 6d bc b9
89 81 6a d8 08 57 81 7a ae d6 5c f0 01 4a 9e 63
5x
2 4x
03 94 80 09 3e 98 43 d6 40 94 10 74 cd cd 8f 09
28 0d d7 86 4e 9c 01 d6 df 46 9b de 3e fd 3a 01
3x
1 2x
5a 44 c7 5d d5 10 ec 92 89 5c 2c ed ca 82 e2 a7
c5 c8 95 11 85 2d 7e c8 e9 88 a1 ae cc 30 83 c0
1x
0 0x
51 89 84 3f 1d 2c 38 79 77 f0 5b 5b 34 8a 6b 11
8d f0 4c 0f 23 db e2 c7 5f 48 b0 cd 7d 3f c6 56
Page table:
Index
(page number) :
Content (frame number):
Valid bit
:
Modified bit
:
0
3
1
0
1
2
1
0
2
5
1
1
3
6
0
0
4
1
0
0
5
7
1
0
6
0
1
1
7
4
1
1
All physical frames are used and the following frames reside on disk:
frame
4
6a 10 30 05 c3 43 ab bc d9 3a a4 e7 32 16 4f 7a
5e 3a 19 f7 bf 95 f8 01 ed d8 68 bb 34 00 87 64
2
ca 08 e8 65 20 09 00 74 df ce b1 df 17 cc 8a 8c
08 20 0c 83 a3 e5 14 8d 65 46 b1 44 01 4b cb 98
1
cb ae e8 bb e7 2c 91 5c 60 4f 4d da 2f b6 0f 0f
08 07 1f 8d 55 b8 56 06 06 61 d5 d4 a6 71 d7 eb
3
Linköping University
Department of Computer and Information Science (IDA)
Concurrent programming, Operating systems and Real-time operating systems (TDDI04)
2009-05-18
Answers
1. Test and discuss.
2. See book and wikipedia.
3. Total amount of theoretical process reachable memory by chosen memory management solution.
4.
a) (adr_size / page_size) * 2 == page_size
page_size == sqrt(adr_size * 2)
page_size = 2^8 = 256 byte
b) page_pointer = 2 byte
number_of_pages = 128 (2^7)
page_table_size = 256 byte
5.
a) addressable = 2^48 * 2^10 => 2^58 byte == 2^18 TB
b) pagetable = 2^64 / 2^10 * 6 => 3 * 2^55 => 3 * 2^15 TB
c) An inverted page table uses only one slot in the table per real frame of memory
and is shared by all processes, thus the total size used by page tables in this case
is limited to: 2^34 / 2^10 * 6 = 3 * 2^25 = 48MB
6. (1 - pf_rate) * mem_time + pf_rate * (disk_time + mem_time)
mem_time - pf_rate * mem_time + pf_rate * (disk_time + mem_time)
mem_time + pf_rate * (disk_time + mem_time - mem_time)
mem_time + pf_rate * disk_time
100 ns + 0.001 * 10 ms = 10.1 us
4
Linköping University
Department of Computer and Information Science (IDA)
Concurrent programming, Operating systems and Real-time operating systems (TDDI04)
2009-05-18
7. Calculation:
e
m
p
d
=
=
=
=
effective access time
memory access time
page fault rate
disk access time
f = first level access
s = second level access
f = (1-p)*m + p*d
s = (1-p)*f + p*d
e = (1-p)*((1-p)*m + p*d) + p*d
e = (1-p)^2*m + (1-p)*p*d + p*d
e = (1-p)^2*m + (2*p-p*p)*d
e = 0.999^2 * 100ns + (0.002 - 10^-6)*10ms
e ~ 100ns + 20us
Simplified: N times single-level access time due to the insignificance of
the memory access time compared to disk access time.
8. Short summation:
a) 0x83 => row 8x + col x3 => dd
b) 0x83 + 0x21 => 0xA4 => row Ax + col x4 => ee
c) 0x83 => 100 00011 => pagefault => error, page 4 not valid
d) 0x21 => 001 00001 => ok => 010 00001 => 0x41 => 4a
e) See c) => victim 2 => not modified => load frame 1 => 010 00011 => 0x43 => 8d
f) See c) => victim 5 => writeback => load frame 1 => 101 00011 => 0xA3 => 8d
g) 0x7B => 011 10011 => pagefault => error, frame 6 not on disk
h) 0x21 => 001 00001 => ok => 010 00001 => 0x41 => 4a
9. (1-p)*50ns + p*5ms == 100ns
50ns - p*50ns + p*5ms == 100ns
p*5ms ~= 50ns
p = 5*10 / 5*10^6 = 10^-5 => One in 100000
10.0.1us * (1+degr) == 10us
10/0.1 - 1 = 99 => 9900%
11.100 ns + pf_rate * 10 ms == 110 ns
pf_rate == 10 ns / 10000000 ns == 10^1 / 10^7 == 10^-6
=> one in a million!!!
5
Linköping University
Department of Computer and Information Science (IDA)
Concurrent programming, Operating systems and Real-time operating systems (TDDI04)
12.Four frames left to right, access order from top to bottom.
* pagefault
+ successful page lookup
FIFO: 13
2: * 0 0
6: 2 * 0
1: 2 6 *
6: 2 + 1
4: 2 6 1
5: * 6 1
8: 5 * 1
6: 5 8 *
8: 5 + 6
7: 5 8 6
4: * 8 6
4: + 8 6
5: 4 * 6
2: 4 5 *
4: + 5 2
2: 4 5 +
5: 4 + 2
4: + 5 2
1: 4 5 2
3: * 5 2
page faults
0
0
0
0
*
4
4
4
4
*
7
7
7
7
7
7
7
7
*
1
LRU:
2: *
6: 2
1: 2
6: 2
4: 2
5: *
8: 5
6: 5
8: 5
7: 5
4: *
4: +
5: 4
2: 4
4: +
2: 4
5: 4
4: +
1: 4
3: 4
6
12 page faults
0 0 0
* 0 0
6 * 0
+ 1 0
6 1 *
6 1 4
6 * 4
+ 8 4
6 + 4
6 8 *
6 8 7
6 8 7
* 8 7
5 * 7
5 2 7
5 + 7
+ 2 7
5 2 7
5 2 *
5 * 1
2009-05-18
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