PHGN/CHEN 435 / CHEN/PHGN/MLGN 535
Interdisciplinary Microelectronics Processing Laboratory
Spring 2016
Course Description: In the evolution of microelectronic processing, device densities have
increased exponentially with associated decreases in characteristic dimensions, tolerances,
and considerable increase in complexity. The tools that are presently used for such
processes as photolithography, oxide deposition, and doping are high speed, robotic, and
bear little similarity to their ancestors. At the same time, the basic steps involved in making
integrated circuits are essentially the same. Students in this class will be exposed to these
steps during their laboratory work. The technology and tools, while not state-of-the-art,
have been chosen to allow students hands-on experience with device processing, something
which is not possible with present day technology. Through the laboratory the students will
experience the interrelationship between materials properties, electrical behavior, and
processing conditions. As part of the course, how these same procedures are performed in a
modern fab will also be discussed. At the end of the course students will have a good
understanding of the various process techniques involved in IC fabrication.
Record keeping and communication of information with co-workers are essential to the field.
In this course, students will work in interdisciplinary teams, and communication skills will
be emphasized.
Prerequisites: Consent of instructor.
By the end of this class, students will be able to:
1. Perform the process steps involved in silicon integrated circuit fabrication including:
• RCA clean
• Oxide growth
• Diffusion doping
• Wet and dry etching
• Mask design
• Photolithography
• Metallization
2. Explain how the above processes are done in industry using state of the art techniques.
3. Use basic models to predict the results of processing steps including:
• Oxide thickness
• Sheet resistance and doping profile
• Photolithographic edge profile
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4. Characterize the results of processing steps using:
• Ellipsometry
• Surface profilometry
• I-V characterization
• Sheet resistance measurements
• Capacitance Voltage profiling
5. Develop a complete multistep processing procedure that will allow a simple planar
device or integrated circuit to be fabricated on a silicon wafer.
6. Effectively communicate their procedures and results in oral and written form.
Primary topics covered:
1.
2.
3.
Lab procedures
• Safety
• Chemical Handling/Waste disposal
• Clean room procedures
Process Optimization
• Photolithography
• Oxidation/Insulators
• Doping
• Etching
• Material Deposition/Metallization
• Characterization
Basic Device Fabrication
• MOS capacitor
• Schottky and PN diode
• Solar Cell
• LED
• Transistors
Instructors:
Stephanie Claussen, Ph.D. (sclausse@mines.edu)
Office location: BB 251
Office hours: Monday 10-11:30am, Tuesday 9-10am, Wednesday 3:30-5pm, Friday
11:30am-12:30pm, and by appointment
Teaching Assistant: Abigail Meyer (abmeyer@mymail.mines.edu)
Textbook:
Textbook: Stephen A. Campbell, "Fabrication Engineering at the Micro- and
Nanoscale" third edition, Oxford University Press, 2007. IBSN
9780195320176
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Assignments and assessment:
•
Pre-lab assignments: This course covers a lot of ground very quickly. Completing the
pre-lab assignments before you come to the lab will save you extensive time in the
lab. Late pre-lab assignments will not be accepted without an excused absence. They
will be due on Tuesdays at the start of lecture.
•
Lab notebook: Your lab notebooks will be collected at random during the course and
at the end. If you choose to keep a group lab notebook, that is fine but it must be
done online (Google Docs) and all must contribute to it equally. It must be kept up to
date with your work.
•
Project reports: A group project report will be turned in with each pair of modules
completed (Modules 1 & 2, Modules 3 & 4, Modules 5 & 6). Their due dates are as
follows:
Modules 1 & 2: Feb. 16
Modules 3 & 4: March 8
Modules 5 & 6: March 29
However, early submission is definitely encouraged (you’ll be surprised what you
forget as you move on in the modules!) and these should be considered the last day
to turn them in.
All modules need to be completed by the week of March 8 (8 weeks for 6 modules).
•
Final project: The final project will consist of proposing a fabrication process for a
MOSFET (MOSFET process review – groups); fabricating and testing (and iterating)
the MOSFETs, and then preparing a final written report (individual) and
presentations (group). This part of the course will begin right after Spring Break.
The point distribution for these assignments is:
Attendance and participation
10%
Pre-lab assignments
15%
Lab notebook
5%
Project reports
35%
MOSFET process review
5%
Written final project
20%
Final project presentation
10%
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Grades will be assigned as follows:
A: > 93
A-: 90-93
B+: 87-90
B: 83-87
B-: 80-83
C+: 77-80
C: 73-77
C-: 70-73
D+: 67-70
D: 63-67
D-: 60-63
F: < 60
Attendance policy: Attendance in both the lecture and lab sections of this course is required
and will be a part of your grade, as this course requires teamwork and lab instruction. For
this reason, no unexcused absences will be allowed. If you find you must be gone on a lab
day, obtain permission from the instructor at least a week in advance so a makeup can be
scheduled. If you miss a lab without obtaining advance permission, then you must provide
a campus-approved reason (doctor's statement etc.) for missing the class.
Missing an excessive amount of either one will lead to failing the class.
Cleanliness and safety policy: Working in a cleanroom environment presents special
challenges and safety concerns, which must be respected. Disregard for these concerns or
the guidelines for working in such an environment could lead to a failing grade.
Academic Dishonesty Policy
The consequences of academic dishonesty at the Colorado School of Mines are severe and
can lead to expulsion. It is imperative that each student take responsibility for their
education and adhere to the Academic Dishonesty Policy.
All pre-lab assignments must be done individually, but you are welcome to work on them
with classmates. Project reports will be completed in groups; the written final project must
be completed on your own.
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Spring 2016 – Tentative Lecture Schedule
January 19: First day of class. Safety, course overview.
January 26: Course overview (cont’d). Discussion of fabrication process flows. Introduction
to Modules 1, 2.
February 2: Oxidation.
February 9: Introduction to Modules 3, 4. Photolithography and mask design.
February 16: Photolithography (cont’d).
February 23: Introduction to Modules 5, 6. Etching.
March 1: Etching (cont’d). Doping and characterization.
March 8: Doping and characterization (cont’d). Discussion of MOSFET design reviews.
March 22: MOSFET design reviews.
March 29: Introduction to MOSFETs.
April 5: Doping (cont’d)
April 12: Deposition and growth techniques
April 19: MOSFET behavior - overview
April 26: TBD
May 3: TBD
Final period: Final project presentations, individual projects due
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