Meeting the Design Challenges of Nano-CMOS Electronics e-Science Pilot Project www.nanocmos.ac.uk

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www.nanocmos.ac.uk
Meeting the Design Challenges
of Nano-CMOS Electronics
e-Science Pilot Project
£3.7M EPSRC
£4.5M FEC
£5.7M with IC
11 PDRAs
7 Science
4 e-Sci
9 PhD
Asen Asenov (PI), Richard Sinnott (eSDirector), all partners
www.nanocmos.ac.uk
I have been here before
NASA
Late 90ies
Information
Power
Grid
IPG
Glasgow was
the overseas
node
www.nanocmos.ac.uk
Content

The partners

Motivation

The challenge

The eScience and Grid approach

Current status

The next phase
www.nanocmos.ac.uk
University Partners
Advanced Processor Technologies Group (APTGUM)
Device Modelling Group (DMGUG)
Electronic Systems Design Group (ESDGUS)
Intelligent Systems Group (ISGUY)
National e-Science Centre (NeSCG)
Microsystems Technology Group (MSTGUG)
Mixed-Mode Design Group in IMNS (MMDGUE)
National e-Science Centre (NeSCE)
e-Science NorthWest Centre (eSNW)
www.nanocmos.ac.uk
Industrial Partners
QuickTime™ and a
GIF decompressor
are needed to see this picture.
Global EDS vendor and world TCAD leader
600 licences for grid implementation, model implementation
UK fabless design company and world microprocessor leader
Core IP, simulation tools, staff time
UK fabless design company and world mixed mode leader
Additional PhD studentship for mixed mode design
Global semiconductor player with strong UK presence
Access to technology, device data, processing
Global semiconductor player with strong UK presence
Access to technology, device data, processing
Global semiconductor player with UK presence
CASE studentship, interconnects
Trade association of the microelectronics industry in the UK
Recruiting new industrial partners and dissemination
www.nanocmos.ac.uk
The Challenge
International Tech nology Roadmap for Semiconductors
Year
MPU Half Pitch (nm)
MPU Gate Length (nm)
2005
2010
2015
2020
90
32
45
18
25
10
14
6
2005 edition Toshiba 04
Device diversification
230 nm
90nm: HP, LOP, LSTP
45nm: UTB SOI
Bulk MOSFET
32nm: Double gate
Standard
Single
Set
25 nm
FinFET
UTB SOI
FD SOI
Bulk MOSFET
LSTP
LOP
HP(MPU)
Stat.
Sets
www.nanocmos.ac.uk
The variability is becoming a major
headache
G. Declerck, Keynote talk, VLSI Technol. Symp. 2005
www.nanocmos.ac.uk
Deterministic variability
Strain
variation
Synopsys
Geometry
variation
Strain
OPC
www.nanocmos.ac.uk
Statistical variability
The simulation
Paradigm now
A 22 nm MOSFET
In production 2008
A 4.2 nm MOSFET
In production 2023
www.nanocmos.ac.uk
Statistical variability
1.0
Vout2
(V)
V
out2 [V]
0.8
0.6
0.4
0.2
0.0
0.0
0.2
0.4
0.6
V
[V]
Vout1 (V)
out1
0.8
1.0
www.nanocmos.ac.uk
Performance/Power/Yield (PPY) trade-off
Power
Yield, %
Power
95
Yield, %
75
95
75
35
5
35
5
Performance
Performance
90nm TN
45nm TN
www.nanocmos.ac.uk
Delivering new results
Hierarchical IC Simulation
PROCESS
SIMULATORS
COMPACT
CIRCUIT
MODELS
CHARACTERISTICS
COMPACT
DEVICE
MODELS
DEVICE
SIMULATORS
TCAD
COMPACT
DEVICE
PARAMETERS
PARAMETER
EXTRACTOR
CHARACTERISTICS
CIRCUIT
SUMULATORS
PARAMETER
EXTRACTOR
COMPACT
CIRCUIT
PARAMETERS
Abstraction
CIRCUITS
SYSTEM
SIMULATORS
Data
DEVICES
Simulators
MEASUREMENTS
Simple concept
Integrated Hierarchical
Statistical Design
Complex data and workflows
Data and Compute Intensive
Security Sensitive
www.nanocmos.ac.uk
Objectives






Understanding and forecasting the behaviour, characteristics and
variability of next generation nano-CMOS devices using Grid-enabled
statistical 3D numerical simulations;
Developing compact model and parameter extraction strategies to
capture new device characteristics and variability (based on physical
device simulation and early research devices), creating efficient
databases for circuit design;
Developing hybrid, Grid based device/circuit simulation techniques
applicable to novel nano-CMOS devices with significant variability;
Investigating the impact of new device architectures and device
variability on well established design components, sub-systems and
systems presently designed using conventional MOSFET architectures;
Developing novel design concepts that cope with increased variability,
using specific properties of the new devices;
Learning how electronics researchers can use e-Science technologies
to support their work, improve their productivity and enable them to
undertake research hitherto impossible.
www.nanocmos.ac.uk
The Development Challenge
Electronic design teams currently use different tools,
have different data formats, need access to large
scale compute resources, generate vast amounts of
data, work independently of device engineers.
We are building an integrated Grid infrastructure
which will revolutionise nanoCMOS design by
hiding the complexity of the statistical design
making it a completely integrated collaborative
process.
www.nanocmos.ac.uk
Dealing with the complexity
Hierarchical IC Simulation
Simulators
Data
Abstraction
DEVICE
SIMULATORS
PROCESS
SIMULATORS
TCAD
COMPACT
DEVICE
PARAMETERS
CHARACTERISTICS
MEASUREMENTS
COMPACT
CIRCUIT
MODELS
PARAMETER
EXTRACTOR
COMPACT
DEVICE
MODELS
CHARACTEMEASUREMENTS
RISTICS
CIRCUIT
SUMULATORS
COMPACT
CIRCUIT
MODELS
COMPACT
CIRCUIT
PARAMETERS
ALL
Abstraction
COMPACT
DEVICE
MODELS
CHARACTERISTICS
PARAMETER
EXTRACTOR
Data
CIRCUITS
COMPACT
DEVICE
PARAMETERS
DEVICES
DEVICE
SIMULATORS
SYSTEM
SIMULATORS
PROCESS
SIMULATORS
TCAD
Simulators
DEVICES
Hierarchical IC Simulation
PARAMETER
EXTRACTOR
CHARACTERISTICS
CIRCUIT
SUMULATORS
PARAMETER
EXTRACTOR
COMPACT
CIRCUIT
PARAMETERS
CIRCUITS
Year 2-4
SYSTEM
SIMULATORS
Year 1
DMGUG
NeSCG
NeSCE
eSNW
www.nanocmos.ac.uk
Current Workflow
Manual Extraction
Of Doping Profiles
Synopsis .tif file input
Doping Profiles
www.nanocmos.ac.uk
Current Workflow
Simulation Time
Of between 1K-50K
CPU Hours
+
+
Manually generated
Input file
Doping Profiles
Atomistic Simulation
www.nanocmos.ac.uk
Current Workflow
Simulation Time
Of between 1K-50K
CPU Hours
Shell Scripts
200-1000x
High Drain Bias IV’s
Synopsys Aurora
Atomistic Simulation
100-1000Mb
Data
200-1000x
Low Drain Bias IV’s
www.nanocmos.ac.uk
Uniform Device
Simulation Data
Current Workflow
200-1000
Spice Compact
Models
200-1000 x
Data files
Synopsys Aurora
Aurora Extraction
Strategy
Synopsys Aurora
Aurora Extraction
Strategy
www.nanocmos.ac.uk
Grid stretch focused on realising scientific needs
Workflow Mgt Framework
Data Mgt Framework
Workflow Definition
Domain Knowledge Capture/Pres.
Robust Enactment
Data Access/Linkage/Integration
Dependency Mgt
Data Transformation
Job submission/mgt
Replication/Movement
Computational Steering
Metadata/Provenance
Visualisation Services
Storage/Curation Services
Optimised nanoCMOS Grid Infrastructure
Resource Mgt Framework
Advanced Security Framework
Accounting Components
Trust Federation
Information Services
Identity Management
Resource Broking Service
Security attributes definition
Meta-scheduling Services
Policy Decision/Enforcement Points
Reservation/Allocation Services
Attribute Request/Release Policies
www.nanocmos.ac.uk
Typical existing application
Balsa high-level asynch.
circuit synthesis tool used,
e.g. for timing verification
Grid service development
Meta-data capture/data
annotation
Expressivity of myGrid
Taverna workflow design,
FreeFluo enactment?
myGrid
workflow =>
Control loops for
optimisation,
concurrency needed
Feed requirements into
OMII-UK for language and
enactment engine
enhancements
www.nanocmos.ac.uk
Why Shibboleth…?
 Can solve licensing issues on Grid
 451 group identified this as key area Grid community must address
(…IECnet)
 Fine grained authorisation readily supported by Shibboleth and
associated technologies such as PERMIS
 Is being deployed across UK academia to replace existing Athens
system
 essential to address gap between research and Grid communities
 consider number of active UK e-Science certs vs Athens accounts
Future Grids must be harmonised with wider e-Infrastructure developments
 Using the Grid should be no different than using any other internet based
system from researcher perspective
www.nanocmos.ac.uk
DyVOSE Delegation Issuing Service
Glasgow
Edinburgh
Condor pool
Glasgow SoA using Edinburgh DIS
LDAP
Glasgow
Edinburgh
Edinburgh
Education
nanoCMOS
VO
policies
Glasgow
Education
nanoCMOS
VO policies
policies
Create new ACs for
Glasgow nanoCMOS
users/roles
policies
PERMIS based Authorisation
checks/decisions
Job scheduling/
data management
Grid
BLAST
Glasgow
Service
nanoCMOS
services
Implemented
by Students
LDAP
Grid BLAST
Edinburgh
Data
nanoCMOS
Service
services
data input
Glasgow
Grid-data
nanoCMOS
Client
researchers
Protein/nucleotide sequence data returned based on
student team and Edinburgh policy
Nucleotide
Edinburgh
+ Protein
nanoCMOS
Sequence
dataDB
sets
www.nanocmos.ac.uk
Shibboleth-based access to/usage of Grid Resources
Roles, attributes, licenses,… needed
to make authorisation decision
Distinguished Name
www.nanocmos.ac.uk
Shibboleth Enabled Portal - The New Workflow
Institutional
Login
www.nanocmos.ac.uk
The New Workflow - Unified Simulation
Logged In To Portal
Shibboleth Attributes determine permissions from attributes
www.nanocmos.ac.uk
The New Workflow - Unified Simulation
Stage 1: Create a New Job Ticket
This will be automated in the very near future
www.nanocmos.ac.uk
The New Workflow - Unified Simulation
Stage 2: File Upload
The desired .tif doping profile and atomistic input file are uploaded to the server
www.nanocmos.ac.uk
The New Workflow - Unified Simulation
Stage 3: Atomistic Simulation
Extraction, mesh generation, simulation, and aurora output phases are now combined
www.nanocmos.ac.uk
The New Workflow - Unified Simulation
Stage 4: Aurora Simulation
Input the extraction strategy that you wish to use and run aurora.
www.nanocmos.ac.uk
The New Workflow - Unified Simulation
Stage 5: Your compact models sir
Select the data you require and download it.
www.nanocmos.ac.uk
Other new projects supporting nanoCMOS
 OMII-Security Portlets to developing family of JSR-168 compliant
portlets for:
 scoping of attributes, e.g. only accept Shibboleth attributes and
assertions from nanoCMOS partners
 dynamic portal configuration management, e.g. configure portal
content based on user privileges (security attributes)
 attribute release policies, e.g. only release my nanoCMOS specific
attributes to nanoCMOS partners
 OMII-RAVE
With Cardiff University to integrate Resource Aware Visualisation
Environment into OMII
Visualisation key component and will help computational steering
www.nanocmos.ac.uk
MSTGUG
Cell fragments
Reduce deterministic variability:
develop regular cell fragments
optimise the fragments to reduce
deterministic variability
Characterise the statistical variability
full 3D simulation of statistical
variability in the fragments
timing variability
www.nanocmos.ac.uk
APTGUM
Balsa synthesis
World’s leading public domain async
synthesis tool
developed at UoM
multiple back-end libraries with
differing timing assumptions
Results from eScience:
improved understanding
of economy/reliability
trade-offs on future
technologies
www.nanocmos.ac.uk
ISGUY
Redundancy for fault tolerant design
Different hardware
Configurations can meet
the fitness criteria
www.nanocmos.ac.uk
ESDGUS
Behavioural Analogue Fault Simulation
World-leading research
Behavioural Simulation (VHDL-AMS)
Fault Simulation/Modelling
Results from eScience:
Grid-enabled simulation
technology
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