```Components
p
of a Computer
p
Datorarkitektur och operativsystem
p
y
Lecture 2
1
I t
Instruction
ti Set
S t
 The repertoire of instructions of a computer
 Different computers have different instruction
sets
 But
B t with
ith many aspects
t in
i common
 Early computers had very simple instruction
sets
 Simplified implementation
3
Chapter 2 — Instructions: Language of the Computer — 4
§2.1 Inttroductio
on
Hierarchical Layers of Program Code
Th MIPS Instruction
The
I t
ti S
Sett
I t
Instruction
ti Set
S t
 Used as the example throughout the book
 Stanford
S f d MIPS commercialized
i li d by
b MIPS Technologies
T h l i
(www.mips.com)
 Stored-program concept
 The idea that instructions and data of many types
can be stored in memoryy as numbers, leadingg to
stored-program computer
 Founded in 1984 by …?
 Large share of embedded core market
 Applications in consumer electronics, network/storage
 Let us look into MIPS instruction set one byy
one to understand this
equipment cameras,
equipment,
cameras printers,
printers …
 Typical of many modern ISAs
Chapter 2 — Instructions: Language of the Computer — 5
 Two sources and one destination
# a gets b + c
A ith
Arithmetic
ti Operations
O
ti
 Operand is a quantity on which an operation
is performed
 How many operands in this instruction?
 All arithmetic operations have this form
Chapter 2 — Instructions: Language of the Computer — 7
Chapter 2 — Instructions: Language of the Computer — 8
§2.2 Op
perationss of the C
Computeer Hardw
ware
 Add and subtract, three operands
§2.2 Op
perationss of the C
Computeer Hardw
ware
A ith
Arithmetic
ti Operations
O
ti
6
 What if we want to add b,c,d, and e and put the
result into a ?
 All arithmetic operations have this form
 Design Principle 1: Simplicity favors regularity
 Regularity makes hardware implementation
simpler
Chapter 2 — Instructions: Language of the Computer —
10
Chapter 2 — Instructions: Language of the Computer — 9
A ith
Arithmetic
ti Example
E
l
 C code:
A ith
Arithmetic
ti Example
E
l
 C code:
f = (g + h) - (i + j);
 Compiled MIPS code:
D i Principle
Design
P i ipl 1
?
f = (g + h) - (i + j);
 Compiled MIPS code:
dd t0,
0 g, h
sub f, t0, t1
Chapter 2 — Instructions: Language of the Computer —
11
Chapter 2 — Instructions: Language of the Computer —
12
# temp t0
0 = g + h
# temp t1 = i + j
# f = t0 - t1
§2.2 Op
perationss of the C
Computeer Hardw
ware
 All arithmetic operations have this form
§2.2 Op
perationss of the C
Computeer Hardw
ware
A ith
Arithmetic
ti Operations
O
ti
 Registers
g
are pprimitives of hardware design
g and are
visible to programmers
Chapter 2 — Instructions: Language of the Computer —
13
R i t O
Register
Operand
d Example
E
l
 Compiler’s job to associate variables of a highlevel program with registers
 C code:
f = (g + h) - (i + j);
 f, …, j in \$s0, …, \$s4
R i t Operands
Register
O
d
 Assembler names
 \$t0, \$t1, …, \$t9 for temporary values
 \$s0,
\$s0 \$s1,
\$s1 …, \$s7 for saved variables
Chapter 2 — Instructions: Language of the Computer —
14
R i t O
Register
Operand
d Example
E
l
 Compiled MIPS code:
\$t0, \$s1,
\$s1 \$s2
sub \$s0,
\$s0 \$t0,
\$t0 \$t1
 Compiled MIPS code ?
Chapter 2 — Instructions: Language of the Computer —
15
Chapter 2 — Instructions: Language of the Computer —
16
§2.3 Op
perands o
of the Co
omputer Hardware
 The operands of arithmetic instructions must be
from special location in hardware called registers
§2.3 Op
perands o
of the Co
omputer Hardware
R i t Operands
Register
O
d
 Numbered 0 to 31
 32-bit data called a “word”
 Word is the natural unit of access, typically
yp
y 32 bits,
corresponds to the size of a register in MIPS
D i Principle
Design
P i ipl 2
 Smaller is faster
 Larger registers will increase clock cycle time --- electronic
signals takes longer when they travel farther
 Design principles are not hard truths but general guidelines
 31 registers instead of 32 need not make MIPS faster
 There may be only 3 operands and they must be
chosen from one of the 32 registers
registers. Why only 32 ?
Chapter 2 — Instructions: Language of the Computer —
17
Chapter 2 — Instructions: Language of the Computer —
18
M
Memory
Operands
O
d
 Programming languages, C, Java, …
 Allow complex data structures like arrays and structures
 They
Th often
f
contain many more data
d elements
l
than
h the
h number
b
of registers in a computer
 Where are they
y stored ?
• Memory
 But, arithmetic operations are applied on register
operands
 Hence, data transfer instructions are required to transfer
data from memory to registers
 Load values from memory into registers
 Store result from register to memory
Chapter 2 — Instructions: Language of the Computer —
19
 Memory is like an array
 Data
D t transfer
t
f iinstructions
t ti
mustt supply
l the
dd
(index/offset) of the memory (array)
20
§2.3 Op
perands o
of the Co
omputer Hardware
 MIPS has a 32 × 32-bit register file
§2.3 Op
perands o
of the Co
omputer Hardware
R i t Operands
Register
O
d
M
Memory
Operands
O
d
 Each address identifies an 8-bit byte
y
 Words are aligned in memory
 Each word is 32 bits or 4 bytes
y
 To locate words, addresses are in multiples of 4
 A is an array of words
 What is the offset to locate A[8] ?
 A[0] – 0
 A[1] – 4
 A[2]– 8
 …
Chapter 2 — Instructions: Language of the Computer —
21
M
Memory
Operands
O
d
 Why is memory not word-addressable?
 A[8] – 32
M
Memory
Operands
O
d
 Why is memory not word-addressable?
 Bytes are useful in many programs. In a word addressable system, it is
necessary first to compute the address of the word containing the byte,
fetch that word
word, and then extract the byte from the two
two-byte
byte word.
word
Although the processes for byte extraction are well understood, they are
less efficient than directly accessing the byte. For this reason, many
Chapter 2 — Instructions: Language of the Computer —
23
Chapter 2 — Instructions: Language of the Computer —
24
22
M
Memory
Operands
O
d
M
Memory
Operand
O
d Example
E
l 1
 C code:
 lw refers to load word
g = h + A[8];
 g in \$s1
 h in \$s2
 base address of A in \$s3
 A is an array of 100 words
 lw \$t0 , 8 (\$s3)
 Compiled MIPS code ?
offset
base register
25
M
Memory
Operand
O
d Example
E
l 1
 C code:
 Compiled MIPS code:
lw \$t0
\$t0, 32(\$s3)
Chapter 2 — Instructions: Language of the Computer —
27
M
Memory
Operand
O
d Example
E
l 2
 C code:
g = h + A[8];
[ ]
 g in \$s1, h in \$s2, base address of A in \$s3
offset
Chapter 2 — Instructions: Language of the Computer —
26
A[12]
[ ] = h + A[8];
[ ]
 h in \$s2, base address of A in \$s3
 Compiled MIPS code:
base register
Chapter 2 — Instructions: Language of the Computer —
28
M
Memory
Operand
O
d Example
E
l 2
 C code:
A[12]
[ ] = h + A[8];
[ ]
 h in \$s2, base address of A in \$s3
 Compiled MIPS code:
 Index 8 requires offset of 32
lw \$t0
\$t0, 32(\$s3)
sw \$t0,
\$t0 48(\$s3)
48(\$ 3)
# store
t
word
d
Chapter 2 — Instructions: Language of the Computer —
29
R i t
Registers
vs. Memory
M
 Registers are faster to access than memory
 Operating
O
i on memory d
data requires
i
l d and
d
stores
 More instructions to be executed
 Compiler must use registers for variables as
much as possible
 Only spill to memory for less frequently used
variables
 Register optimization is important!
Chapter 2 — Instructions: Language of the Computer —
30
I
Immediate
di t Operands
O
d
 Constant data specified in an instruction
ddi \$s3,
\$
\$s3,
\$
4
 No subtract immediate instruction
D i Principle3
Design
P i ipl 3
 Make the common case fast
 Small constants are common
 Immediate operand avoids a load instruction
 Just use a negative constant
Chapter 2 — Instructions: Language of the Computer —
31
Chapter 2 — Instructions: Language of the Computer —
32
Th Constant
The
C
t tZ
Zero
 MIPS register 0 (\$zero) is the constant 0
 Stored-program concept
 Cannot be overwritten
 The idea that instructions and data of many types
can be stored in memoryy as numbers, leadingg to
stored-program computer
 Useful for common operations
 E.g., move between registers
Chapter 2 — Instructions: Language of the Computer —
33
 Instructions are encoded in binary
 Called machine code
 MIPS instructions
 Encoded
E d d as 32-bit
32 bi iinstruction
i words
d
 Small number of formats encoding operation code
((opcode),
d ) register
i t numbers,
b
…
 Regularity!
 Register numbers
 \$t0 – \$t7 are reg’s 8 – 15
 \$s0 – \$s7 are reg’s 16 – 23
Chapter 2 — Instructions: Language of the Computer —
35
§2.5 Reepresentiing Instru
uctions in
n the Computer
R
Representing
ti Instructions
I t
ti
34
E
Example
l
special
\$s1
\$s2
\$t0
0
0
17
18
8
0
32
000000
10001
10010
01000
00000
100000
000000100011001001000000001000002
op
rs
rt
rd
shamt
funct
6 bits
5 bits
5 bits
5 bits
5 bits
6 bits
Chapter 2 — Instructions: Language of the Computer —
36
R
Representing
ti Instructions
I t
ti
I t
Instruction
ti types
t
 The layout or the form of representation of
instruction is composed of fields of binary numbers
 R format (for register)
 The numeric version of instructions is called machine
language and a sequence of such instructions is called
machine
h code
d
 I-format (for immediate)
 Immediate
 Data transfer
37
MIPS R-format
Rf
t Instructions
I t
ti
38
MIPS I-format
If
t Instructions
I t
ti
op
rs
rt
rd
shamt
funct
op
rs
rt
6 bits
5 bits
5 bits
5 bits
5 bits
6 bits
6 bits
5 bits
5 bits
16 bits
 Instruction fields
 op: operation
ti code
d (opcode)
(
d )
 rs: first source register
g
number
 rt: second source register number
 Immediate arithmetic and load/store instructions
 rt: destination or source register number
 Constant: –215 to +215 – 1
 rd:
d destination
d i i register
i
number
b
 shamt: shift amount ((00000 for now))
 funct: function code (extends opcode)
Chapter 2 — Instructions: Language of the Computer —
39
Chapter 2 — Instructions: Language of the Computer —
40
D i Principle
Design
P i i l 4
H
d i l
 Keep all instructions of the same format and length
 But it makes difficult to address large memories
 Compromise and allow different formats
 Reading binary numbers are tedious
 So, hexadecimal representation is popular
 Base 16 is power of two and hence it is easy
to replace each group of 4 binary digits
 Good design demands good compromises
 Different formats complicate decoding,
decoding but allow 32-bit
32 bit
instructions uniformly
 Keep formats as similar as possible
 See example in page 98
41
 Base 16
H
d i l
42
St
Stored
dP
Program Computers
C
t
 Instructions represented
p
in
binary, just like data
 Instructions and data stored in
memory
 Programs can operate on
programs
 Compact representation of bit strings
 4 bits
bit per hex
h di
digit
it
0
1
2
0000
0001
0010
4
5
6
0100
0101
0110
8
9
a
1000
1001
1010
c
d
e
1100
1101
1110
3
0011
00
7
0111
0
b
1011
0
f
1111
Example: eca8 6420 ?
p
 Example: 0001 0011 0101 0111 1001 1011 1101 1111
 e.g., compilers,
il
k
…
 Binary compatibility allows
compiled programs to work on
different computers

 Standardized ISAs
Chapter 2 — Instructions: Language of the Computer —
44
CISC A
Approach
h
CISC vs RISC
 Complex Instruction Set Computer
 C code:
d
 C code:
g = h + A[8];
[ ]
g = h + A[8];
[ ];
 CISC
 CISC
dd a,32<b>
32<b>
 Compiled MIPS code:
 Achieved byy buildingg complex
p hardware that
loads value from memory into a register and
then adds it to register a and stores the
results in register a
lw \$t0
\$t0, 32(\$s3)
45
CISC vs RISC
Chapter 2 — Instructions: Language of the Computer —
46
t
 Compiler has to do little
CPU Time  Instruction Count  CPI  Clock Cycle Time
 Programming
P
i was done
d
in
i assembly
bl language
l
 To make it easy, more and more complex
 Length of the code is short and hence, little
memory is required to store the code
 Memory
M
was a very costly
l real-estate
l
 E.g.,
g , Intel x86 machines ppoweringg several
million desktops
47
48
t
R dbl k
 Each instruction needs only one clock cycle
 Hardware is less complex
 RISC processors, despite their advantages,
tookk severall years to gain
i market
k
 Intel had a head start of 2 years before its RISC
competitors
 Customers
C t
were unwilling
illi tto ttake
k risk
i k with
ith new
technology and change software products
 They have a large market and hence, they can
afford resources to overcome complexity
49
 Powerful instruction  higher performance
 Fewer
F
iinstructions
t ti
required
i d
 But complex instructions are hard to implement
• May slow down all instructions, including simple ones
§2.18 Fallacies aand Pitfaalls
F ll i
Fallacies
50
F ll i
Fallacies
 Backward compatibility  instruction set
doesn’t change
 But they do accrete more instructions
 Compilers are good at making fast code from simple
instructions
 Use assemblyy code for high
g performance
p
x86 instruction set
 But modern compilers are better at dealing with modern
processors
 More lines of code  more errors and less productivity
Chapter 2 — Instructions: Language of the Computer —
51
Chapter 2 — Instructions: Language of the Computer —
52
Pitf ll
Pitfalls
CISC vs RISC
 Sequential words are not at sequential
dd
 Very good slides on the topic
 https://www.cs.drexel.edu/~wmm24/cs281/lecture
s/pdf/RISCvsCISC.pdf
p
p
 Increment by 4, not by 1!
Chapter 2 — Instructions: Language of the Computer —
53
54
Ad i i t ti Details
D t il
 Patterson’s blog:
 1.1, 1.2, 1.3, and 1.4
 http://blogs.arm.com/software-enablement/375-
 Note the correction – 1.4 was not listed in
risc-versus-cisc-wars-in-the-prepc-and-pc-erasp p
p
part-1/
part of covered material
lecture 1 but it is p
 Interview with Hennessy
 2.1,
2 1 2.2,
2 2 2.3
2 3 , 2.5,
2 5 2.18,
2 18 2.19
2 19
 http://www-csp
aculty.stanford.edu/~eroberts/courses/soco/projec
 An experiment
p
 unmesh_bordoloi
55
56
56
 Design principles
1.Simplicity
1
Si li it ffavors regularity
l it
2.Smaller is faster
3.Make the common case fast
4 Good design demands good compromises
4.Good
 Layers of software/hardware
 Compiler, assembler, hardware
 MIPS: typical of RISC ISAs
 c.f. x86
Chapter 2 — Instructions: Language of the Computer —
57
§2.19 C
Concludin
ng Remarks
C
Concluding
l di Remarks
R
k
```