a
Complete 12-Bit 10 MSPS
Monolithic A/D Converter
AD872A
SMD/883B
Scope
This specification covers the detail requirements for a complete monolithic 12-bit, 10 MSPS A/D converter with an on-chip, high performance track-and-hold amplifier (THA) and voltage reference. The
electrical specifications match the Standard Microcircuit Drawing (SMD) 5962-93060 in effect at the
release of this data sheet. For a copy of the latest official SMD, contact DESC-ELDS.
Part Number/Case Outline
For case outline dimensions, see Package Information Appendix of General Specification ADI-M-1000.
The complete part numbers of these SMD and 883 devices are as follows:
Device
Type
SMD
Part Number
ADI 883B
Part Number
Package
Description
01
02
5962-9306001MXA
5962-9306002MYA
AD872ASD/883B 28-Pin Side Brazed DIP
AD872ASE/883B 44-Terminal LCC
Package Designation
ADI MIL-STD-1835
D-28 CDIP2-T28
E-44A CQCCI-N44
Absolute Maximum Ratings (TA = +25°C unless otherwise noted)1
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to +6.5 V
AVSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −6.5 V to +0.5 V
DVDD, DRVDD2 to DGND, DRGND2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to +6.5 V
DRVDD to DVDD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −6.5 V to +6.5 V
DRGND to DGND2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to +0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1 V to +1 V
AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −6.5 V to +6.5 V
Clock Input, OEN2 to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to DVDD + 0.5 V
Digital Outputs to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to DVDD + 0.3 V
REF IN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AVSS to AVDD
VINA, to VINB, REF IN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −6.5 V to +6.5 V
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
Recommended Operating Conditions2
Operating Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Thermal Characteristics
Thermal Resistance, Junction-to-Case (θJC) for D-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28°C/W
Thermal Resistance, Junction-to-Ambient (θ J A ) for D-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C / W
Thermal Resistance, Junction-to-Case (θJC) for E-44A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20°C/W
Thermal Resistance, Junction-to-Ambient (θ J A ) for E-44A . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C / W
NOTES
1
Permanent damage may occur if any absolute maximum rating is exceeded. Functional operation is not implied and device
reliability may be impaired by exposure to higher-than-recommended voltages for extended periods of time.
2
Device Type 02 only.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for
its use, nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
AD872A–SPECIFICATIONS
Table 1. Electrical Performance Characteristics
Test
Symbol
Resolution
Differential Nonlinearity
Conditions
AVDD = +5 V, AVSS = –5 V,
DVDD = +5 V, DRVDD = +5 V Group A
unless otherwise specified
Subgroups
RES
1
DNL
All Codes Histogram
Device
Type
Limits
Min
Max
Units
1, 2, 3
01, 02
12
Bits
1, 2, 3
01, 02
12
Bits
Zero Error
BPOE
1
01, 02
0.75
± % FSR
Gain Error
AE
1
01, 02
1.25
± % FSR
Zero Error Drift
TCBPOE
External 2.5 V Reference
2, 3
01, 02
0.30
± % FSR
Gain Error Drift
TCAINT
Internal 2.5 V Reference
2, 3
01, 02
1.75
± % FSR
Gain Error Drift
TCAEXT
External 2.5 V Reference
2, 3
01, 02
0.5
± % FSR
Power Supply Rejection
PSR
See Note 2
1, 2, 3
01, 02
0.125
± % FSR
Analog Input Range
VIN
1, 2, 3
01, 02
1
±V
Input Resistance
RIN
TA = +25°C
01, 02
50 typ
kΩ
Input Capacitance
CIN
TA = +25°C
01, 02
10 typ
pF
Internal Reference Output Voltage
VREF
1, 2, 3
01, 02
2.46
Power Dissipation
PD
1, 2, 3
Power Supply Current
IAVDD
1, 2, 3
2.54
V
01, 02
1.3
W
01, 02
92
mA
150
IAVSS
IDVDD
IDRVDD
21
2
02
Signal-to-Noise and Distortion Ratio
S/(N + D)
fIN = 1 MHz; fS = 10 MHz
1, 2, 3
01
02
61
60
dB
Total Harmonic Distortion
THD
fIN = 1 MHz; fS = 10 MHz
1, 2, 3
01
02
Logic Input High Voltage
VIH
1, 2, 3
01, 02
Logic Input Low Voltage
VIL
1, 2, 3
01, 02
0.8
V
Logic Input High Current (CLK)
IIH
1, 2, 3
01
115
±µA
Logic Input Low Current (CLK)
IIL
1, 2, 3
01
115
±µA
Logic Input High Current
(OEN, CLK)
IIH
1, 2, 3
02
115
±µA
Logic Input Low Current
(OEN, CLK)
IIL
1, 2, 3
02
115
±µA
Logic Output High Voltage
(MSB—Bit 12, OTR)
VOH
ISOURCE = 500 µA
1, 2, 3
01, 02
Logic Output Low Voltage
(MSB—Bit 12, OTR)
VOL
ISINK = 1.6 mA
1, 2, 3
01, 02
0.4
V
Leakage
IZ
Three State
1, 2, 3
02
10
±µA
Clock Period
tC
See Figure 1.
9, 10, 11
01, 02
100
ns
Output Delay
tOD
See Figure 1.
9, 10, 11
01, 02
10
ns
–62
–60
2.0
dB
V
2.4
V
NOTES
1
Minimum resolution for which “No Missing Codes” is guaranteed.
2
Test conditions for PSR: 4.75 V ≤ AVDD ≤ 5.25 V, –5.25 V ≤ AVSS ≤ –4.75 V, 4.75 V ≤ DVDD ≤ 5.25 V.
–2–
REV. B
SMD/883B
AD872A
Functional Block Diagram and Terminal Assignment
DVDD DGND *DRVDD *DRGND
AVDD AGND AVSS
VINA
VINB
AD872A
T/H
T/H
A/D
DAC
T/H
A/D
4
DAC
A/D
A/D
4
CLOCK
DAC
3
4
CORRECTION LOGIC
REF IN
+2.5V
REFERENCE
REF OUT
OUTPUT BUFFERS
12
REF GND
*OUTPUT OTR
*MSB
MSB-BIT 12 (LSB)
ENABLE
*ONLY AVAILABLE ON 44-PIN SURFACE MOUNT PACKAGE
26
REF OUT
AVDD
4
25
AVSS
AGND
5
24
AGND
DGND
6
23
DGND
DVDD
7
(LSB) BIT 12
8
BIT 11
5
3
2
1
4
NC
AGND
DGND
DRGND
TOP VIEW 22 DVDD
(Not to Scale) 21 CLK
9
20
OTR
19
BIT 1 (MSB)
BIT 9 11
18
BIT 2
BIT 8 12
17
BIT 3
39
NC
38
AVDD
NC
36 AGND
35 NC
9
37
10
11
AD872A
DRVDD 12
OEN 13
NC 14
BIT 10 10
44 43 42 41 40
PIN 1
IDENTIFIER
8
DRGND
DVDD
32 DRVDD
34
TOP VIEW
(Not to Scale)
33
NC 15
(MSB) BIT 12 16
BIT 11 17
30
CLK
QTR
29
MSB
31
NC = NO CONNECT
NC
BIT 5
BIT 2
( MSB) BIT 1
15
NC = NO CONNECT
BIT 3
BIT 6 14
BIT 5
BIT 4
BIT 4
BIT 7
16
BIT 6
BIT 7 13
BIT 10
18 19 20 21 22 23 24 25 26 27 28
BIT 9
BIT 8
AD872A
6
NC 7
AVSS
3
REF OUT
REF GND
AVSS
REF IN
REF GND
REF IN
27
VINA
NC
28
2
VINB
1
VINB
NC
VINA
AVSS
NC
E-44A Package
AVDD
D-28 Package
SWITCHING SPECIFICATIONS
N
(TMIN to TMAX with AVDD = +5 V, DV DD = +5 V, DRVDD =
N+1
VIN
+5 V, AVSS = –5 V; VIL = 0.8 V, V IH = 2.0 V. These characteristics
are included for design guidance only and are not tested or guaranteed.)
tC
CLOCK
t CL
BIT 2–12
MSB, OTR
Parameter
t OD
t CH
DATA
IN
DATA
N+1
Figure 1. Timing Diagram
REV. B
Symbol Limits
CLOCK Pulse Width High tCH
CLOCK Pulse Width Low tCL
Clock Duty Cycle
Pipeline Delay (Latency)
–3–
45
45
40
60
3
Units
ns min
ns min
% min (50% typ)
% max
Clock Cycles
AD872A
Microcircuit Technology Group
This microcircuit is covered by technology group (93).
Life Test /Burn-In Circuit
C1945a–0–11/97
Steady state life test is per MIL-STD-883 Method 1005. Burn-in is per MIL-STD-883 Method 1015 test
condition (B).
+5V
AD872A
9kV
7V rms
60Hz
0.1mF
1kV
MR-280
47mF
VINA
REF IN 28
2
VINB
REF GND 27
3
AVSS
REF OUT 26
4
47mF
10mF
AVDD
AVSS 25
AGND
AGND 24
6
DGND
DGND 23
7
DVDD
DVDD 22
NC 8 BIT 12 (LSB)
CLK 21
NC 9 BIT 11
OTR 20 NC
NC 10 BIT 10
(MSB) BIT 1 19 NC
0-5V
1kHz
NC 11 BIT 9
BIT 2 18 NC
NC 12 BIT 8
BIT 3 17 NC
NC 13 BIT 7
BIT 4 16 NC
NC 14 BIT 6
BIT 5 15 NC
9kV
7V rms
60Hz
MR-280
5
–5V
0.1mF
1
10mF
1kV
+5V
NC NC
VINA
0.1mF
MR-280
44 43 42 41 40
NC
9 AGND
10 DGND
AVSS
1
REF OUT
2
REF GND
3
NC
4
NC
NC 39 NC
AVDD 38
NC 37 NC
AGND 36
11 DRGND
12 DRVDD
NC 35 NC
DRGND 34
DVDD 33
AD872A
NC 13 OEN
NC 14 NC
NC 15 NC
NC 16 BIT 12 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 10
BIT 9
NC 17 BIT 11
BIT 1 ( MSB)
DRVDD 32
0-5V
1kHz
CLK 31
QTR 30 NC
MSB 29 NC
NC
NC
5
VINB
NC 7
NC 8
NC
6
NC
MR-280
AVSS
0.1mF
AVDD
47mF
47mF
REF IN
–5V
18 19 20 21 22 23 24 25 26 27 28
NC NC NC NC NC NC NC NC NC NC NC
NC = NO CONNECT
OUTLINE DIMENSIONS
D-28
E-44A
28-Lead Side Brazed DIP
44-Terminal Ceramic Leadless Chip Carrier
0.005 (0.13) MIN
0.100 (2.54) MAX
28
0.100 (2.54)
0.064 (1.63)
15
0.055 (1.40)
0.045 (1.14)
40
0.610 (15.49)
0.500 (12.70)
1
39
14
PIN 1
0.060 (1.52)
0.015 (0.38)
1.490 (37.85) MAX
0.225 (5.72)
MAX
0.200 (5.08)
0.125 (3.18)
0.026 (0.66)
0.014 (0.36)
0.110 (2.79)
0.090 (2.29)
0.070 (1.78)
0.030 (0.76)
0.150
(3.81)
MIN
SEATING
PLANE
0.620 (15.75)
0.590 (14.99)
0.050
(1.27)
BSC
0.075 (1.91) REF
6
44
1
0.028 (0.71)
0.022 (0.56)
27
26
43
0.662 (16.82)
SQ
0.640 (16.27)
0.020 (0.51)
REF x 45°
7
BOTTOM
VIEW
0.018 (0.46)
0.008 (0.20)
–4–
PRINTED IN U.S.A.
Dimensions shown in inches and (mm).
0.040 (1.02)
REF x 45°
3 PLACES
REV. B