Coupled Inductor based Single-Stage Boost Three- Phase Inverter

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International Journal of Engineering Trends and Technology (IJETT) – Volume 22 Number 9-April 2015
Coupled Inductor based Single-Stage Boost ThreePhase Inverter
C.T.Manikandan #1, K.P.Nithya #2, M.Padmarasan#3
#
Assistant Professor, Panimalar Institute of Technology, India
Abstract— Inverter systems that feed electrical power from
photovoltaic system into the grid must convert the direct current
of the fuel cell into the alternating current of the grid. The Dc
voltage, which is provided from a sustainable energy source or
energy storage device, must be boosted and converted to an Ac
voltage with a fixed amplitude and frequency. The Coupled
Inductor based Single-Stage Boost Three-Phase Inverter circuit
provides boost inversion ability which can eliminate the
limitations of conventional voltage source inverter. By regulating
the shoot-through zero state and the parameters of coupled
inductor, the proposed inverter can boost the bus voltage and
desired output voltage even when input Dc voltage is low. The
single-stage operation of the converter may lead to improved
reliability and higher efficiency. Theoretical analysis, simulation,
and experimental results are presented to verify good
performance.
I.
INTRODUCTION
High-performance voltage-source inverters [1] are widely used
in various applications such as uninterruptible power supplies,
distributed power systems, ac motor drives, and hybrid electric
vehicles. However, the traditional voltage-source inverter has
major problems: 1) it cannot have an ac output voltage higher
than the dc source voltage and can only provide buck dc-ac
power conversion; 2) shoot through, generated leg, is forbidden.
For applications where a low input by both power switches in a
voltage is inverted to a high ac output voltage, an additional dc-dc
boost converter is needed to obtain a desired ac output. The
additional power converter performs two-stage power conversion
with high cost and low efficiency. Unlike traditional voltagesource inverters [1], Z-source inverters were proposed in [2] in
order to accomplish single-stage power conversion with buckboost abilities. In the Z-source inverter, both of the power
switches in a leg can be turned on at the same time and thereby
eliminate the dead time. This significantly improves the
reliability and reduces the output waveform distortion. Various Zsource inverter topologies have been reported in many different
studies. Work on Z-source inverters has focused on pulse-width
modulation (PWM) strategies [3], [4], applications [5], [6],
modeling and control [7], [8], direct ac-ac converters [9], [10],
and other Z-network topologies [11]-[13]. A class of quasi-Zsource inverters was proposed in [11], [12] that were designed to
overcome the shortcomings of the classic Z-source inverter.
Quasi-Z-source inverters have advantages, such as a reduction in
the passive component ratings and an improvement in the input
profiles.
Some papers have recently focused on improving the boost
factor of the Z-source inverter by using a very high modulation
ISSN: 2231-5381
index in order to achieve an improvement in the output waveform.
For instance, studies add inductors, capacitors, and diodes to the
Z-impendence network in order to produce a high dc link voltage
for the main power circuit from a very low input dc voltage. In
two inductors in the impedance Z-network are replaced by a
transformer with a turn ratio of 2:1 in order to obtain a high
voltage gain. These topologies suit solar cell and fuel cell
applications, since they require a high voltage gain in order to
match the source voltage to the line voltage. Applying coupled
inductor structures to the dc-dc conversion process provides a
high boost in cascade and transformer less structures with a high
efficiency and high power density. The coupled inductor provides
a strong step-up inversion that overcomes the boost limitations of
the Z-source inverter (ZSI) [2].
The embedded Z-source inverter developed in is built by
inserting dc sources into the X-shaped impedance network.
Because the dc sources connect directly to the impedance
network inductors, the dc input current in the embedded Z-source
inverter flows smoothly, compared to that found in a traditional
Z-source inverter [2]. The embedded Z-source inverter assumes
the two sources can produce the same voltage gain as found in a
traditional Z-source inverter. The embedded Z-source inverter
provides a continuous input current without adding an input
passive filter and also a lower voltage on the capacitors. But
leakage current will be present when photovoltaic is connected to
grid through embedded Z-source inverter
The proposed paper can reduce the system leakage current in a
great deal and can meet the VDE0126-1-1 standard. To maintain
the advantages of the impedance network, only a diode is added
in the front of the original topology, to block the leakage current
loop during the active vectors and open-zero vectors. On the
other hand, the near state pulse width modulation (NSPWM)
technique is applied with one-leg shoot-through zero vectors in
order to reduce the leakage current through the conduction path in
the duration of changing from and to open-zero vectors.
Simultaneously, the leakage current caused by other transitions
can also be reduced due to the fact that the magnitude of
common-mode voltages is reduced.
II.
TRADITIONAL Z-SOURCE INVERTER
TOPOLOGIES
Fig. 1(a) shows the original ZSI topology [13] in which the
two-port impedance network couples the main inverter circuit to
the dc voltage source. It consists of two inductors (L1 and L2) and
two capacitors (C1 and C2) connected in an X configuration. An
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International Journal of Engineering Trends and Technology (IJETT) – Volume 22 Number 9-April 2015
additional shoot-through zero state is added to the switching
states in order to boost the voltage. When the input voltage is
large enough to produce the desired ac voltage, the shoot-through
zero state is not used and the Z-source inverter operates as a buck
inverter—just like a conventional voltage-source inverter. In the
original ZSI, the current drawn from the source is discontinuous.
This is a limitation in some applications, and a decoupling
capacitor bank at the front end is sometimes used to avoid the
current discontinuity and protect the energy source.
I in
Ish
L1
Din
C1 C2
VPN
Space
vector
V odd
Veven
VPN
Vshoot
I in Vdc/2
L2
TABLE I
COMMON-MODE VOLTAGES vCM , VOLTAGES vNn AND
SPACE VECTORS (a) FOR CL-SSBI-D (b) FOR CL-SSBI
(a)
V0
V7
I
C1 in
C2
V
c1
V
c1
Din
Vc 2
Vc 2
Vdc
Vdc/2 Ish
L1
Fig.2. The Coupled Inductor based Single-Stage Boost Three-Phase Inverter.
The embedded Z-source inverter developed in [14] is designed
to insert dc sources into the X-shaped impedance network. Fig.
1(b) shows a continuous input current embedded Z-source
inverter with two isolated dc sources. Because the dc sources are
directly connected to the impedance network inductors, the dc
input current in the embedded Z-source inverter flows smoothly
compared to the classic Z-source inverter [13]. The embedded Zsource inverter assumes that the two sources can produce the
same voltage gain as the traditional Z-source inverter. The ratio
between the dc-link voltage across the inverter bridge, VPN, and
the input dc voltage Vdc, called the boost factor in the classical
ZSI and embedded ZSI, is expressed by:
VPN
1
1
Bz
.
Vdc 1 2T0 / T 1 2 D
where T0 is the interval of the shoot-through state during
switching period T and D = T0/T is the duty cycle of each cycle.
1 D
.
1 3D
The Boost gain of the proposed paper is
B =
III COUPLED INDUCTOR BASED SINGLE-STAGE
BOOST THREE-PHASE INVERTER
The CL-SSBI is shown in Fig. 2. A diode is added in the front of
the topology, to block the leakage current loop during the active
vectors and open-zero vectors, of which the CMV
as
VCM
=
DIFFERENT
VNn
VPn
B VPN/3
BVPN
-BVPN/3
BVPN
(1-B/3)VPN
0
BVPN
0
BVPN
VPN
0
VPN
-
0
VPN
VPN
(b)
(b)
(a)
Fig.
1. (a) Original Z-source inverter and (b) embedded Z-source inverter with a
continuous input current.
1 T0 / T
1 3T0 / T
IN
V CM
L2
Bs
vPn
v
CM
is defined
Space
V CM
vector
V odd B VPN/3
Veven 2BVPN/3
V0
0
V7
BVPN
Vshoot
0
VNn
VPn
-BVPN/3
-2BVPN/3
0
-BVPN
0
(1-B/3)VPN
(1-2B/3)VPN
VPN
(1-B)VPN
VPN
The voltage between positive P or negative N solar panel and
grounded neutral n can be expressed as
VNn =
=-VCM
VPn=VPN+VNn=VPN-VCM
Because shoot-through of the inverter bridge becomes a
normal operation state, the possible switching states include six
active vectors (V1–V6 ), two open-zero vectors (V0 ,V7 ), and
seven shoot-through zero vectors including one leg shoot through
(Vashoot ,Vbshoot ,Vcshoot), two-legs shoot through
(Vabshoot ,Vacshoot ,Vbcshoot) and three-legs shoot
through( Vabcshoot). For all the odd active vectors (V1 ,V3 ,V5 ),
all the even active vectors (V2 ,V4 ,V6 ), all the open-zero
vectors (V0 ,V7 ), and all the shoot-through zero vectors, the
common mode voltages (vCM) and voltages (vP n, vNn) of CLSSBI andCL-SSBI with an additional diode (CL-SSBI-D) can be
derived from (2) and (3), as shown in Table I.
For convenience, supposing the turns ratio N of the coupled
inductor is 2.5, shoot-through zero duty cycle D0 is 0.17, and
then boost factor B is 3, according to the bus voltage expression
of Vb = BvPN [15], and using the maximum constant boost
(MCB) control method realized by space vector-based PWM
control [16], the switching pattern and CMV of CL-SSBI and
CL-SSBI-D in section A1 [see Fig. 3(a)] can be obtained, as
shown in Fig. 3(b) and (c), in which Ts is defined as a switching
period.
In section A1, V1 ,V2 ,V0 , and V7 are used to synthesize the
output reference voltage and Vshoot is inserted in open-zero
vectors to realize the boost characteristics. Fig. 3(b) and (c)
illustrates that the magnitude of CMV of CL-SSBI-D is lower
than that of CL-SSBI, which indicates that the magnitude of the
leakage current can be also reduced.
IV MODULATION TECHNIQUE
LEAKAGE CURRENT
TO
REDUCE
The CMV of CL-SSBI-D changes in a maximum step value when
the active vectors Vodd convert to open-zero vector V0 ,and
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International Journal of Engineering Trends and Technology (IJETT) – Volume 22 Number 9-April 2015
changes in a relatively high step value when the open-zero vector
V0 convert to shoot-through zero vectors Vshoot, as shown in Fig.
3(c), which will induce high spikes in the leakage current due to
the parasitic capacitor path. Therefore, open-zero vectors are the
key to be considered to reduce the magnitude of the leakage
current .One possible technique is the NSPWM control, which
omits the open-zero vectors and employs three adjacent voltage
vectors to synthesize the output reference voltage. Vshoot can
still be inserted to boost the output voltage. The utilized voltage
vectors are changed every 60◦ throughout the space, as shown in
Fig. 4(a). Compared to the MCB control method [see Fig.
3(a)],the sections rotate 30◦ in clockwise. Moreover, only one-leg
shoot-through vectors are used in order to reduce switching
events, and are changed every 120◦ to assure equal current stress
of each leg during shoot-through zero vectors, that is Va shoot for
30◦ to 150◦, Vbshoot for 150◦ to 180◦and −180◦ to −90◦, and
Vbshoot for −90◦ to 30◦.
The voltage utilization level can be indicated by the
modulation index mi (mi = Vm/(2Vb /π), where Vm is the
magnitude of the reference voltage vector). Modulation index
within the linear area for NSPWM control is mi €(π/3√3,
π/2√3) ≅ [0.61, 0.907]. Therefore, mi stays in the high
modulation index section, leading to lower harmonic
distortion of the output waveforms than the remote-state
PWM(RSPWM) control [19],which include OPWM and
EPWM control.
Under the same circuit conditions from Section II and by
using the NSPWM control, the switching pattern and CMV of
CL-SSBI-D in section B1 and B2 can be obtained, as shown in
Fig. 4(b) and (c), in which Tsh is defined as a shoot-through
period. From Fig. 4(b) and (c), changes of CMV should result in
eight spikes in the leakage currents per switching cycle,
corresponding to 1600 spikes in the leakage current per
fundamental cycle (Ts = 100 μs, 50 Hz grid). Nevertheless, the
magnitude of the leakage current is lower than that of CL-SSBI
with the MCB control method. It is important to note that leakage
current occurs from CMV only in the duration of transiting from
or to shoot-through zero vectors with NSPWM control, when
open-zero vectors are omitted. And the magnitude of CMV is
also reduced, which leads to lower leakage current.
Fig. 3.(b) switching pattern and CMV of CL-SSBI in section A1
Fig. 3. (a) Voltage space vectors of a three-phase inverter
Fig.3. (c) switching pattern and CMV of CL-SSBI-D in section A1.
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Fig. 4. (a) Voltage space vectors of NSPWM
Fig.4. (c) switching pattern and CMV of CL-SSBI-D in section B2
V. SIMULATION AND EXPERIMENTAL RESULTS
In order to validate the theoretical analysis, the simulation and
experimental tests of the transformer less grid-connected PV
system constructed by CL-SSBI and CL-SSBI-D are carried out,
respectively. The PV frame and the neutral point of the grid are
grounded. Fig. 5 shows the simulation results of the gridconnected CL-SSBI system modulated by MCB control. The
three-phase currents as shown in Fig. 5(a) present high ripple
due to the high leakage current [see Fig. 5(c)]. CMV vcm
shown in Fig. 5(b) has four different levels and changes eight
times. The magnitude of the leakage current is 1.5 A, and its
RMS is calculated as 0.96 A, which is well above the 300 mA
threshold level stated in theVDE0126-1-1 standard [17].
Fig.4. (b) switching pattern and CMV of CL-SSBI-D in section B1
ISSN: 2231-5381
Fig. 6 shows the simulation results of the CL-SSBI-D grid
connected system modulated by the MCB control method and by
NSPWM, respectively. The magnitude of the leakage current is
0.45 A, and its RMS is calculated as 0.28 A of CL-SSBI-D
modulated by the MCB control method. While the magnitude of
the leakage current is 65 mA, and its RMS is calculated as 27
mA of CL-SSBI-D modulated by NSPWM, which is below the
threshold level of VDE0126-1-1 standard. The three-phase
currents of both control methods have lower ripple than that of
Fig. 5(a) due to the lower leakage current. CMV vcm of CLSSBID modulated by NSPWM has three different levels which lower
than that of Fig. 5(b) and Fig. 6(b), and similar to Fig. 4(b).
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Fig. 5(a). Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI with MCB control: grid
currents.
Fig. 5.(b) Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI with MCB control: CMV
(
v
CM
Fig. 6. (b)Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI-D with MCB control: CMV(
vCM).
Fig. 6. (c)Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI-D with MCB control: leakage
current, and with NSPWM control.
).
Fig. 5.(c) Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI with MCB control:
leakage current.
Fig. 6.(a) Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI-D with MCB control: grid
currents.
ISSN: 2231-5381
Fig. 6. (d)Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI-D with MCB control: grid
currents.
Fig. 6.(e) Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI-D with MCB control: CMV
(vCM ).
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International Journal of Engineering Trends and Technology (IJETT) – Volume 22 Number 9-April 2015
Fig. 6. (f)Simulation waveforms of Coupled Inductor based Single-Stage
Boost Three-Phase Inverter based on CL-SSBI-D with MCB control: leakage
current.
VI. CONCLUSION
This paper has presented a Coupled Inductor based Single-Stage
Boost Three-Phase Inverter. Diode D4 is added in the front of the
topology together with D1, to block the leakage current loop
during the active vectors and open-zero vectors. The leakage
current caused in the transient states of changing from and to
shoot-through zero vectors is also reduced by using the NSPWM
technique with one-leg shoot-through zero vectors, when openzero vectors are omitted. Simultaneously, the leakage current
caused by other transitions can be further reduced due to the
magnitude reduction of the CMV. The CMVs and the caused
leakage currents are compared between CL-SSBI with MCB
control and CL-SSBID with NSPWM. According to the
simulation, the amplitude and RMS value of the leakage current
can be well below the threshold level required by the VDE01261-1 standards, indicating an effective leakage current reduction.
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