Design of Low Power Basic 2x1Multiplexer Using Various Gates S. Ahmed Basha

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International Journal of Engineering Trends and Technology (IJETT) – Volume 7 Number 1- Jan 2014
Design of Low Power Basic 2x1Multiplexer Using
Various Gates
S. Ahmed Basha#1, K.Prasad Babu*2,H.Devanna #3, B.Venkatesh*4
#
E.C.E. Department, Assistant Professor Assistant Professor Associate Professor, Assistant Professor, JNTU Anantapur.
University India
St.John’s College of Engineering & Technology, Yemmiganur, 518360, Kurnool, Andhra Pradesh,India.
Abstract—Power dissipation is one of the important factor
in VLSI design. All the systems with high performance have
constraints regarding power consumption per chip. Low power
consumption is generally done by careful design. In this paper
we are designing the basic 2x1 multiplexer using various gates.
We represent the low power dissipated multiplexer among
them.
Table 2.When S=1
Inputs
Output
x1
x2
t
0
0
0
0
1
1
Keywords—MUX ;Complex Gates;PASS Transistor;
1
0
0
Transmission Gates;Power;
1
1
1
I. INTRODUCTION
Multiplexer: It is the device that has 2n inputs
and number of select lines by which the input line is send to
the output line. Multiplexers in short are called as MUX.
Mux’s are used for incrementing the information that has to
be sent over the channel/network within the duration of time,
with allotted bandwidth. Data selector is the other name of
Mux. It is used for multiple inputs with one output at atime.
The basic operation of 2x1 Mux is mentioned below
table
Basic Operation of 2x1 MUX:
Table 1.When S=0
Inputs
Output
x1
x2
t
0
0
0
0
1
0
1
0
1
1
1
1
ISSN: 2231-5381
Basic operation of Transmission gates:
Transmission gate is the one that momentarily allow or stop
a voltage level from input side to output side. Transmission
gate is composed of both pMOS and nMOS transistors. The
operation of control gate is in such a way that
complementary output is observed, i.e. When Logic 1 is
applied at node A Logic 0 is seen at node active low A.
Thus both transistors conduct and pass the voltage level at
IN to OUT. And when Logic 0 on node active-low A is
applied the complementary Logic 1 is applied to node A,
thus both transistors are off and which gives us a highimpedance state at both the IN and OUT nodes. Thus we
have 3 states high, low and high-impedance.
The Schematic, Circuit, Layout symbols are shown below
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International Journal of Engineering Trends and Technology (IJETT) – Volume 7 Number 1- Jan 2014
Basic operation Pass transistor:
The logic of pass transistor has an input to the gate, which
acts as the control input and this value of control variable, at
the source end of transistor appears at the drain end, i.e. the
control variable value controls a pass transistor to which
passing variables are applied. This logic represents logic
families that are used in Integrated circuits. The main
advantage of pass transistor is, it reduces the no transistors
which are repeated. Pass transistor as the name, pass only
logic levels between nodes and this causes the reduction in
active devices..
MUX Circuit operation using Gates:
II. IMPLEMENTATION & SIMULATION
Implementation using Transmission gates:
Analog Simulation:
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International Journal of Engineering Trends and Technology (IJETT) – Volume 7 Number 1- Jan 2014
Layout:
Implementation using Or & And gates:
ISSN: 2231-5381
Analog Simulation:
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International Journal of Engineering Trends and Technology (IJETT) – Volume 7 Number 1- Jan 2014
Layout:
Implementation using Pass transistors:
Analog Simulation:
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International Journal of Engineering Trends and Technology (IJETT) – Volume 7 Number 1- Jan 2014
Mux is used in many digital applications, If we reduce the
power dissipation of a Mux, then power dissipation of entire
system using Mux will also be reduced.
From above result table, we can conclude that Pass
Transistor implemented 2x1Mux has low power, when
compared with other implemented circuits.
REFERENCES
Layout:
[1]
Debashis, De (2010). Basic Electronics. Dorling Kindersley. p. 557.
[2]
http://www.maximintegrated.com/app-notes/index.mvp/id/4243
[3]
Essentials of VLSI CIRCUITS and systems- A.Pucknell PHI 2005.
[4]
Principles of CMOS VLSI design- Weste and Eshranghian, Pearson
edition1999.
[5]
Simulation based Power estimation for Digital CMOS Technologies
by Jins David Alexander
http://en.wikipedia.org/wiki/Multiplexer
[6]
III. RESULT
TECHNOLOGY
0.12µm
0.12µm
No. OF
METALS
6
6
0.12µm
6
TECNIQUE
Gates
Transmission
gates
Pass
Transistor
POWER
DISSIPATION
6.277µW
6.037 µW
1.27µW
IV. CONCLUSIONS & FUTURE SCOPE
Power dissipation or the Total power dissipation is the
sum of the Static & Dynamic power dissipation. Dynamic
power dissipation is far greater than Static power dissipation
when systems are active & hence static power is ignored.
Dynamic dissipation is due to charging and discharging of
load capacitances, “short-circuit” current while both pMOS
& nMOS networks are partially ON. Static dissipation is due
to sub-threshold conduction through OFF transistors,
tunneling current through gate oxide, leakage through
reverse-biased diodes, contention current in rationed circuits.
We propose the use of Pass transistor.
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