International Conference on Global Trends in Engineering, Technology and Management (ICGTETM-2016)
Compensation of Reactive Power and Harmonics by Using
DSTATCOM
,
1
Research Scholar, Electrical Engineering Department, SSBT’s COET, Jalgaon M.S.
2
Professor, Electrical Engineering Department, SSBT’s COET, Jalgaon M.S.
Abstract: The multilevel inverter utilization has been
increased since the last decade. These new type of
inverters are suitable in various high voltage and
high power applications due to their ability to
synthesize waveforms with better harmonic spectrum
and faithful output. Demand for high-voltage, high
power converters capable of producing high-quality
waveforms while utilizing low voltage devices and
reduced switching frequencies has led to the
multilevel inverter development with regard to
semiconductor power switch voltage limits.
Multilevel inverters include an array of power
semiconductors and capacitor voltage sources, the
output of which generate voltages with stepped
waveforms. The commutation of the switches permits
the addition of the capacitor voltages, which reach
high voltage at the output, while the power
semiconductors must withstand only reduced
voltages. The multilevel inverter has been
implemented in various applications ranging from
medium to high-power levels, such as motor drives,
power conditioning devices, also conventional or
renewable energy generation and distribution. The
different multilevel inverter structures are cascaded
H-bridge (CHB), diode clamped and flying capacitor
multilevel inverter. Among the three topologies, the
cascaded multilevel inverter has the potential to be
the most reliable and achieve the best fault tolerance
owing to its modularity, a feature that enables the
inverter to continue operating at lower power levels
after cell failure. Modularity also permits the
cascaded multilevel inverter to be stacked easily for
high power and high-voltage applications. The
cascaded multilevel inverter typically comprises
several identical single phase H-bridge cells
cascaded in series at its output side. This
configuration is commonly referred to as a CHB,
which can be classified as symmetrical if the dc bus
voltages are equal in all the series power cells, or as
asymmetrical if otherwise. In an asymmetrical CHB,
dc voltages are varied to produce more output levels.
Keywords: Multilevel inverter, level shifted pulse
width modulation, Phase shifted pulse width
modulation, DSTATCOM.
I. INTRODUCTION
Multilevel converters have attracted
attention in the last several years and have been
considered as one of the most promising circuit
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configurations for the next-generation high and
medium power converters. Now the use of multilevel
inverter in a Distribution Static Compensator
(DSTATCOM) for improving the power quality
problems [1]. Shunt connected Controllers at
distribution and transmission levels usually fall under
two categories -Static Synchronous Generators (SSG)
and Static Var Compensators (SVC) [2]. The
development in fast and reliable semiconductors
devices (GTO and IGBT) allowed new power
electronic configurations to be introduced to the tasks
of power transmission and load flow control. The
flexible ac transmission systems (FACTS) devices
offer a fast and reliable control over the transmission
parameters, i.e. voltage, line impedance, and phase
angle between the sending end voltage and receiving
end voltage. Custom power devices (CPD) are very
similar to the FACTS. Most widely known CPD are
DSTATCOM, Unified Power Quality Compensator
(UPQC), Dynamic Voltage Restorer (DVR), among
them DSTATCOM is very well known and can
provide cost effective solution for the compensation
of reactive power and unbalance loading in
distribution system [3, 5]. Since the term “multilevel
converters” can refer to a wide range of circuit
configurations, a classification of the most prominent
ones was proposed in and , naming them as the
multilevel modular cascade converter (MMCC)
family. When a STATCOM is employed at the
distribution level or at the load end for power factor
improvement and voltage regulation alone it is called
DSTATCOM. The performance of the DSTATCOM
depends on the control algorithm i.e. the extraction of
the current components. The effectiveness of
DSTATCOM depends upon the used control
algorithm for generating the switching signals for the
voltage source converter and value of interfacing
inductors [2, 3, 5]. For this purpose there are many
control schemes, and some of these are instantaneous
reactive power (IRP) theory, instantaneous
compensation,
instantaneous
symmetrical
components, synchronous reference frame (SRF)
theory, computation based on per phase basis, and
scheme based on neural network. Among these
control schemes, instantaneous reactive power theory
and synchronous rotating reference frame are most
widely used [3]. A DSTATCOM, connected at the
point of common coupling (PCC), has been utilized
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International Conference on Global Trends in Engineering, Technology and Management (ICGTETM-2016)
to mitigate both types of power quality (PQ)
problems [4]. When operating in current control
mode (CCM), it injects reactive and harmonic
components of load currents to make source currents
balanced, sinusoidal, and in phase with the PCC
voltages. In voltage-control mode (VCM) [4], the
DSTATCOM regulates PCC voltage at a reference
value to protect critical loads from voltage
disturbances, such as sag, swell, and unbalances. PQ
in distribution systems affects all the connected
electrical and electronics equipment. It is a measure
of deviations in voltage, current, frequency of a
particular system and associated components.
DSTATCOM
regulates
terminal
voltage
satisfactorily, depending upon the properly chosen
voltage source inverter (VSI) parameters [4, 5]. The
PQ at the PCC is governed by standards such as
IEEE-519-1992, IEEE-1531-2003 and IEC- 61000,
IECSC77A etc. [5]. The concept of the slow reset
regulator (SRR) has been proposed or used for some
FACTS devices, such as SVC or STATCOM for
system voltage control applications [6]. The
multilevel converter topologies are attractive for
continuous control of system dynamic behaviour and
to reduce PQ problems such as voltage harmonics,
voltage imbalance or sag and have better properties
under sudden changes of loads. Three different
multilevel inverter topologies are considered
currently. Among this topologies The cascade
inverter topology has been main area of research for
the shunt compensator applications in the
transmission system [7]. CHB inverters can also
increase the number of output voltage levels easily by
increasing the number of H-bridges [8].
II. OVERVIEW OF DSTATCOM
Level shifted CHB multilevel inverter used as
DSTATCOM which compensate reactive power and
harmonics in power system, along with this it also
improve PQ problem such as harmonics and voltage
sag. Due to the CHB multilevel inverter used as
DSTATCOM the number of switches is reduced
which reduced the switching losses. The DTATCOM
helps to improve the power factor and also eliminate
the Total Harmonics Distortion (THD) drawn from a
non linear loads at the end users. The dq reference
frame theory is used to generate the reference
compensating currents for DSTATCOM while
Proportional and Integral (PI) control is used for
capacitor dc voltage regulation. The Level Shifted
PWM (LSPWM) and Phase Shifted PWM (PSPWM)
techniques are used to investigate the performance of
CHB multilevel inverter. Joao I. Yutaka Ota, Yuji
Shibano, Naoto Niimura, and Hirofumi Akagi [1],
described PSPWM DSTATCOM using MMCC and
two PSPWM methods, which are named as one-cell
ISSN: 2231-5381
and all-cells update methods are compared. Saeed
Ebrahimi Saha Gholi, Hadiayan dehroodi,
Mohammad Shabani Poor, Javad Ali hosseini, Hamid
Pakari [2], described the role of DSTATCOM for PQ
enhancement in distribution networks under various
fault condition. FACTs use power electronics devices
and methods to control the high voltage side of the
network for improving the flow of power.
E.Rambabu and E.Praveena [3], described
performance, analysis, operating principles of a new
generation of power electronics based equipment
called DSTATCOM aimed at enhancing the
reliability and quality of power flow in low voltage
distribution network. Chandan Kumar, and Mahesh
K. Mishra[4], described a new algorithm to generate
reference voltage for a DSTATCOM operating in
VCM. Bhim Singh and Sabha Raj Arya[5], described
three phase DSTATCOM and its control algorithm
based on correlation and cross correlation function
approach for PQ improvement under linear and
nonlinear loads in a distribution system. Xiaokang
Xu, Martin Bishop, Michael J. S. Edmondsand,
Donna G. Oikarinen[6], described a new control
strategy for distributed static compensators
considering transmission reactive flow constraints.
Anshuman Shukla, Arindam Ghoshand Avinash
Joshi [7], described hysteresis current control
operation of FCMLI and its application in shunt
compensation of distribution systems. I.s.sreedevi
and S.Krishna Kumar [8], described CHB multilevel
inverter based DSTATCOM. The PQ in distribution
system is affected by the pollution introduced by the
customers.
III. DIFFERENT TOPOLOGIES OF
MULTILEVEL INVERTER AS DSTATCOM
The three types of multilevel inverter
topologies are mostly used for DSTATCOM. They
are NPC multilevel inverter, CCMLI and CHB
multilevel inverter. Among this three types of
multilevel inverter the CHB multilevel inverter is
most reliable and easily control. The comprehensive
study of the inverters are as follows:
A. Multilevel Diode Clamped or Neutral Point
Inverter (NPCMLI)
In the NPC multilevel inverter topology the
use of voltage clamping diodes is essential. A
common DC-bus is divided by an even number,
depending on the number of voltage levels in the
inverter, of bulk capacitors in series with a neutral
point in the middle of the line, see the left part of
Figure1.1.
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For the transformer less shunt compensator
application considered, higher level inverter structure
may be required to meet the desired voltage profile at
the distribution bus. There are many other advantages
of applying higher-level inverter also, however, at the
cost of increase in complexity [7].
C. Cascaded H-Bridge Multilevel Inverter (CHB)
A three-phase structure of a five level
cascaded inverter is illustrated in figure 1.3. The
multilevel inverter using cascaded inverter with
separate dc sources synthesize a favorable voltage
from several independent sources of dc voltages,
which may be achieved from batteries, solar cells and
fuel cells. This structure recently has become very
widespread in ac power supply and adjustable speed
drive
applications.
Figure 1.1 One phase-leg for a five-level NPC inverter
In Figure 1.1 one phase leg of a five level
NPC inverter is displayed. By adding two identical
circuits the three phase legs can together generate a
three phase signal where sharing of the DC-bus is
possible. The dc voltage imbalance in the DCMLI is
caused as the currents have non zero average values.
This results in the asymmetry between charging and
discharging times of the capacitors causing
overcharging or undercharging of each capacitors
with a constant dc voltage .
B. Multilevel Capacitor Clamped or Flying
Capacitor Inverter (CCMLI)
Multilevel capacitor clamped inverter is
shown in figure 1.2, As can be noticed in figure 1.1
the same number of main switches, main diodes and
DC-bus capacitors as in the NPCMLI are used for the
CCMLI.
Figure 1.3 Five level cascade H-bridge inverter structure[9]
There are five level of output voltage i.e 2V,
V, 0, -V, -2V. The main advantages of cascaded Hbridge inverter is that it requires least number of
components, modularized circuit and soft switching
can be employed.
Figure 1.4 Modified cascaded H-bridge multilevel inverter[10]
Figure 1.2 Capacitor clamped multilevel inverter with five
voltage levels
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Figure 1.4 shows the new cascaded five
level H bridge multilevel inverter [6]. One switching
element and four diodes added in the conventional
full-bridge inverter are connected to the centre tap of
dc power supply. Proper switching control of the
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auxiliary switch can generate half level of dc supply
voltage. It has five output voltage levels that is V,
V/2, 0, -V/2, -V. For getting the output voltage V the
switches S1, S4 need to be turned on. Similarly for
output voltage V/2 switches S4, S5 need to be turned
on, for 0 either S3, S4 or S1, S2 need to be turned on;
for –V/2 switches S2, S5 need to be turned on, for V
switches S2, S3 need to be turned on [10].
IV. MODULATION TECHNIQUES FOR
MULTILEVEL INVERTER
The modulation methods used in multilevel
inverters can be classified according to switching
frequency. Methods that work with high switching
frequencies have many commutations for the power
semiconductors in one period of the fundamental
output voltage. A very popular method in industrial
applications is the classic carrier based SPWM that
uses the phase shifting technique to reduce the
harmonics in the load voltage.
The most popular PWM techniques for CHB
inverter are PSPWM and LSPWM. In PSPWM, each
cell is modulated independently using sinusoidal
unipolar PWM and bipolar PWM respectively,
providing an even power distribution among the
cells. A carrier phase shift of 180°/m (No. of levels)
for cascaded inverter is introduced across the cells to
generate the stepped multilevel output waveform
with lower distortion. In LSPWM, each cell is
modulated independently using sinusoidal unipolar
PWM and bipolar PWM respectively, providing an
even power distribution among the cells. A carrier
level shift by 1/m (No. of levels) for cascaded
inverter is introduced across the cells to generate the
stepped multilevel output waveform with lower
distortion [11].
V. CONCLUSION
The results of a five level CHB multilevel
inverter show that the THD is low for multicarrier
modulation method. The THD can be further reduced
by using filter circuit. This circuit also reduces the
number of switches and sources. Because of using
CHB inverter as a DSTATCOM the losses is also
reduced in distribution system. Also the voltage
profile, voltage sag, voltage swell is improved with
the help of multilevel inverter as a DSTATCOM.
ACKNOWLEDGEMENT
I take this opportunity to express our deepest and
special appreciation to our guide Dr. P. J. Shah, Head
of Department, Electrical Engineering for his
insightful advice, motivating suggestions, invaluable
guidance, help and support in successful completion.
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