CMPS 260:
Make Files
2006.10.12
Make Files
2
Review
•
to compile to a .o file (i.e. object or binary file)
CC -c file.cpp
•
to link .o files into an executable
CC -o executable-name name.o name.o ...
to clean up after CC
rm -rf SunWS_cache *.o
• to remove '^M' from ends of lines
dos2unix file-name file-name
• to execute a file in the current directory
./file-name
•
Make Files
3
Review
•
use wrappers to prevent multiple compilation of
the same file in a project where multiple .cpp
files include the same .h file.
#ifndef _THIS_IDENTIFIER
#define _THIS_IDENTIFIER
... code (for example, class definition) ...
#endif
Make Files
4
Review
•
wrapper used in a .h file
#ifndef _CAR
#define _CAR
class Car
{
public:
Car();
Car(char initName);
void MoveCar();
char GetName();
int GetLocation();
private:
char name;
int location;
};
#endif
Make Files
5
Review
•
including the .h in a .cpp file
#include <ctime>
#include <cstdlib>
#include "car.h"
using namespace std;
Car::Car()
{
srand( (unsigned)time( NULL ) );
location = 0;
name = 'X';
}
...
Make Files
6
make
•
Unix / Linux utility program used to manage
compilation of large, multi-file projects.
•
allows modification and recompilation of one
source file without recompiling the entire
program
•
looks for its instructions in a file named either
makefile or Makefile
Make Files
Makefile
• text file of instructions to make program
• usually in directory of project
7
Make Files
8
Makefile Instructions
• comment – line that starts with ” #” ; ignored by
make
• rule – properties include a name (target), optional list
of prerequisites (dependencies; files that if changed
trigger the following commands) and one or more
commands, each command on a line indented with a
tab
Make Files
Makefile Rules
• rule syntax:
9
target : prerequisites
<tab>command
<tab>command
…
where target is usually the name of a file
generated by a program; may
be a name
prerequisites are files that are used to
create the target (.cpp, .h and .o
files)
command is a program / OS command
to run
<tab> is a true tab character
Make Files
10
Makefile rules (continued)
EACH COMMAND MUST BE ON A
LINE THAT BEGINS WITH A TAB!!!!!
NO, MS NOTEPAD DOESN’ T DO TABS, IT PUTS IN SPACES.
Make Files
11
Makefile rules (continued)
I REPEAT!
EACH COMMAND MUST BE ON A
LINE THAT BEGINS WITH A TAB!!!!!
NO, MS NOTEPAD DOESN’ T DO TABS, IT PUTS IN SPACES.
Make Files
Tip or Order of Makefile Rules
12
• in simple make files, it it normal to place the rules
with more dependencies at the top of the make file
and those with few dependencies at the bottom
Make Files
13
Makefile Rules
• Example Project has three files: car.h, car.cpp,
race.cpp
• Example rules:
race
:
CC
car.o race.o
-o race car.o
car.o : car.cpp car.h
CC -c car.cpp
race.o : race.cpp car.h
CC -c race.cpp
race.o
Make Files
14
Makefile Rule clean
• a rule with just the target clean followed by Unix /
Linux commands may be invoked to clean up after a
compilation before the next compilation
• example:
clean :
rm
–rf
*.o
SunWS_cache
Make Files
Full Makefile for race with CC
# project race
race : car.o race.o
CC -o race car.o race.o
car.o : car.cpp car.h
CC -c car.cpp
race.o : race.cpp car.h
CC -c race.cpp
clean :
rm -rf *.o SunWS_cache
15
Make Files
Using Makefile for race
• invoking Makefile:
make
• running the race:
./race
• cleaning up:
make clean
16