Evaluation Board User Guide UG-058

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Evaluation Board User Guide
UG-058
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Setting Up the Evaluation Board for the ADCLK914
The ADCLK914 data sheet should be used in conjunction with
this user guide. The data sheet contains full technical details
about the specifications and operation of the device.
PACKAGE LIST
Evaluation board with component installed
Applicable documents (schematic, layout, and so on)
GENERAL DESCRIPTION
This user guide describes how to set up and use the evaluation
board for the ADCLK914. The same printed circuit board
(PCB) is used to evaluate three other devices in addition to the
ADCLK914 (the ADCLK905, ADCLK907, and ADCLK925).
The ADCLK914 clock buffer is very fast, making it important to
use adequate high bandwidth instruments to evaluate it. To that
end, the evaluation board is fabricated using a high quality dielectric material between layers to maintain high signal integrity.
Transmission line paths are kept as close to 50 Ω as possible.
08543-001
DIGITAL PICTURE OF THE EVALUATION BOARD
Figure 1. ADCLK914/ADCLK905/ADCLK907/ADCLK925 Evaluation Board
Please see the last page for an important warning and disclaimers.
Rev. 0 | Page 1 of 8
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Evaluation Board User Guide
TABLE OF CONTENTS
Package List ....................................................................................... 1 Recommended Board Setup ........................................................3 General Description ......................................................................... 1 Clock Input Configuration ..........................................................4 Digital Picture of the Evaluation Board ......................................... 1 Evaluation Board Schematics and Artwork ...............................5 Revision History ............................................................................... 2 ESD Caution...................................................................................7 REVISION HISTORY
9/09—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Evaluation Board User Guide
UG-058
RECOMMENDED BOARD SETUP
The recommended setup for the evaluation board is shown
in Figure 2. Note that there is no output termination on the
evaluation board. HVDS termination is accomplished via the
50 Ω input of the oscilloscope. In this case, VCC is set to GND
and VEE is set to −3.3 V. This also meets the requirement for
VCC − VEE = 3.3 V.
Table 1. Basic Equipment Required
Quantity
1
1
1
4
Description
Single power supply
Signal source
High bandwidth oscilloscope
Matched high speed cables
POWER
SUPPLY
GND
VCC
–3.3V
GND
VEE
OSCILLOSCOPE
D
Q
ADCLK914
CLOCK
SOURCE
50Ω
EVALUATION
BOARD
D
Q
50Ω
VREF
VT
NOTES
1. FOR DC-COUPLED INPUTS, DISCONNECT VREF AND VT.
2. FOR AC-COUPLED INPUTS, CONNECT VREF AND VT.
Figure 2. Recommended Setup for Device Evaluation
Rev. 0 | Page 3 of 8
08543-002
OPTIONAL AC OR
DC COUPLING
UG-058
Evaluation Board User Guide
CLOCK INPUT CONFIGURATION
It is recommended that the clock source be ac-coupled and
that VREF and VT be tied together. For single-ended operation,
ac-couple the unused input to ground with a 0.1 μF capacitor.
For more information about input configurations, refer to the
data sheet for the ADCLK914. Figure 3 is the block diagram
for the ADCLK914.
50Ω
50Ω
50Ω
50Ω
Q
D
Q
D
Connection
Connect to GND
Connect to GND
Connect to −3.3 V
Connect to GND
Short TP5 and TP6 for input ac coupling, else no connection
Short TP5 and TP6 for input ac coupling, else no connection
No connection
No connection
Rev. 0 | Page 4 of 8
ADCLK914
VT
Table 2. Jumper Connections
Jumper
TP1 (GND)
TP2 (VCC)
TP3 (VEE)
TP4 (GND)
TP5 (VREF1)
TP6 (VT1)
TP7 (VT2)
TP8 (VREF2)
VCC
VREF
VEE
Figure 3. ADCLK914 1:1 Clock/Data Buffer
08543-003
The clock inputs of the ADCLK914 on the evaluation board are
dc-coupled to the SMA connectors. Therefore, the user must
ac-couple the clock source, or the clock source must supply the
appropriate dc common-mode voltage with adequate input swing.
AP LA NE
D2
J1
AP LANE
A PLANE
BLACK
TP3
V EE
ORANGE
2.2uF
TP4
C24
GND
D2
0.1uF
C21
0.1uF
C22
0.1uF
C23
C27
A PLANE
J10
J7
AP LA NE
AP LANE
CAL_2
matched lengths
0.1uF
C20
0 Ohm resistors are NOT to be installed.
Solder bridges will be completed
by end user if desired.
A PLANE
0.1uF
C19
4
3
LFCSP16-3X3
ADCLK914
AP LA NE
0.01uF
C45
0.01uF
C44
matched length x2
D2
D2
D1
C25
2
2.2uF
D1
0.1uF
C18
0.1uF
0
C12
R1
C11
0
16
C10
0.1uF
VREF 2
6
C26
0.1uF
VEE
7
V T1
V T2
14
VEE
0.1uF
C14
5
R2
C15
15
VREF 1
0.1uF
C9
13
0.1uF
PAD
9
Q2
VEE
10
Q2
Q1
11
12
C2
0.1uF
VCC
C13
8
0.1uF
C1
0.1uF
Q1
0.1uF
D1
C16
0.1uF
A PLANE
AP LA NE
J9
matched lengths
C3
1
0.1uF
J2
0.1uF
C4
J8
C5
VCC
C8
D1
0.1uF
AP LA NE
Q2
A PLA NE
J3
Q2
AP LA NE
J6
Q1
A PLANE
A PLANE
V CC
TP2
RED
GND
BLACK
AP LANE
TP1
Jumpers are NOT to be installed.
Solder bridges will be completed
by end user if desired.
V T2
A PLA NE
J4
C6
J5
J12
Q1
JP1
JP4
JP3
JP2
A PLANE
0.1uF
C38
A PLANE
0.1uF
C41
AP LA NE
0.1uF
0.1uF
0.1uF
VREF1
V REF 2
AP LA NE
A PLA NE
C37
V T1
V REF 2
V T2
V T1
TP5
YELLOW
YELLOW
TP7
TP6
TP8
C36
V REF 1
0.1uF
matched length x2
C7
C39
C40
C28
C32
0.1uF
0.1uF
C29
0.1uF
C33
C42
C30
C34
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C43
C31
C35
WHITE
0.1uF
JP8
JP7
JP6
JP5
WHITE
0.1uF
0.1uF
CAL_1
0.1uF
Rev. 0 | Page 5 of 8
0.1uF
Figure 4. ADCLK914 Evaluation Board Schematic
V REF 1
08543-004
J11
Evaluation Board User Guide
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EVALUATION BOARD SCHEMATICS AND ARTWORK
C17
08543-007
Evaluation Board User Guide
08543-005
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08543-008
Figure 7. VREF and VT Plane Layers
08543-006
Figure 5. Top Trace Layer
Figure 6. Ground Plane Layer
Figure 8. VCC and VEE Power Plane Layer
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08543-009
08543-010
Evaluation Board User Guide
Figure 9. Second Ground Plane Layer
Figure 10. Bottom Trace Layer
ESD CAUTION
Rev. 0 | Page 7 of 8
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Evaluation Board User Guide
NOTES
Evaluation boards are only intended for device evaluation and not for production purposes. Evaluation boards are supplied “as is” and without warranties of any kind, express,
implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under
any patents or other intellectual property by application or use of evaluation boards. Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the
right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not
authorized to be used in life support devices or systems.
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG08543-0-9/09(0)
Rev. 0 | Page 8 of 8
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