0.28 Ω, CMOS, 1.65 V to 3.6 V, Single SPST Switch ADG841-KGD

advertisement
0.28 Ω, CMOS, 1.65 V to 3.6 V,
Single SPST Switch
ADG841-KGD
Known Good Die
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Ultralow on resistance
0.28 Ω typical
0.48 Ω max at 125°C
Excellent audio performance, ultralow distortion
0.025 Ω typical
0.052 Ω max RON flatness
1.65 V to 3.6 V single supply
High current carrying capability
300 mA continuous current
500 mA peak current
Automotive temperature range: −40°C to +125°C
Rail-to-rail operation
Typical power consumption (<0.01 μW)
Known good die (KGD): these die are fully guaranteed to
data sheet specifications
ADG841-KGD
S
D
SWITCH SHOWN
FOR A LOGIC 1 INPUT
10266-001
IN
Figure 1.
APPLICATIONS
Handsets
PDAs
MP3 players
Power routing
Battery-powered systems
Communication systems
Modems
PCMCIA cards
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG841-KGD is a low voltage CMOS device containing a
single-pole, single-throw (SPST) switch. The ADG841-KGD
is closed for a Logic 1 input. The device offers ultralow on
resistance of less than 0.48 Ω over the full temperature range.
The ADG841-KGD is fully specified for 3.3 V, 2.5 V, and 1.8 V
supply operation.
1.
2.
3.
Each switch conducts equally well in both directions when on,
and has an input signal range that extends to the supplies.
Additional application and technical information can be found
in the ADG841 data sheet.
Rev. B
4.
<0.48 Ω over full temperature range of −40°C to +125°C.
Compatible with 1.8 V CMOS logic.
High current handling capability
(300 mA continuous current at 3.3 V).
Low THD + N (0.02% typical).
Table 1. ADG841-KGD Truth Table
Logic (IN)
0
1
ADG841-KGD
Off
On
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Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 ©2011–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADG841-KGD
Known Good Die
TABLE OF CONTENTS
Features .............................................................................................. 1
Specifications—1.65 V to 1.95 .........................................................5
Applications ....................................................................................... 1
Absolute Maximum Ratings ............................................................6
Functional Block Diagram .............................................................. 1
ESD Caution ..................................................................................6
General Description ......................................................................... 1
Pin Configuration and Function Descriptions..............................7
Product Highlights ........................................................................... 1
Test Circuits........................................................................................8
Revision History ............................................................................... 2
Outline Dimensions ..........................................................................9
Specifications—2.7 V to 3.6 V ........................................................ 3
Die Specifications and Assembly Recommendations ..............9
Specifications—2.5 V ± 0.2 V ......................................................... 4
Ordering Guide .............................................................................9
REVISION HISTORY
12/14—Rev. A to Rev. B
Changes to Table 7 ............................................................................ 9
10/14—Rev. 0 to Rev. A
Changes to Test Circuits Section Layout ....................................... 8
Changes to Table 7 ............................................................................ 9
11/11—Revision 0: Initial Version
Rev. B | Page 2 of 9
Known Good Die
ADG841-KGD
SPECIFICATIONS—2.7 V TO 3.6 V
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. The temperature range is −40°C to +125°C.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to VDD
0.28
0.37
0.025
0.034
0.43
0.48
0.044
0.052
±0.2
±0.2
2
0.8
0.005
tOFF
Charge Injection
Off Isolation
Total Harmonic Distortion (THD + N)
Insertion Loss
−3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
3.2
10.5
14
6.5
7.8
200
−54
0.012
−0.02
21
160
160
238
15.5
16.5
8
8.2
0.003
1
1
Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
VDD = 2.7 V
VDD = 2.7 V, VS = 0 V to VDD, IDS = −100 mA
See Figure 3
VDD = 2.7 V, VS = 0 V to VDD, IDS = −100 mA
nA typ
nA typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
Unit
4
Guaranteed by design; not subject to production test.
Rev. B | Page 3 of 9
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
pC typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
VDD = 3.6 V
VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; see Figure 4
VS = VD = 0.6 V or 3.3 V; see Figure 5
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 8
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 8
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 9
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 6
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 3 V p-p
RL = 50 Ω, CL = 5 pF; see Figure 7
RL = 50 Ω, CL = 5 pF; see Figure 7
VDD = 3.6 V
Digital inputs = 0 V or 3.6 V
ADG841-KGD
Known Good Die
SPECIFICATIONS—2.5 V ± 0.2 V
VDD = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted. The temperature range is −40°C to +125°C.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to VDD
0.3
0.35
0.025
0.04
0.4
0.45
0.05
0.05
±0.2
±0.2
1.7
0.7
0.005
tOFF
Charge Injection
Off Isolation
Total Harmonic Distortion (THD + N)
Insertion Loss
–3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
3.2
13
16.5
7
8.2
150
−54
0.022
−0.02
21
170
170
238
18
19
8.4
8.6
0.003
1
1
Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
VDD = 2.3 V, VS = 0 V to VDD, IDS = −100 mA
See Figure 3
VDD = 2.3 V, VS = 0 V to VDD, IDS = −100 mA
nA typ
nA typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
Unit
4
Guaranteed by design; not subject to production test.
Rev. B | Page 4 of 9
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
pC typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
VDD = 2.7 V
VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; see Figure 4
VS = VD = 0.6 V or 2.4 V; see Figure 5
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 8
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 8
VS = 1.25 V, RS = 0 Ω, CL = 1 nF; see Figure 9
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 6
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
RL = 50 Ω, CL = 5 pF; see Figure 7
RL = 50 Ω, CL = 5 pF; see Figure 7
VDD = 2.7 V
Digital inputs = 0 V or 2.7 V
Known Good Die
ADG841-KGD
SPECIFICATIONS—1.65 V TO 1.95
VDD = 1.65 V to1.95 V, GND = 0 V, unless otherwise noted. The temperature range is −40°C to +125°C.
Table 4.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to VDD
0.37
0.4
0.6
0.17
0.84
1.8
0.84
1.8
±0.2
±0.2
0.65 VDD
0.35 VDD
0.005
tOFF
Charge Injection
Off Isolation
Total Harmonic Distortion (THD + N)
Insertion Loss
−3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
4
19
26
8
9.5
100
−54
0.14
−0.02
21
178
178
238
28
30
9.8
10
0.003
1
1
V
Ω typ
Ω max
Ω max
Ω typ
nA typ
nA typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
Unit
4
Guaranteed by design; not subject to production test.
Rev. B | Page 5 of 9
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
pC typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
Test Conditions/Comments
VDD = 1.8 V, VS = 0 V to VDD, IDS = −100 mA
See Figure 3
VDD = 1.65 V, VS = 0 V to VDD, IDS = −100 mA
VDD = 1.65 V, VS = 0 V to VDD, IDS = −100 mA
VDD = 1.95 V
VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; see Figure 4
VS = VD = 0.6 V or 1.65 V; see Figure 5
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 8
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 8
VS = 1 V, RS = 0 V, CL = 1 nF; see Figure 9
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 6
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.2 V p-p
RL = 50 Ω, CL = 5 pF; see Figure 7
RL = 50 Ω, CL = 5 pF; see Figure 7
VDD = 1.95 V
Digital inputs = 0 V or 1.95 V
ADG841-KGD
Known Good Die
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 5.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
Continuous Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
Operating Temperature Range
Storage Temperature Range
Junction Temperature
1
Rating
−0.3 V to +4.6 V
−0.3 V to VDD +0.3 V
−0.3 V to 4.6 V or 10 mA,
whichever occurs first
500 mA
460 mA
420 mA (pulsed at 1 ms,
10% duty cycle maximum)
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
300 mA
275 mA
250 mA
−40°C to +125°C
−65°C to +150°C
150°C
Overvoltages at S or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Rev. B | Page 6 of 9
Known Good Die
ADG841-KGD
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
6
2
5
3
4
TOP VIEW
(CIRCUIT SIDE)
ADI LOGO
10266-002
1
Figure 2. Pad Configuration
Table 6. Pad Function Descriptions
Pad No.
1
2
3
4
5
6
X-Axis (μm)
−254
−254
+6
+306
+249
+39
Y-Axis (μm)
+401
−401
−401
−401
+401
+401
Mnemonic
VDD
IN
S
GND
NC
D
Pad Type
Single
Single
Single
Single
Single
Single
Rev. B | Page 7 of 9
Description
Positive Power Supply Pad.
Logic Control Input Pad.
Source Pad.
Ground Pad.
No Connect.
Drain Pad.
ADG841-KGD
Known Good Die
TEST CIRCUITS
VDD
V
0.1µF
D
10266-003
VS
NETWORK
ANALYZER
VDD
IDS
IN
50Ω
Figure 3. On Resistance
S
A
D
RL
50Ω
GND
A
ADG841-KGD – V IN = 0
10266-004
VD
OFF ISOLATION = 20 log
Figure 4. Off Leakage
VOUT
VS
Figure 6. Off Isolation
ID (ON)
D
VDD
A
0.1µF
VD
10266-005
S
VOUT
VIN
VS
NC
VS
D
ID (OFF)
IS (OFF)
50Ω
S
10266-008
S
NETWORK
ANALYZER
VDD
50Ω
S
Figure 5. On Leakage
IN
50Ω
VS
D
RL
50Ω
GND
VOUT
INSERTION LOSS = 20 log
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 7. Bandwidth
VSS
VDD
0.1µF
0.1µF
VIN
S
50%
50%
50%
50%
D
VOUT
VS
ADG841-KGD
VSS
VDD
RL
300Ω
IN
CL
35pF
VIN
90%
90%
VOUT
tON
tOFF
Figure 8. Switching Times, tON, tOFF
VDD
0.1µF
VIN
ON
VDD
D
VS
OFF
S
VOUT
CL
1nF
IN
VIN
ADG841-KGD
VOUT
ΔVOUT
QINJ = CL × ΔVOUT
10266-007
GND
Figure 9. Charge Injection
Rev. B | Page 8 of 9
10266-006
GND
10266-009
VIN
Known Good Die
ADG841-KGD
OUTLINE DIMENSIONS
0.314
0.304
0.294
0.820 MAX
1
6
5
1.010 MAX
3
4
TOP VIEW
SIDE VIEW
(CIRCUIT SIDE)
0.07 × 0.07
11-04-2011-A
2
Figure 10. 6-Pad Bare Die [CHIP]
(C-6-3)
Dimensions shown in millimeters
DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS
Table 7. Die Specifications
Parameter
Chip Size
Scribe Line Width
Die Size
Thickness
Bond Pad
Bond Pad Composition
Backside
Passivation
Value
735 × 925
85 × 85
820 × 1010
304 ± 10
70 × 70
99.5 Al, 0.5 Cu
Bare
Nitride
Unit
μm
μm
μm (maximum)
μm
μm (minimum)
%
Not Applicable
Not Applicable
Table 8. Assembly Recommendations
Assembly Component
Die Attach
Bonding Method
Bonding Sequence
Recommendation
Epoxy adhesive
Gold ball or aluminum wedge
Four first
ORDERING GUIDE
Model
ADG841-KGD-CHIPS
Temperature Range
−40°C to +125°C
Package Description
6-Pad Bare Die [CHIP]
©2011–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10266-0-12/14(B)
Rev. B | Page 9 of 9
Package Option
C-6-3
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