EVAL-AD5204SDZ User Guide
UG-345
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for the AD5204 Digital Potentiometer
FEATURES
GENERAL DESCRIPTION
Full featured evaluation board for the AD5204
Several test circuits
Various ac/dc input signals
PC control via a separately purchased system demonstration
platform (SDP-B)
PC control software
26 extra bytes in EEMEM for user-defined information
Resistor tolerance error stored in EEMEM
This user guide describes the evaluation board for evaluating the
AD5204—a quad-channel, 256-position, digital potentiometer.
The AD5204 supports dual-supply ±2.3 V to ±2.7 V operation and
single-supply 2.7 V to 5.5 V operation, making the device suited
for battery-powered applications and many other applications.
The EVAL-AD5204SDZ can operate in single-supply and dualsupply mode and incorporates an internal power supply from
the USB.
PACKAGE CONTENTS
Complete specifications for the AD5204 part can be found in
the AD5204 data sheet, which is available from Analog Devices,
Inc., and should be consulted in conjunction with this user
guide when using the evaluation board.
EVAL-AD5204SDZ board
CD that includes
Self-installing software that allows users to control the
board and exercise all functions of the device
Electronic version of the AD5204 data sheet
Electronic version of the UG-345 user guide
DIGITAL PICTURE OF EVALUATION BOARD WITH SYSTEM DEMONSTRATION PLATFORM
SYSTEM DEMONSTRATION
PLATFORM
10363-001
EVAL-AD5204SDZ
Figure 1.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 16
UG-345
EVAL-AD5204SDZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1 Test Circuits ...................................................................................4 Package Contents .............................................................................. 1 Evaluation Board Software ...............................................................7 General Description ......................................................................... 1 Installing the Software ..................................................................7 Digital Picture of Evaluation Board with System
Demonstration Platform.................................................................. 1 Running the Software ...................................................................7 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................8 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 14 Power Supplies .............................................................................. 3 Bill of Materials ........................................................................... 14 Software Operation .......................................................................7 Link Options ................................................................................. 3 REVISION HISTORY
12/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
EVAL-AD5204SDZ User Guide
UG-345
EVALUATION BOARD HARDWARE
POWER SUPPLIES
LINK OPTIONS
The EVAL-AD5204SDZ supports the use of single and dual
power supplies.
Several link and switch options are incorporated into the evaluation board and should be set up before using the board. Table 2
describes the positions of the links to control the evaluation board
by a PC, via the SDP-B board, using the EVAL-AD5204SDZ in
single-supply mode. The functions of these link and switch
options are described in detail in Table 3 through Table 6.
In single-supply mode, the evaluation board can be powered
either from the SDP port or externally by the J1-1, J1-2, and
J1-3 connectors, as described in Table 1.
If dual-supply mode is required, the J1-1, J1-2, and J1-3 connectors
must provide the external power supply, as described in Table 1.
All supplies are decoupled to ground using 10 μF tantalum and
0.1 μF ceramic capacitors.
Table 2. Link Options Setup for SDP-B Control (Default)
Link No.
A25
A24
Option
3.3 V
GND
Table 1. Maximum and Minimum Voltages of the Connectors
Connector No.
J1-1
Label
EXT VDD
J1-2
J1-3
GND
EXT VSS
Voltage
Analog positive power supply, VDD.
For single-supply operation, it is
2.7 V to 5.5 V.
For dual-supply operation, it is
2.5 V to 2.75 V.
Analog ground.
Analog negative power supply, VSS.
For single-supply operation, it is 0 V.
For dual-supply operation, it is
−2.5 V to −2.75 V.
Table 3. Link Functions
Link No.
A25
Power Supply
VDD
A24
VSS
Options
This link selects one of the following as the positive power supply:
5 V (from SDP-B).
3.3 V (from SDP-B).
EXT VDD (external supply from the J1-1 connector).
This link selects one of the following as the negative power supply:
GND (analog ground).
EXT VSS (external supply from the J1-3 connector).
Rev. 0 | Page 3 of 16
UG-345
EVAL-AD5204SDZ User Guide
TEST CIRCUITS
1µF
The EVAL-AD5204SDZ incorporates several test circuits to
evaluate the AD5204 performance.
VDD – VSS
2
AC + DC
AC
AC_INPUT
R34 A1
DAC
RDAC1
RDAC1 can be operated as a digital-to-analog converter (DAC),
as shown in Figure 2.
W1
B1
AC + DC
R36
B1
VDD
R34 A1
RDAC1
VDD – VSS
W1
A1
W1
2
VSS
VSS
VSS
Table 4. DAC Voltage References
BUF-W1
B1
A21
GND
Table 5. AC Signal Attenuation Link Options
Table 4 shows the options available for the voltage references.
W1
VSS
Depending on the voltage supply rails and the dc offset voltage
of the ac signal, various configurations can be used, as described
in Table 5.
Figure 2. DAC
Link
A20
R35
Figure 3. AC Signal Attenuator
R35
GND
Terminal
A1
DC
B1
10363-002
DC
2
W1_BUF
BUF-W1
B1
VDD – VSS
W1_BUF
BUF-W1
10363-003
VDD – VSS
2
VDD
W1
A1
Options
AC + DC
VDD
DC
VSS
GND
Description
Connects Terminal A1 to
(VDD − VSS)/2
Connects Terminal A1 to VDD
Connects Terminal W1 to an
output buffer
Connects Terminal B1 to
(VDD − VSS)/2
Connects Terminal B1 to VSS
Connects Terminal B1 to
analog ground
Voltage
Supply
Single
Dual
Maximum
AC Signal
Amplitude
VDD
VDD/VSS
Link
A20
Options
AC + DC
A21
AC
DC
A20
GND
AC + DC
A21
AC
GND
The output voltage is defined in Equation 1.
VOUT  (VA1  VB1 ) 
RDAC1
256
(1)
where:
RDAC1 is the code loaded in the RDAC1 register.
VA1 is the voltage applied to the A1 terminal (A20 link).
VB1 is the voltage applied to the B1 terminal (A21 link).
VSS
Using the R34 and R35 external resistors, the user can reduce
the voltage of the voltage references. In this case, use the A1 and
B1 test points to measure the voltage applied to the A1 and B1
terminals and recalculate VA1 and VB1 in Equation 1.
1
Recommended to ensure optimal total harmonic distortion (THD) performance.
The signal attenuation is defined in Equation 2.
 R  RW
Attenuation (dB)  20  log  WB1
 RENDTO END
AC Signal Attenuation
RDAC1 can be used to attenuate an ac signal, which must be
provided externally using the AC_INPUT connector, as shown
in Figure 3.
Conditions
No dc offset voltage.
AC signal is outside
the voltage supply
rails due to the
dc offset voltage.
DC offset voltage
≠ VDD/2.1
All other conditions.
Use in conjunction
with AC + DC link.
All other conditions.
AC signal is outside
the voltage supply
rails due to the
dc offset voltage.
DC offset voltage
≠ 0 V.1
All other conditions.
Use in conjunction
with AC + DC link.
All other conditions.




where:
RWB1 is the resistor between the W1 and B1 terminals.
RW is the wiper resistance.
REND-TO-END is the end-to-end resistance value.
Rev. 0 | Page 4 of 16
(2)
EVAL-AD5204SDZ User Guide
UG-345
In addition, R36 can be used to achieve a pseudologarithmic
attenuation. To do so, adjust the R36 resistor until a desirable
transfer function is found.
R41
1.7kΩ
VIN
VOUT
RDAC2 can be operated as an inverting or noninverting signal
amplifier supporting linear or pseudologarithmic gains. Table 6
shows the available configurations.
Gain
Linear
Link
A27
A29
A30
A27
A29
A30
A27
A29
A30
A27
A29
A30
Pseudologarithmic
Inverting
Linear
Pseudologarithmic
1
Label1
LINEAR
NON-INVERTING
NON-INVERTING
PSEUDOLOG
NON-INVERTING
NON-INVERTING
LINEAR
INVERTING
INVERTING
PSEUDOLOG
INVERTING
INVERTING
A2
A2
B2
R42
RDAC2
Figure 5. Pseudologarithmic Noninverting Amplifier
R43 and R42 can be used to set the maximum and minimum
gain limits.
The inverting amplifier with linear gain is shown in Figure 6,
and the gain is defined in Equation 5.
G
RWB 2
R38
(5)
where RWB2 is the resistor between the W2 and B2 terminals.
R41
1.7kΩ
R38
2.7kΩ
VIN
VOUT
C1
10nF
W2
B2
W2
B2
OAVOUT
R42
RDAC2
See Figure 17.
The noninverting amplifier with linear gain is shown in Figure 4,
and the gain is defined in Equation 3.
G  1
W2
B2
10363-006
Table 6. Amplifier Selection Link Options
R43
OAVOUT
10363-005
W2
Signal Amplifier
Amplifier
Noninverting
C1
10nF
RWB 2
R38
Figure 6. Linear Inverting Amplifier
The inverting amplifier with pseudologarithmic gain is shown
in Figure 7, and the gain is defined in Equation 6.
(3)
G
where RWB2 is the resistor between the W2 and B2 terminals.
R41
1.7kΩ
R38
2.7kΩ
W2
W2
where:
RWB2 is the resistor between the W2 and B2 terminals.
RAW2 is the resistor between the A2 and W2 terminals.
VOUT
C1
10nF
B2
B2
OAVOUT
R42
RDAC2
(6)
R41
1.7kΩ
VOUT
10363-004
VIN
RWB 2
R AW 2
C1
10nF
W2
OAVOUT
The noninverting amplifier with pseudologarithmic gain is
shown in Figure 5, and the gain is defined in Equation 4.
G  1
RWB 2
R AW 2
where:
RWB2 is the resistor between the W2 and B2 terminals.
RAW2 is the resistor between the A2 and W2 terminals.
VIN
R43
A2
A2
W2
B2
B2
R42
RDAC2
10363-007
Figure 4. Linear Noninverting Amplifier
Figure 7. Pseudologarithmic Inverting Amplifier
(4)
R43 and R42 can be used to set the maximum and minimum
gain limits.
Rev. 0 | Page 5 of 16
UG-345
EVAL-AD5204SDZ User Guide
A4
Output Buffers
RDAC4
RDAC3 and RDAC4 can be connected to an output buffer as
shown in Figure 8 and Figure 9, respectively.
W4
A4
W4
A3
VOUT4
BUF_4
B4
W3
A3
W3
VOUT3
B4
BUF_3
Figure 9. RDAC4
10363-008
B3
B3
10363-009
RDAC3
Figure 8. RDAC3
Rev. 0 | Page 6 of 16
EVAL-AD5204SDZ User Guide
UG-345
EVALUATION BOARD SOFTWARE
INSTALLING THE SOFTWARE
The EVAL-AD5204SDZ kit includes evaluation board software
provided on a CD. The software is compatible with Windows®
XP, Windows Vista, and Windows 7 (both 32-bit and 64-bit).
1.
2.
3.
4.
5.
Start the Windows operating system and insert the CD.
The installation software must open automatically. If it
does not, run the setup.exe file from the CD.
After installation is completed, power up the evaluation
board as described in the Power Supplies section.
Plug the EVAL-AD5235SDZ into the SDP-B board and the
SDP-B board into the PC using the USB cable provided.
When the software detects the evaluation board, follow the
instructions that appear to finalize the installation.
To uninstall the program, click Start > Control Panel > Add or
Remove Programs > AD5204 Eval Board.
10363-010
Install the software before connecting the SDP-B board to the USB
port of the PC to ensure that the SDP board is recognized when
it is connected to the PC.
Figure 10. Pop-Up Window Error
The main window of the EVAL-AD5204SDZ software then
opens, as shown in Figure 11.
SOFTWARE OPERATION
The main window of the EVAL-AD5204SDZ software includes
the following features:

RUNNING THE SOFTWARE
To run the evaluation board software, do the following:
2.
Click Start > All Programs > Analog Devices > AD5204>
AD5204 Eval Board.
If the SDP board is not connected to the USB port when
the software is launched, a connectivity error is displayed
(see Figure 10). Connect the evaluation board to the USB
port of the PC, wait a few seconds, click Rescan, and follow
the instructions.



10363-011
1.
The REGISTER ACCESS section can be used to update
the RDAC registers by typing a value and clicking WRITE.
Alternatively, you can send a customized SPI data-word by
switching the scroll bars from 0 to 1 or from 1 to 0, as
desired, and then clicking SEND DATA. When WRITE is
clicked or a quick command is executed, a write and read
operation is performed, and the values displayed in this
section are updated with the actual RDAC register values.
This function can be used to verify whether the write
operation was completed successfully. The scroll bars are
updated upon each write transfer.
Clicking /SHUTDOWN enables or disables the AD5204
SHDN pin.
Clicking /PRESET enables or disables the AD5204 PR pin.
Clicking EXIT closes the program but does not reset the
part.
Figure 11. EVAL-AD5204SDZ Software Main Window
Rev. 0 | Page 7 of 16
A1
A1
Rev. 0 | Page 8 of 16
Figure 12. Schematic of Multiboard Digital Potentiometers
B4
W4-3
A4
B3
W3-3
A3
B2
W2-3
A2
B1
W1-3
A1
B4
W4-2
A4
B3
W3-2
A3
B2
W2-2
A2
B1
W1-2
B4
W4-1
A4
B3
W3-1
A3
B2
W2-1
A2
B1
W1-1
16
DGND 9
VDD
AD8403
13
14
2
14 W3
12
22 A4
16 B4
17 W4
VSS
GND
6
5
20
WP
18 A4
22
3
2
4
23
24
1
19
RESET 21
SYNC
DIN
SCLK
SDO
RDY
O2
O1
VDD
AD5233
13 B3
14 W3
15 A3
12 B2
11 W2
10 A2
9 B1
8 W1
U4
7 A1
11
24 B4
VSS
GND 3
23 W4
NC
NC 1
13 B3
NC
SHDN 7
RESET
15 A3
VSS
VDD
VSS
WP
RESET
SYNC-3
DIN
SCLK
SDO
RDY
O2
O1
SHDN
RESET
SDO
10
20 W2
5
DIN
DIN 8
19 A2
SDO
SCLK
SCLK 9
21 B2
SYNC-2
SYNC 4
16 B1
VDD
SYNC-1
17 W1
11
DIN
SDO
SCLK
RESET
SHDN
AD5204
VDD 6
SYNC
DIN 12
SDO
SCLK
VDD
U8
18 A1
6 B4
5
AGND4
8 W4
7 A4
20 B3
17
AGND3
18 W3
19 A3
SHDN 10
2 B2
1 AGND2
15
RESET
4 W2
3 A2
24 B1
21 AGND1
22 W1
U6
23 A1
A1
A1
B2
W2-7
A2
B1
W1-7
A1
V2
V1
B2
W2-6
B1
W1-6
B2
W2-5
A2
B1
B2
W2-4
B1
W1-4
W1-5
SPI
2
W1
A1
W1
W1
A1
9
10
11
B2
W2
A2
16
3
2
1
15
4
GND 5
VSS
13
WP 14
RESET
RDY
SDO
DIN
SCLK
SYNC
16
3
2
1
15
U11 VDD 12
4
GND 5
VSS
13
WP 14
RESET
RDY
SDO
DIN
SCLK
SYNC
12
4
GND 5
VSS
U12 VDD
AD5235
V2
V1
B2
W2
8 B1
7
6
11
6
9
10
16
3
2
1
15
13
WP 14
RESET
ADN2850
B2
W2
A2
8 B1
7
9
10
11
RDY
SDO
DIN
SCLK
SYNC
U10 VDD 12
GND
4
SYNC 8
7
DIN 6
SCLK
AD5232
B2
W2
B1
W1
U2 VDD 5
AD5162
A1
8 B1
7
6
9
3
1
10
VSS
VDD
VSS
VDD
VSS
VDD
VDD
WP
RESET
RDY
SDO
DIN
SCLK
SYNC-7
WP
RESET
RDY
SDO
DIN
SCLK
SYNC-6
WP
RESET
RDY
SDO
DIN
SCLK
SYNC-5
SYNC-4
DIN
SCLK
B2
W2-9
A2
B1
W1-9
A1
B4
W4-8
A4
B3
W3-8
A3
B2
W2-8
A2
B1
W1-8
A1
13
14
12
5
4
6
18 B4
B3
W3
A3
B1
0x58
20
15
5
10
DGND 8
VSS
3
WP 11
AD1 2
AD0
9
SCL 7
SDA
U9 VDD
0x5A
1
VSS 10
DGND
WP
AD0 4
AD1 16
SDA 9
14
SCL
VDD
AD5254
AD5252
W1
A1
19 W4
17 A4
12 B3
13 W3
11 A3
7 B2
6 W2
8 A2
2 B1
1 W1
U7
3 A1
MULTICHANNEL
VSS
VDD
VSS
WP
SDA
SCL
VDD
I2C
WP
SCL
SDA
VDD
B2
W2-11
A2
B1
W1-11
A1
B2
W2-10
A2
B1
W1-10
A1
B1
W1
B1
9
3
B2
W2
U1
AD5243
W1
A1
B2
W2
8 A2
1
10
2
9
3
8 A2
1
10
4
6
7
GND
SCL
SDA
VDD
4
6
7
5
0x5E
GND
SCL
SDA
0x5E
AD5172_SOCKET
2
U3 VDD 5
A1
VDD
SCL
SDA
VDD
SCL
SDA
B2
W2-12
A2
B1
W1-12
A1
7
5
6
1
3
2
B2
W2
A2
B1
W1
A1
VDD
VSS
13
12
11
10
9
GND 8
4
VSS
CS
CLK
U/D
DACSEL
MODE
U5 VDD 14
AD5222
U/D
CS
CLK
U/D
DACSEL
MODE
UG-345
EVAL-AD5204SDZ User Guide
EVALUATION BOARD SCHEMATICS AND ARTWORK
10363-019
EVAL-AD5204SDZ User Guide
UG-345
VDD
8
U15-C
V+
V4
VDD
VSS
R39
AC_INPUT
A1
C3
A20
A
U15-A
3
2
R40
+
1
B
-
C
VDD
AC + DC
AC
R34
A1
AD8652AR
VSS
DAC + FLOATING DAC + BW
W1-1
W1-2
W1-3
W1-4
W1-5
W1-6
W1-7
W1-8
W1-9
W1-10
W1-11
W1-12
AD8403-1
W1_BUF
BUF-W1
AD5204-1
3 +
1
U14-A
2
AD8618ARZ
AD5233-1
W1
AD5162-1
AD5232-1
ADN2850-1
W1
AD5235-1
R36
AD5254-1
PSEUDOLOG ATTENUATOR
AD5252-1
AD5172
AD5243-1
B1
AD5222-1
A21
A
VDD
B1
R35
B1
B
R3
C
VSS
6
5
AD8652AR
-
7
+
U15-B
10363-020
R4
VSS
Figure 13. Schematic of Multiboard RDAC0 Circuits
INVERTING AND NON-INVERTING WITH LINEAR AND PSEUDO-LOG GAIN
W2-8
W2-9
W2-10
W2-11
W2-12
W2
B2
ADN2850 -2
A2
VIN
AD5235 -2
J2-1
W2
AD5254 -2
AD5252 -2
AD5172 -2
GND
AD5243 -2
PSEUDOLOG
INVERTING
NON-INVERTING
DIGIPOT
B2
CIRCUIT CONNE CTION
OAVOU T
B
AD5232 -2
A30
A
AD5162 -2
+
7
6 U14-B
AD8618ARZ
R42
R43
A2
LINEAR
C1
R38
10363-021
W2-7
5
NON-INVERTING
B
W2-6
R41
A
W2-5
W2
A27
W2-4
AD5233 -2
B
W2-3
VOUT
INVERTING
AD5204 -2
A
W2-2
AD8403 -2
A29
W2-1
J2-2
AD5322 -2
Figure 14. Schematic of Multiboard RDAC1 Circuits
Rev. 0 | Page 9 of 16
Rev. 0 | Page 10 of 16
W3-8
W3-3
W3-2
W3-1
AD5254-4
AD5233-4
AD5204-4
AD8403-4
AD5254-3
AD5233-3
AD5204-3
AD8403-3
W4-8
W4-3
W4-2
W4-1
W3
W4
BUF-3
BUF-4
A3
B4
A4
B3
10 +
8
U14-C
9
AD8618ARZ
12 +
14
U14-D
13
AD8618ARZ
CHANNELS 3 AND 4
B3
VOUT3
A3
B4
VOUT4
A4
O1
Figure 15. Schematic of AD5204 Power Supplies and Other Channels
O2
O2
O1
DIGITAL PINS
+3.3V +5V
GND
GND
EXT VSS
B
A
A24
+
V1
V2
V2
V1
+
10uF
C27
C24
10uF
C26
0.1uF
C25
0.1uF
POWER-SUPPLIES
CURRENT MONITOR
J1-3
J1-2
A25
EXT VDD
A
J1-1
+5V
B
+3.3V
C
POWER-SUPPLY
C4
0.1uF
C2
0.1uF
VSS
VDD
UG-345
EVAL-AD5204SDZ User Guide
10363-017
+3.3V
24LC01
1
A0
2
A1
3
A2
4
VSS
D6
LED
U25
8
VCC
7
WP
6
SCL
5
SDA
1K
R37
Rev. 0 | Page 11 of 16
RESET_BF
SHDN_BF
MUX-A0|CS
MUX-A2|U/D
SCL_BF
SDA_BF
DIN_BF
SCLK_BF
SYNC_BF
+5V
+3.3V
J22
Figure 16. Schematic of SDP-B Connector
114
113
9
112
10
111
71
70
68
67
66
65
64
61
62
I2C
FUTURE USE
BLACKFIN
CONTROL
UART
TIMERS
INPUT/OUTPUT
GENERAL
SPI
90
31
91
92
35
PAR_D23
PAR_D21
SPORT_DR3
SPORT_DR2
SPORT_DT2
SPORT_DT3
TMR_C
FUTURE
FUTURE
FUTURE
FUTURE
FUTURE
FUTURE
FUTURE
RESET_IN
UART_RX
TMR_A
7
8
29
30
33
34
49
50
51
53
54
55
56
57
60
59
48
43
GPIO0
44
GPIO2
45
GPIO4
47
GPIO6
41
SDA_1
42
SCL_1
37
SPI_SEL_B
38
SPI_SEL_C
39
SPI_SEL1/_SS
BLACKFIN-DB_FEMALE_CONNECTOR_2
PAR_D22
PAR_D20
PAR_D19
PAR_D18
PAR_D17
PAR_D16
FUTURE
FUTURE
FUTURE
FUTURE
FUTURE
FUTURE
FUTURE
BMODE1
UART_TX
73
TMR_B
72
TMR_D
78
GPIO1
77
GPIO3
76
GPIO5
74
GPIO7
80
SDA_0-EEPROM
79
SCL_0-EEPROM
85
SPI_SEL_A
84
SPI_MOSI
83
SPI_MISO
82
SPI_CLK
SPORT_RFS
SPORT_DR1
SPORT_DR0
SPORT_RSCLK
SPORT_INT
26
PAR_FS3
27
PAR_FS1
95
PAR_FS2
94
PAR_CLK
89
SPORT_TFS
32
SPORT_DT1
88
SPORT_DTO
87
SPORT_TSCLK
24
PAR_A3
25
PAR_A1
12
13
14
15
16
18
19
20
1
2
3
4
5
6
11
17
23
28
36
40
46
52
58
97
PAR_A2
96
PAR_A0
SPORT
PORT
PARALLEL
PAR_D14
PAR_D13
PAR_D11
PAR_D9
PAR_D7
PAR_D5
PAR_D3
PAR_D1
VIN_4-12V
N/C
GND
GND
5V_USB
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
21
PAR_RD
22
PAR_CS
PAR_D15
PAR_D12
PAR_D10
PAR_D8
PAR_D6
PAR_D4
PAR_D2
PAR_D0
7V_UNREGOUT
7V_UNREGOUT
GND
GND
V_IO(3.3V)
GND
GND
POWER SUPPLY
GND
GND
GND
GND
GND
GND
GND
GND
100
PAR_WR
99
PAR_INT
110
108
107
106
105
103
102
101
120
119
118
117
116
115
109
104
98
93
86
81
75
69
63
SDP BOARD CONNECTOR AND EEPROM
RDY|MODE
WP_BF
CLK_BF
MUX-A1|DACSEL
SDO_BF
+5V
A23
SYNC
RDY|MODE
CLK
MUX-A2|U/D
VDD
A8
A7
A6
A5
MUX-A1|DACSEL
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
RDY|MODE
CLK_BF
MUX-A2|U/D
MUX-A1|DACSEL
MUX-A0|CS
MUX-A0|CS
D
VDD
ADG658
7
8
VSS
GND
11
A0
10
A1
9
A2
6
EN
3
16
WP_BF
SYNC_BF
SDO_BF
DIN_BF
S8
S7
S6
S5
S4
S3
S2
S1
A22
4
2
5
1
12
15
14
13
MUX - CS
WP_BF
SYNC_BF
SDO_BF
DIN_BF
SCLK_BF
SCLK_BF
A11
A10
A12
A13
A9
SYNC-7
SYNC-6
SYNC-5
SYNC-4
SYNC-3
SYNC-2
SYNC-1
RESET_BF
SHDN_BF
SCL_BF
SDA_BF
EXTERNAL CONTROL CONNECTION
RDY_BF
SDO_BF
RESET_BF
SHDN_BF
SCL_BF
SDA_BF
A16
A17
A18
A14
SYNC_BF
RESET_BF
WP_BF
SHDN_BF
SCLK_BF
DIN_BF
R1
2k2
+3.3V
VDD
DGND
31
32
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
BE1
BE2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
SEL
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
34
U13 ADG3247-CSP
11
33
GND VCC
+3.3V
VSS
+3V3
LEVEL TRANSLATOR
SDA_BF
SCL_BF
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
RDY|MODE
CLK_BF
R2
2k2
+3.3V
VDD
AGND
VSS
+5V
SCLK
DIN
SDO
SYNC
RESET
WP
SHDN
RDY
SDA
SCL
CS
DACSEL
U/D
MODE
CLK
+5V
TEST POINTS
EVAL-AD5204SDZ User Guide
UG-345
10363-018
EVAL-AD5204SDZ User Guide
10363-014
UG-345
10363-012
Figure 17. Component Side View
10363-016
Figure 18. Component Placement Drawing
Figure 19. Layer 2 Side PCB Drawing
Rev. 0 | Page 12 of 16
UG-345
10363-015
EVAL-AD5204SDZ User Guide
10363-013
Figure 20. Layer 3 Side PCB Drawing
Figure 21. Solder Side PCB Drawing
Rev. 0 | Page 13 of 16
UG-345
EVAL-AD5204SDZ User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 7.
Qty
1
4
1
2
1
1
1
1
4
3
4
1
2
5
36
1
Reference Designator
C1
C2, C4, C25, C26
C3
C24, C27
D6
J1
J2
J22
A20, A21, A24, A25
A27, A29, A30
BUF-W1, OAVOUT, BUF-3, BUF-4
R41
R1, R2
R3, R4, R38, R39, R40
AD5162-1, AD5162-2, AD5172-1,
AD5172-2, AD5204-1, AD5204-2,
AD5204-3, AD5204-4, AD5222-1,
AD5222-2, AD5232-1, AD5232-2,
AD5233-1, AD5233-2, AD5233-3,
AD5233-4, AD5235-1, AD5235-2,
AD5243-1, AD5243-2, AD5252-1,
AD5252-2, AD5235-1, AD5235-2,
AD5235-3, AD5235-4, AD8403-1,
AD8403-2, AD8403-3, AD8403-4,
ADN2850-1, ADN2850-2, R34, R35, R42,
R43
R37
3.3 V, 5 V, DGND, AGND, VDD, VSS
A1, A2, A3, A4, RDY|MODE, RESET_BF,
SCL_BF, SCLK_BF, SDA_BF, SDO_BF,
SHDN_BF, SYNC_BF, MUX-A0|CS,
MUX-A1|DACSEL, MUX-A2|U/D, O1, O2,
DIN_BF, CLK, B1, B2, B3, B4, V1, V2, VOUT,
VOUT2, VOUT3, VOUT4, W1, W1_BUF, W2,
W3, W4, WP_BUF
U1
1
1
U2
U3
1
1
1
1
U4
U5
U6
U7
1
1
U8
U9
1
U10
1
U11
1
U12
1
6
35
Description
10 nF capacitor, 0805
0.1 μF capacitor, 0603
1 μF capacitor, 0402
10 μF capacitor, 1206
LED, green
3-pin connector
2-pin connector
Receptacle, 0.6 mm, 120 way
Header, 2-row, 36 + 36 way, and jumper socket, black
Header, 1-row, 3-way, and jumper socket, black
Header, 1-row, 2-way, and jumper socket, black
1.78 kΩ resistor, 0603, 1%
2.2 kΩ resistor, 0603, 1%
2.7 kΩ resistor, 1206, 1%
0 Ω resistor, 0603
Supplier1/Part Number
FEC 1692285
FEC 138-2224
FEC 1288253
FEC 1611967
FEC 579-0852
FEC 151790
FEC 151789
Digi-Key H1219-ND
FEC 148-535 and FEC 150-410
FEC 102-2248 and FEC 150-410
FEC 102-2247 and FEC 150-410
FEC 1170811
FEC 933-0810
FEC 9337288
FEC 9331662
1 kΩ resistor, 0603, 1%
Test point, PCB, black, PK100
Test point, PCB, red, PK100
FEC 933-0380
FEC 873-1128
FEC 873-1144
256-position, dual-channel, I2C-compatible digital
potentiometer
256-position, dual-channel, SPI digital potentiometer
256-position, one-time programmable, dual-channel,
I2C digital potentiometer
Nonvolatile, quad, 64-position digital potentiometer
Dual, increment/decrement digital potentiometer
4-channel digital potentiometer
Quad, 256-position, I2C, nonvolatile memory digital
potentiometer
4-channel digital potentiometer
I2C, nonvolatile memory, dual, 256-position digital
potentiometer
Nonvolatile memory, dual, 256-position digital
potentiometer
Dual, 1024-position digital potentiometer with
nonvolatile memory and SPI interface
Dual, 1024-position digital rheostat with nonvolatile
memory and SPI interface
Analog Devices AD5243
Rev. 0 | Page 14 of 16
Analog Devices AD5162
Analog Devices AD5172
Analog Devices AD5233
Analog Devices AD5222
Analog Devices AD8403
Analog Devices AD5254
Analog Devices AD5204
Analog Devices AD5252
Analog Devices AD5232
Analog Devices AD5235
Analog Devices ADN2850
EVAL-AD5204SDZ User Guide
Qty
1
Reference Designator
U13
1
U14
1
U15
1
1
U25
A22
1
UG-345
Description
Supplier1/Part Number
2.5 V/3.3 V, 16-bit (dual 8-bit), two-port level
translator bus switch
Precision, 20 MHz, CMOS, quad, rail-to-rail
operational amplifier
50 MHz, precision, low distortion, low noise CMOS
amplifier
24LC64 EEPROM
3 V/5 V, ± 5 V CMOS, 8-channel analog multiplexer
Analog Devices ADG3247
FEC refers to Farnell Electronic Component Distributors; Digi-Key refers to Digi-Key Corporation.
RELATED LINKS
Resource
AD5243
AD5162
AD5233
AD5222
AD8403
AD5254
AD5204
AD5252
AD5232
AD5235
ADN2850
ADG3247
ADG658
AD8652
AD8618
Description
Product Page, 256-Position Dual-Channel I2C Compatible Digital Potentiometer
Product Page, 256-Position Dual-Channel SPI Digital Potentiometer
Product Page, Nonvolatile, Quad, 64-Position Digital Potentiometer
Product Page, Dual, Increment/Decrement Digital Potentiometer
Product Page, 4-Channel Digital Potentiometer
Product Page, Quad 256-Position I2C Nonvolatile Memory, Digital Potentiometer
Product Page, 4-Channel Digital Potentiometer
Product Page, I2C, Nonvolatile Memory, Dual 256-Position Digital Potentiometer
Product Page, Nonvolatile Memory, Dual, 256-Position Digital Potentiometer
Product Page, Nonvolatile Memory, Dual 1024-Position Digital Potentiometer
Product Page, Nonvolatile Memory, Dual 1024-Position Digital Resistor
Product Page, 2.5 V/3.3 V, 16-Bit (Dual 8-Bit), 2-Port Level Translator, Bus Switch
Product Page, 3 V/5 V ± 5 V CMOS 8-Channel Analog Multiplexer
Product Page, 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifier
Product Page, Precision 20 MHz CMOS Quad Rail-to-Rail Operational Amplifier
Rev. 0 | Page 15 of 16
Analog Devices AD8618
Analog Devices AD8652
FEC 975-8070
Analog Devices ADG658
UG-345
EVAL-AD5204SDZ User Guide
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
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AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
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©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG10363-0-12/11(0)
Rev. 0 | Page 16 of 16